Abstract: A switch mode power amplifier includes a transistor responsive to input signals above 1.0 GHz and which includes one terminal coupled to ground and another terminal conductively coupled to a power source. A resonant circuit coupled the second terminal to an output with a resistive load coupled across the output and ground. When the transistor is turned on the second terminal is coupled to ground and when the transistor is turned off, current from the power supply to the second terminal is steered into internal capacitance of the transistor and causes voltage on the second terminal to rise to a maximum value and then decrease, the voltage at the second terminal being coupled to the output terminal through the resonant circuit. In preferred embodiments, the transistor comprises a compound semiconductor field effect transistor with the first terminal being a source terminal and the second terminal being a drain terminal.

Abstract: Trench isolated integrated circuit devices are fabricated by forming a trench including sidewalls in an integrated circuit substrate, and forming a lower device isolation layer in the trench and extending onto the trench sidewalls. The lower device isolation layer includes grooves therein, a respective one of which extends along a respective one of the sidewalls. An upper device isolation layer is formed on the lower device isolation layer and in the grooves. Trench isolated integrated circuit devices include an integrated circuit substrate including a trench having sidewalls and a lower device isolation layer in the trench and extending onto the trench sidewalls. The lower device isolation layer includes grooves therein, a respective one of which extends along a respective one of the sidewalls. An upper device isolation layer is provided on the lower device isolation layer and in the grooves.

Abstract: A memory cell of a memory array stores two bits. A memory array sense amplifier provides two bits in a verify operation. Two bits in a page buffer stores a write target value for the corresponding memory cell. Each bit in a mask buffer stores a value defining processing to be effected on the corresponding memory cell. A write driver applies a write pulse when the bit in the mask buffer corresponding to the selected memory cell is “0”. A verify circuit compares the two bits provided from the memory array sense amplifier with the corresponding two bits in the page buffer, and changes the corresponding bit in the mask buffer from “0” to “1” when the result of the comparison represents matching.

Abstract: A method for adapting a score stored in a MIDI file for being reproduced on a mobile terminal to the transfer function of an electroacoustic reproduction circuitry includes test rendering of the score to obtain sampled data prior to a reproduction of the score on the mobile terminal. From these sampled data, one or more values and or combination of values for a desired electroacoustic reproduction on the mobile terminals are identified, and, based on these identified values, one or more parameters suited for adapting the score with respect to the desired or optimised reproduction on the mobile terminal are determined.

Abstract: A method of treating a subject for a serotonergic neurotransmission dysregulation disorder, comprises administering the subject a serotonin enhancer (e.g., a serotonin reuptake inhibitor) in an amount effective to treat the disorder; and concurrently administering the subject 5-hydroxytryptophan in an amount effective to enhance the activity of the serotonin enahancer, (e.g., serotonin reuptake inhibitor). In preferred embodiments the disorder is depression, anxiety, or substance abuse.

Abstract: A compact display module for use in electronic devices includes a flat display having a front side with a display surface, and a carrier frame supporting the display. A metal frame is arranged over the front side with an aperture at the display surface. The metal frame has a flat gasket-receiving portion which is parallel to the display surface and extends around the aperture.

Abstract: Positioning of a transducer is controlled in response to real and imaginary component signals that are formed from a position error signal (PES) which is indicative of the transducer location on a media.

Abstract: An automated process and apparatus for making a gastro-retentive device (10). The method includes the steps of providing a pouch assembly having an ingredient section within a membrane; folding the membrane to form a folded pouch assembly; inserting the folded pouch assembly into a first capsule section (20a) to form a pouch/first capsule assembly, and inserting the pouch/first capsule assembly into a second capsule section (20b). The process can further include the steps of providing a strip (32) of multiple pouch assemblies (18) and cutting a single pouch assembly from the strip (32). Also provided is an apparatus (38) for carrying out the above method which includes a tooling block (44) having a passageway (62) configured for slidable movement of the pouch assembly (18) therein, and a tooling pocket (60) extending from a top surface of the tooling block to the passageway and which receives the pouch assembly.

Abstract: According to a CMOS image device and a method of manufacturing same, dark current is decreased by a local impurity region. The image device includes a semiconductor substrate, and a transfer gate formed on a predetermined portion of the semiconductor substrate and electrically insulated from the semiconductor substrate. A photodiode is formed in the semiconductor substrate on one side of the transfer gate, and a floating diffusion region is formed on the semiconductor substrate in the other side of the transfer gate. A local impurity region of a first conductivity type is formed to be partially overlapped the transfer gate between the photodiode and the floating diffusion region.

Abstract: A nonhuman transgenic mammal is described whose genome comprises a promoter construct operably linked to a heterologous DNA encoding an epithelial sodium channel ? subunit, wherein said promoter construct directs expression of the epithelial sodium channel ? subunit in lung epithelial cells of said animal, and wherein said transgenic mammal has increased lung mucus retention as compared to the corresponding wild-type mammal. The animal is useful in screening compounds for activity in treating lung diseases such as cystic fibrosis and chronic obstructive pulmonary disease.

Abstract: Provided herein are hardmask compositions for resist underlayer films, wherein in some embodiments, the hardmask compositions include (a) a first polymer prepared by the reaction of a compound of Formula 1 ?wherein n is a number of 3 to 20, with a compound of Formula 2 (R)m—Si—(OCH3)4-m??(2) ?wherein R is a monovalent organic group and m is 0, 1 or 2; (b) a second polymer that includes at least one of the structures represented by Formulae 3-6; (c) an acid or base catalyst; and (d) an organic solvent. Further provided herein are methods for producing a semiconductor integrated circuit device using a hardmask composition according to an embodiment of the present invention. In addition, provided herein are semiconductor integrated circuit devices produced by a method embodiment of the invention.

Abstract: A semiconductor device includes a gate structure on a channel region of a semiconductor substrate adjacent to a source/drain region therein and a surface insulation layer directly on the source/drain region of the substrate adjacent to the gate structure. The device further includes a spacer on a sidewall of the gate structure adjacent to the source/drain region. A portion of the surface insulation layer adjacent the gate structure is sandwiched between the substrate and the spacer. An interface between the surface insulation layer and the source/drain region includes a plurality of interfacial states. Portions of the source/drain region immediately adjacent the interface define a carrier accumulation layer having a greater carrier concentration than other portions thereof. The carrier accumulation layer extends along the interface under the spacer. Related methods are also discussed.

Abstract: A multilayer electrode structure has a conductive layer including aluminum, an oxide layer formed on the conductive layer, and an oxygen diffusion barrier layer. The oxide layer includes zirconium oxide and/or titanium oxide. The oxygen diffusion barrier layer is formed at an interface between the conductive layer and the oxide layer by re-oxidizing the oxide layer. The oxygen diffusion barrier layer includes aluminum oxide.

Abstract: Methods, systems, devices and computer program product include: (i) administering a fluorescent analyte to a subject; (ii) repetitively emitting excitation light from an implanted sensor over a desired monitoring period; (iii) detecting fluorescence intensity in response to the excitation light using the implanted sensor that outputs the excitation light; and (iv) using data associated with the detected fluorescence intensity to perform at least one of: (a) calculate the concentration or dose of the analyte received proximate to the implanted sensor site; (b) evaluate the pharmacodynamic or pharmacokinetic activity of the fluorescent analyte; (c) confirm Ab attachment to a tumor site; (d) monitor a non-target site to confirm it is not unduly affected by a therapy; (e) monitor for changes in cellular properties; (f) use the calculated dose or concentration data to adjust or customize a therapeutic amount of the analyte administered to the subject; (g) confirm micelle concentration at a target site and then sti

Abstract: Semiconductor devices have gate structures on a semiconductor substrate with first spacers on sidewalls of the respective gate structures. First contact pads are positioned between the gate structures and have heights lower than the heights of the gate structures. Second spacers are disposed on sidewalls of the first spacers and on exposed sidewalls of the first contact pads. Second contact pads are disposed on the first contact pads.

Abstract: Quality of Service (QoS) and/or bandwidth allocation is managed in a Regional/Access Network (RAN) that provides end-to-end transport between a Network Service Provider (NSP) and/or an Application Service Provider (ASP), and a Customer Premises Network (CPN) that includes a Routing Gateway (RG). A first subsystem is configured to manage QoS and/or bandwidth allocation for an access session in the CPN. A second subsystem is configured to manage QoS and/or bandwidth allocation for an application flow in the CPN. Thus, the RAN can independently manage QoS, session authentication and/or bandwidth allocation for an access session and for an application flow.

Abstract: An antenna arrangement for a portable communication apparatus includes a main antenna connectable to an antenna input, a receive antenna connectable to an antenna output, an external antenna connector for receiving a terminal of an auxiliary antenna, an antenna detector arranged to detect the terminal when it is connected to the external antenna connector, a switch adapted to connect either the receive antenna or the external antenna connector to the antenna output, and a DC voltage network. The DC voltage network is connected to the switch and is arranged to automatically control the switch to connect the external antenna connector to the antenna output and disconnect the receive antenna from the antenna output, when the terminal is connected to the external antenna connector.

Abstract: A nonvolatile memory device includes a semiconductor substrate, a device isolation film, a tunnel insulation film, a plurality of floating gates, an inter-gate dielectric film, and a control gate pattern. Trenches are formed in the substrate that define active regions therebetween. The device isolation film is in the trenches in the substrate. The tunnel insulation film is on the active regions of the substrate. The plurality of floating gates are each on the tunnel insulation film over the active regions of the substrate. The inter-gate dielectric film extends across the floating gates and the device isolation film. The control gate pattern is on the inter-gate dielectric film and extends across the floating gates. A central region of the device isolation film in the trenches has an upper major surface that is recessed below an upper major surface of a surrounding region of the device isolation film in the trenches.

Abstract: A jack assembly for use with a modular electrical plug includes a jack housing. The jack housing includes an electrically non-conductive substrate metalized with a metal shield layer. The jack housing defines a socket adapted to receive the plug. At least one electrical contact is positioned in the socket to engage the plug when the plug is inserted in the socket. An electrically conductive jumper member including a drain wire connector may be mounted on the jack housing. The drain wire connector includes a pair of connector tabs defining a slot therebetween to receive and hold the drain wire.