Patents Represented by Attorney, Agent or Law Firm Owen L. Lamb
  • Patent number: 4387427
    Abstract: A general-purpose, tightly-coupled multiprocessing system wherein processors share a common memory. A hardware-recognizable object (a process object) in memory stores access descriptors for controlling the type and extent of access to objects associated with a process, including one describing a buffered port. Another hardware-recognizable object (a processor object) associated with an executing process, stores access descriptors for controlling the type and extent of access to objects associated with a processor, including one describing a dispatching port. Task-dispatching functions are accomplished by hardware-controlled queuing mechanisms at the buffered ports and dispatching ports. These mechanisms allow different processes to communicate with each other and bind ready-to-run processes with available processors for execution.
    Type: Grant
    Filed: October 16, 1980
    Date of Patent: June 7, 1983
    Assignee: Intel Corporation
    Inventors: George W. Cox, Justin R. Rattner
  • Patent number: 4385816
    Abstract: A slide previewer/sorter/stack loader having a holder (18) which is adapted to receive two photographic slides in first and second receptacles at one end thereof. The holder is initially positioned at an angle above horizontal so that a first slide placed on a chute (16, 17) will drop into the first receptacle by force of gravity. When in the initial position, the slide in the holder is illuminated by a back light so that the slide can be previewed through a window in the holder and edited. The holder pivots in such a manner that the second receptacle can be positioned over a slide slot (28) above a projector. Means (26) are provided to restrain the slide in the first receptacle during transit from the initial viewing position to the position wherein the second receptacle is positioned over the slide slot. A second slide in the projector is forced upward by the projector slide lifter mechanism into the second receptacle in the holder, and is retained therein by a latch (52).
    Type: Grant
    Filed: January 4, 1982
    Date of Patent: May 31, 1983
    Inventor: Owen L. Lamb
  • Patent number: 4382602
    Abstract: A real estate game for amusement and educational purposes. Two tracks are provided around the game board. The outer track is called the Prospecting Circuit, and in the real estate business corresponds to marketing one's services by trying to find prospective real estate listings and buyers. An inner track is also provided, called the Buyer's Circuit upon which listings are placed. This inner track is also for buyers, represented by game pieces, one for each player, which move around the board, the number of spaces being determined by spinning a wheel until one of the buyers lands on one of the player's listings.
    Type: Grant
    Filed: December 4, 1980
    Date of Patent: May 10, 1983
    Inventors: Timothy H. Cusick, Eric R. Giuffrida
  • Patent number: 4367524
    Abstract: An execution unit which is part of a general-purpose microprocessor, partitioned between two integrated circuit chips, with the execution unit on one chip and an instruction unit on another chip. The execution unit provides the interface for accessing a main memory to thereby fetch data and macroinstructions for transfer to the instruction unit when requested to do so by the instruction unit. The execution unit receives arithmetic microinstructions in order to perform various arithmetic operations, and receives access-memory microinstructions in order to develop memory references from logical addresses received from the instruction unit. Arithmetic operations are performed by a data manipulation unit which contains registers and arithmetic capability, controlled by a math sequencer.
    Type: Grant
    Filed: February 7, 1980
    Date of Patent: January 4, 1983
    Assignee: Intel Corporation
    Inventors: David L. Budde, Stephen R. Colley, Stephen L. Domenik, Allan L. Goodman, James D. Howard
  • Patent number: 4338738
    Abstract: A slide previewer/tray loader having a holder which is adapted to receive a photographic slide at one end thereof. The holder is initially positioned at an angle above horizontal so that the slide will drop into the holder by force of gravity. When in the initial position, the slide in the holder is illuminated by a back light so that the slide can be previewed and edited. The holder pivots in such a manner that the slide can be moved to a vertical position over a slide tray slot. Means are provided to restrain the slide in the holder during transit from the initial viewing position to the position over the slide tray slot. The restraining means releases the slide to allow it to drop into the tray slot.
    Type: Grant
    Filed: January 10, 1980
    Date of Patent: July 13, 1982
    Inventor: Owen L. Lamb
  • Patent number: 4325120
    Abstract: A data processor architecture wherein the processors recognize two basic types of objects, an object being a representation of related information maintained in a contiguously-addresed set of memory locations. The first type of object contains ordinary data, such as characters, integers, reals, etc. The second type of object contains a list of access descriptors. Each access descriptor provides information for locating and defining the extent of access to an object associated with that access descriptor. The processors recognize complex objects that are combinations of objects of the basic types. One such complex object (a context) defines an environment for execution of objects accessible to a given instance of a procedural operation. The dispatching of tasks to the processors is accomplished by hardware-controlled queuing mechanisms (dispatching-port objects) which allow multiple sets of processors to serve multiple, but independent sets of tasks.
    Type: Grant
    Filed: December 21, 1978
    Date of Patent: April 13, 1982
    Assignee: Intel Corporation
    Inventors: Stephen R. Colley, George W. Cox, Justin R. Rattner, Roger C. Swanson
  • Patent number: 4315308
    Abstract: An interface between a microprocessor chip and input/output, and memory modules. The interface uses a single, bidirectional bus comprised of a number of lines which is less than the number necessary to carry a complete address word or a full width data word. Information transfer is effected by transferring information in small portions utilizing two or more interface clock cycles. An encoded control specification placed on the bus during the first cycle of information transfer specifies the type of access, the direction of transfer, and the length (number of bytes) of data to be moved. Only two additional simplex lines, one from the microprocessor and the other to the microprocessor are needed to complete the basic interface.
    Type: Grant
    Filed: December 21, 1978
    Date of Patent: February 9, 1982
    Assignee: Intel Corporation
    Inventor: Daniel K. Jackson
  • Patent number: 4315310
    Abstract: An input/output processor architecture for providing an interface between peripheral subsystems and a generalized data processor. The interface processor enables data to be transferred between two address spaces (the generalized data processor address space and an external processor I/O address space) by mapping a portion of the I/O address space into a portion of the GDP address space. This mapping facility provides the peripheral subsystem with a "window" into the associated GDP subsystem. It accepts addresses within a certain subrange, or subranges, and translates them into references into one or more GDP data segments.A function-request facility provides a functional capability over certain objects within the GDP address space.
    Type: Grant
    Filed: September 28, 1979
    Date of Patent: February 9, 1982
    Assignee: Intel Corporation
    Inventors: John A. Bayliss, George W. Cox, Bert E. Forbes, Kevin C. Kahn
  • Patent number: 4307266
    Abstract: A communication device coupled to a standard telephone which has an alphanumeric rotary dial or pushbutton keyboard. A simple, easily-learned code (11) is utilized which can be transmitted over telephone lines (14) using the rotary or push-button digits (10). To communicate, the called party enters the appropriate position for the letter of the alphabet to be communicated. A second entry identifies which one of the plurality of letters (or the number) is intended to be transmitted. The calling party has apparatus (18, 20) attached to the telephone set (16) which decodes the two-digit coded entry, and converts the two-digit code to a standard machine-readable format which can be displayed on a standard output device (26) such as an alphanumeric display or, for blind persons, a braille or similar output device. The calling party can transmit a message to the called party, by keying characters into a keyboard (22).
    Type: Grant
    Filed: July 11, 1980
    Date of Patent: December 22, 1981
    Inventor: John D. Messina
  • Patent number: 4285184
    Abstract: A method of constructing a building with a sound-proof window therein. A double-skinned exterior wall is constructed having an outer structure of sheathing supported by vertical studs and an inner structure of sheathing supported by vertical studs which are separate from the studs supporting the outer sheathing, such that an air space is created therebetween. A first window is glazed in an opening in the outer sheathing and a second window is glazed in an opening in the inner sheathing, such that the second window is in tandem with the first window. The air space between the inner and outer structures is then filled with a sound-absorbing insulating material, such that the air space provides a sound-absorbing resonant cavity.
    Type: Grant
    Filed: September 4, 1979
    Date of Patent: August 25, 1981
    Inventor: Ralph L. Turner, Jr.
  • Patent number: 4249329
    Abstract: A slide viewer/sorter having a chute oriented at an incline to horizontal which is adapted to receive a photographic slide at one end. The slide drops by force of gravity to a viewing station where it is held by a detent. After viewing the slide the detent is actuated to release the slide which is transported by force of gravity to the lower end of the chute where it drops into a first receptacle. The first receptacle is rotatably mounted so that it can be moved out of the way, thus allowing the slide to drop further down into a second receptacle, having a number of bins. The second receptacle is mounted so that any bin can be positioned under the chute. This allows the operator of the viewer/sorter to sort the slides into two or more different stacks.
    Type: Grant
    Filed: September 28, 1979
    Date of Patent: February 10, 1981
    Inventor: Owen L. Lamb
  • Patent number: 4214230
    Abstract: A method and apparatus for verifying that the bearer of a card (e.g., credit card, bank card, etc.) is authorized to use the card. The card bears machine-readable indicia of an account number (PAN) and the bearer of the card has memorized a personal identification number (PIN). There is associated with the PAN a check number (PCN) which is derived by (1) generating a first cipher Y1 by encrypting the PAN using the PIN in combination with a secret security number as a key, the bits of which address a data encryption process; (2) generating a second cipher by decrypting the first cipher using the secret security number as a key so that the decryption process is the reverse of the encryption process; and (3) storing the second cipher as the check number PCN in a machine-accessible location, which may be in a separate memory or recorded on the card itself.
    Type: Grant
    Filed: January 19, 1978
    Date of Patent: July 22, 1980
    Inventors: Viiveke Fak, Ingemar B. Ingemarsson, Rolf Blom, Robert Forchheimer, Bjorn I. Hellberg
  • Patent number: 4196450
    Abstract: Selective copying apparatus wherein selected portions of a source document are copied onto a copy paper at any position on the copy paper and wherein information is deleted or inserted by the user from an input keyboard. A manually-operated portable scanner is used by the operator to scan a selected portion of the document by placing the scanner at the desired line position and moving the scanner across the document. The scanned image is converted into digital data. A copier responds to the digital data and copies the scanned image onto a copy paper at a line position which is also selected by the operator. Thus, the image selected by the operator on the source document is reproduced at a position on the copy paper which is also separately selected by the operator.
    Type: Grant
    Filed: July 14, 1978
    Date of Patent: April 1, 1980
    Assignee: Datacopy Corporation
    Inventors: Armin Miller, Maxwell G. Maginness
  • Patent number: 4176258
    Abstract: Method and circuit for checking integrated circuit chips without the use of external checking circuits. Chips are fabricated with an error-checking circuit on each chip. Data from data processing logic on each chip is outputted via a first path to one input of its respective checking circuit and via a second path to an output pin or pins. The output pin on each chip is also connected via a third path to the other input of its checking circuit. The input and output pins of each chip are wired in parallel. A separate check input pin is provided to each integrated circuit chip. On one chip this pin is activated, making this first chip the checker. On the other chip, the check input pin is deactivated. On the chip which is the checker, the output from the data processing logic is prevented from being passed externally via the first path, but is allowed to enter the checking circuit via the second path.
    Type: Grant
    Filed: May 1, 1978
    Date of Patent: November 27, 1979
    Assignee: INTEL Corporation
    Inventor: Daniel K. Jackson
  • Patent number: 4068224
    Abstract: Alphanumeric characters are stored in compressed form by creating a character list of information describing each character. The character is divided into rows and columns. To reconstruct the character, a position register is provided to accommodate successive positional values in a column where a transition from white/black (or vice versa) occurs. A decoder circuit, which has a number of outputs corresponding to the number of positional values possible, is coupled to the position register and provides an output associated with each of the transition values. The decoder circuit is followed by control means which is operable in response to the energized outputs of the decoder circuit to generate control signals which energize a utilization device to reconstruct continuous black areas in a column extending from transition value to transition value.
    Type: Grant
    Filed: November 17, 1975
    Date of Patent: January 10, 1978
    Assignee: International Business Machines Corporation
    Inventors: Bastian Bechtle, Hartmut J. Bleher, Helmut Hasselmeier, Wilhelm G. Spruth, Peter Stucki, Helmut Weis
  • Patent number: 4015799
    Abstract: A reel-to-reel web (tape) transport apparatus which has no tape length buffering between the supply and take-up reels. The tape follows a fixed length path from the supply reel, past a read/write head and guides, to a take-up reel. A two motor control mechanism is employed in which one motor drives the take-up reel and one motor drives the supply reel to maintain the appropriate tension and tape motion at the read/write head. The control mechanism is adaptive to dynamic changes as the tape is moved from the supply reel to the take-up reel. Three quantities are monitored: lineal tape position and the angular reel displacement of the supply and take-up reel. From these quantities reel radii are derived, tape inertia calculated and the velocity or position error is determined. A motor current algorithm is utilized to generate the appropriate torque for each reel to drive the control error to zero along a predetermined profile with negligible tape tension disturbances.
    Type: Grant
    Filed: November 14, 1975
    Date of Patent: April 5, 1977
    Assignee: International Business Machines Corporation
    Inventors: John Alexander Koski, Rudolf Werner Lissner, Spencer Donald Roberts
  • Patent number: 4006465
    Abstract: Apparatus under microprocessor control for use in communicating over a serial communication loop with a remote attached control unit. It is capable of establishing frame synchronization, interpreting commands, assembling data and transmitting bits on the loop. The apparatus also communicates with I/O devices over a demand/response interface.A microprocessor interface with the loop includes loop sync control which establishes bit synchronization and generates a restart pulse at bit receive time and bit send time. The execution of instructions by the microprocessor is stopped and the microprocessor enters a wait state when it has finished all previous work and is ready to receive a loop bit. When it is time to receive the loop bit the microprocessor is restarted in response to the restart pulse from the loop synchronization control.For output operations to a device, the microprocessor loads the device address and a device command or data into shift registers and initiates the transfer by setting a latch.
    Type: Grant
    Filed: May 14, 1975
    Date of Patent: February 1, 1977
    Assignee: International Business Machines Corporation
    Inventors: Jon L. Cross, Merle Edward Homan, Guenther Keith Machol, Richard La Verne Malm, Larry Eugene Svelund
  • Patent number: 3984833
    Abstract: Apparatus for encoding ordinary run-length codes and run-length codes that have been extended to include two classes of code words, regular code words for runs and special code words for selected special situations. The encoder comprises table storage, select/combine circuitry, and shift-out circuitry. The table storage holds four small tables whose values can be adjusted to correspond to any ordinary or extended run-length code to be implemented. The select/combine circuitry accepts as input a binary value that uniquely identifies the desired code word, and combines this binary value with selected table values to calculate the desired code word. The code word bits are then outputted sequentially by the shift-out circuitry.
    Type: Grant
    Filed: July 17, 1975
    Date of Patent: October 5, 1976
    Assignee: International Business Machines Corporation
    Inventor: David Curtis Van Voorhis