Patents Represented by Attorney, Agent or Law Firm Pascal & Associates
  • Patent number: 5497420
    Abstract: This invention relates to a method of distributing signals to valid subscribers comprised of storing subscriber terminal valid identification codes at a central station, broadcasting promotions of services available to subscribers, each associated with a specific promotion code, selecting one of the services and entering a selected service promotion code into a terminal at a subscriber location, automatically reading an identification number associated with the terminal in response to the entering of a selected promotion code, processing the identification number and the selected promotion code in accordance with an encryption algorithm, and generating an encrypted event request code therefrom, providing the event request code to a verification center, at the verification center, decrypting the event request code, verifying the number against the valid identification codes, and providing a password unique to the terminal and the selected promotion code, entering the password into the terminal at the subscribe
    Type: Grant
    Filed: February 7, 1994
    Date of Patent: March 5, 1996
    Assignee: Le Groupe Vide/ otron Lte/ e
    Inventors: Pierre Garneau, Jose/ e Corriveau, Michel Dufresne
  • Patent number: 5495548
    Abstract: A method of fabricating a strongly photosensitive optical waveguide is comprised of locally heating at least a portion of a weakly photosensitive optical waveguide for a period of time sufficient to increase the density of defects associated with photosensitivity in the heated portion of the waveguide core.
    Type: Grant
    Filed: February 16, 1994
    Date of Patent: February 27, 1996
    Assignee: Her Majesty the Queen in Right of Canada, as represented by the Minister of Communications
    Inventors: Francois C. Bilodeau, Bernard Y. Malo, Jacques Albert, Derwyn C. Johnson, Kenneth O. Hill
  • Patent number: 5479594
    Abstract: Enhancing each pixel of a digital color video image by, for each component part of a source pixel, successively adding a truncation error of an immediately preceding previous pixel in an X direction to a current pixel. A resulting value is truncated to form a truncation error and most significant bits, and the most significant bits are provided to a destination line.
    Type: Grant
    Filed: September 10, 1993
    Date of Patent: December 26, 1995
    Assignee: ATI Technologies Inc.
    Inventor: Sanford S. Lum
  • Patent number: 5473935
    Abstract: The invention calls for a pipe with perforated walls to be laid on, in or under the waterproofing, such as located on and under waste dumps, to be monitored and if necessary repaired, the monitoring and repair operations being undertaken from this pipe.
    Type: Grant
    Filed: November 18, 1992
    Date of Patent: December 12, 1995
    Inventor: Hans Richter
  • Patent number: 5469401
    Abstract: A random access memory comprising rowlines and columns crossing the rowlines, memory cells being associated with crossings of rowlines and columns; apparatus for connecting the memory cells to columns from voltage carried on the rowlines, the rowlines, columns and memory cells being arranged in more than two adjacent arrays; a column decoder providing access apparatus to columns in all the arrays; apparatus to disable the column access in any or all arrays and apparatus to enable a replacement spare column or columns using a spare column decoder in any or all of the arrays.
    Type: Grant
    Filed: July 14, 1992
    Date of Patent: November 21, 1995
    Assignee: Mosaid Technologies Incorporated
    Inventor: Peter B. Gillingham
  • Patent number: 5461621
    Abstract: For use in a transmission system in which an input data stream is transmitted in plural data streams each at a fraction of the input data stream rate and plural clock stream pairs each at the fraction of the input data clock rate, a receiver, comprised of apparatus for receiving the plural data streams, apparatus for determining frame timing differences between frame signals contained in each of the received plural data streams, apparatus for varying the timing of one received data stream relates to another, whereby their relative timing is adjusted, apparatus for combining the timing adjusted plural data streams into an output data stream having a similar data stream rate as the input data stream, apparatus for recovering a clock from one of the plural data streams, and for generating an output clock signal therefrom at the input data clock rate, and apparatus for aligning the output data stream with the output clock signal, whereby an output data stream and an output clock signal are provided having similar
    Type: Grant
    Filed: June 1, 1994
    Date of Patent: October 24, 1995
    Assignee: PMC-Sierra, Inc.
    Inventor: Vernon R. Little
  • Patent number: 5459653
    Abstract: A voltage to current converter is formed of a first current steering mirror which includes first binary weighted current mirror transistors and receives an input voltage signal and converts it to an output current. The converter also is formed of a second current mirror which generates a selectable output current, the second current mirror being formed of second binary weighted current mirror transistors. The output currents of the first current steering mirror and second current mirror are added and the sum is provided to the control input of a current controlled oscillator which can be used in a phase locked loop.
    Type: Grant
    Filed: June 23, 1993
    Date of Patent: October 17, 1995
    Assignee: ATI Technologies Inc.
    Inventors: Jim M. N. Seto, Roger P. Colbeck, Raymond Chau, Simon C. F. Leung
  • Patent number: 5450543
    Abstract: A memory address pointer that selects a memory location that is mapped to a video graphics circuit port is incremented only when all bytes in a memory location have been read from or written to by the host CPU. This does not depend on the order in which the host CPU reads or writes data bytes. Therefore a video controller that uses the present invention will work with 8 bit, 16 bit as well as high performance 32 bit input/output instructions.
    Type: Grant
    Filed: October 11, 1994
    Date of Patent: September 12, 1995
    Assignee: ATI Technologies Inc.
    Inventor: Gabriel Varga
  • Patent number: 5447527
    Abstract: A therapeutic method of using a lamp comprised of a fixture for retaining a light bulb in a position to be viewed by the eyes of a patient, apparatus for restricting the wavelengths of light emitted by the light bulb to those between 490 and 520 nanometers, and apparatus for restricting the light energy irradiance to between about 1.8 and 200 microwatts per square centimeter over at least the eyes of the patient. The restricting apparatus can be a narrowband light transmission filter or the phosphor of a fluorescent bulb. By the use of this lamp, the effects of seasonal affective disorder (SAD) or other chronobiological disorders are reduced or eliminated without substantially encountering the side effects of hypomania, irritability, nausea or agitation previously found.
    Type: Grant
    Filed: June 11, 1993
    Date of Patent: September 5, 1995
    Assignee: Suzanne Maureen Waldman
    Inventor: Murray M. Waldman
  • Patent number: 5440593
    Abstract: The present invention relates to a method of aligning and blending input digital samples, comprised of delaying the input samples by a clock pulse, to provide delayed data samples, subtracting a smaller fractional part from a larger fractional part of either an input sample number and a requested sample number to provide a sample difference number first factor, subtracting the sample difference number from 1 to provide a second factor, multiplying either of the input samples or the delayed samples by the first factor to provide a first result, multiplying the other of the input samples or the delayed samples by the second factor to provide a second result, and adding the results to provide output samples.
    Type: Grant
    Filed: September 30, 1993
    Date of Patent: August 8, 1995
    Assignee: ATI Technologies Inc.
    Inventor: Pasquale Leone
  • Patent number: 5438251
    Abstract: A safety charging connector is provided for connecting two batteries of two automobiles. The safety charging connector comprises four contact terminals each for contacting a different electrode of one of the two batteries, a relay switch for rendering conduction among the contact terminals, and a control circuit for controlling the conduction of the relay switch; the control circuit includes four sub-circuits each of which is serially connected between the relay switch and one of the four terminals.
    Type: Grant
    Filed: June 18, 1993
    Date of Patent: August 1, 1995
    Assignee: Windsor Chou
    Inventors: Chern-Lin Chen, Jea-Sen Lin
  • Patent number: 5436211
    Abstract: The invention concerns a process for the recovery of a solvent adsorbed in an adsorber, or other substances which are condensable. The adsorber (3) is, at first, heated to a temperature which is below the decomposition temperature of the solvent, then the adsorber chamber (2) is sealed off from the surroundings and a high negative pressure is applied to the adsorber chamber (2), as a result of which the solvent is desorbed. During a portion of the time when this high negative pressure is applied, the temperature of the adsorber (3) is brought to a value which is above the decomposition temperature of the solvent. In spite of this, there is no decomposition under the noted conditions, however, the high temperature does enable an almost complete desorption of the solvent. Finally, the desorbed solvent is drawn off from the adsorber chamber (2) and condensed.
    Type: Grant
    Filed: February 1, 1993
    Date of Patent: July 25, 1995
    Assignee: Pero KG
    Inventor: Horst Erbel
  • Patent number: 5425152
    Abstract: A method of constructing a bridge using a two step composite construction process. In the first step, the region to be spanned is bridged with precast prestressed concrete elements that are designed as beams and complete permanent formwork to carry the dead load of the bridge, to provide a high density concrete protective shell giving a greater degree of protection against deterioration from the elements and to provide a very high quality of finish and architectural design, to provide a complete working platform for construction, and to eliminate the need for temporary scaffolding and formwork. In the second step, additional poured in place concrete is cast into the spaces created by the precast elements and serves as beams, post-tensioned to carry the live loads of the bridge.
    Type: Grant
    Filed: August 14, 1992
    Date of Patent: June 20, 1995
    Assignee: Teron International Building Technologies Ltd.
    Inventor: William Teron
  • Patent number: 5424983
    Abstract: The present invention relates to an output buffer for driving an output driver of a random access memory (RAM) circuit to either of opposite binary data values from a data source and a clock wherein the relative timing of data and clock signals is variable or uncertain, comprised of a source of data signals having pulses one of which has a rising edge either being earlier than a leading edge of a data pulse, being later than the leading edge of the data pul se, or being in a race condition with the data pulse, a source of data signals, a latency counter for receiving the clock signals and for outputting a latent control, apparatus for summing the latent clock signal and the data pulse, and apparatus for providing a signal to an output driver from the summing apparatus which is in sync with the latent clock signal.
    Type: Grant
    Filed: December 16, 1993
    Date of Patent: June 13, 1995
    Assignee: Mosaid Technologies Incorporated
    Inventors: Tomasz Wojcicki, Francis Larochelle
  • Patent number: 5416743
    Abstract: The present invention relates to a method of writing or reading a semiconductor random access memory (DRAM or SRAM) having plural sense amplifiers connected to lines and having data bus read and write amplifiers, comprised of providing a pair of data buses for access by each sense amplifier and each read and write amplifier, reading or writing one data bus while precharging the other data bus during a first read or write cycle, and reading or writing the other data bus while precharging the first data bus in a second read or write cycle following the first read or write cycle.
    Type: Grant
    Filed: December 10, 1993
    Date of Patent: May 16, 1995
    Assignee: Mosaid Technologies Incorporated
    Inventors: Graham Allan, Francis LaRochelle
  • Patent number: 5414662
    Abstract: Apparatus and methods for controlling the sensing of bit lines which facilitates the distribution of bit line charging current to be distributed any time, and facilitates the fast raising of the sense modes to full logic levels. An embodiment is comprised of a plurality of bit storage capacitors, a folded bit line for receiving charge stored on one of the capacitors, having bit line capacitance, a sense amplifier having a pair of sense nodes for sensing a voltage differential across the sense nodes, apparatus connected to the bit line and the sense nodes for imperfectly isolating the sense nodes from the bit line whereby current can leak therethrough, apparatus for enabling the sense amplifier and for disabling the isolating apparatus and thereby removing the isolation between the sense amplifier and the bit line, whereby current passing through the sense amplifier to the sense nodes is enabled to charge the bit line capacitance through the isolating apparatus to predetermined logic voltage level.
    Type: Grant
    Filed: November 4, 1993
    Date of Patent: May 9, 1995
    Assignee: Mosaid Technologies Incorporated
    Inventors: Richard C. Foss, Peter B. Gillingham, Robert Harland, Masami Mitsuhashi, Atsushi Wada
  • Patent number: 5406523
    Abstract: A circuit for providing an output voltage for a DRAM word line which can be used to drive memory word lines which can be as high as 2V.sub.dd. Transistors in a boosting circuit are fully switched, eliminating the reduction of the boosting voltage by V.sub.tn as in the prior art. The boosting capacitors are charged by V.sub.dd, thus eliminating draft tracking problems associated with clock boosting sources and V.sub.dd. A regulator detects conduction current of a replica of a memory cell access transistor, shutting off the boosting circuit clock oscillator when the correct voltage to operate the access transistor has been reached.
    Type: Grant
    Filed: October 12, 1993
    Date of Patent: April 11, 1995
    Assignee: Mosaid Technologies Incorporated
    Inventors: Richard C. Foss, Peter B. Gillingham, Robert F. Harland, Valerie L. Lines
  • Patent number: 5404176
    Abstract: The present invention relates to a method of enhancing a digital color video image comprised of separating a source pixel into individual component parts, for each component part, generating a random number having the same length as the corresponding component part, adding each random number to its corresponding component part to form resultant component parts, and combining the resultant component parts to form a destination pixel.
    Type: Grant
    Filed: September 10, 1993
    Date of Patent: April 4, 1995
    Assignee: ATI Technologies Inc.
    Inventor: Sanford S. Lum
  • Patent number: 5402190
    Abstract: A method of avoiding the influence of light on the biological clock caused by the presence of full spectrum light during intervals unexpected by the human body is comprised of wearing goggles that substantially block light having wavelengths of between about 480 and 530 nm. during exposure to the light, while conducting normal activities using visible light of other wavelengths.
    Type: Grant
    Filed: October 13, 1992
    Date of Patent: March 28, 1995
    Assignee: Suzanne Maureen Waldman
    Inventor: Murray M. Waldman
  • Patent number: 5402388
    Abstract: The present invention relates to a method of writing or reading a semiconductor random access memory (DRAM or SRAM) having plural sense amplifiers connected to bit lines and having data bus read and write amplifiers, formed of providing a pair of data buses for access by each sense amplifier and each read and write amplifier, reading or writing one data bus while precharging the other data bus during a first read or write cycle, and reading or writing the other data bus while precharging the first data bus in a second read or write cycle following the first read or write cycle.
    Type: Grant
    Filed: December 16, 1993
    Date of Patent: March 28, 1995
    Assignee: Mosaid Technologies Incorporated
    Inventors: Tomasz Wojcicki, Graham Allan, Francis Larochelle