Abstract: The present invention relates to new compositions of matter, particularly metals and alloys, and methods of making such compositions. The new compositions of matter exhibit long-range ordering and unique electronic character.

Abstract: A semiconductor wafer contains a substrate having a plurality of active devices formed thereon. An analog circuit is formed on the substrate. The analog circuit can be an inductor, metal-insulator-metal capacitor, or resistor. The inductor is made with copper. A through substrate via (TSV) is formed in the substrate. A conductive material is deposited in the TSV in electrical contact with the analog circuit. An under bump metallization layer is formed on a backside of the substrate in electrical contact with the TSV. A solder material is deposited on the UBM layer. The solder material is reflowed to form a solder bump. A wire bond is formed on a top surface of the substrate. A redistribution layer is formed between the TSV and UBM. The analog circuit electrically connects through the TSV to the solder bump on the back side of the substrate.

Abstract: An ultrasound system comprises a position sensing module, an imaging tracking module, a display and a user interface. The position sensing module detects spatial information associated with a volume of data. The display displays first and second images based on the volume of data. The first and second images comprise first and second portions of the volume of data, and the first and second portions are at least partially different with respect to each other. The user interface selects a first image tracking point on the first image. The first image tracking point is indicated on the first image with a first indicator. The image tracking module tracks the first image tracking point within the volume of data. The image tracking module indicates on the display a spatial relationship of the first image tracking point to the second image.

Abstract: A pet bed is configured to transfer heat from a pet to a support structure. The pet bed may include at least one pad defining an internal chamber, and a batting secured within the at least one pad. The batting allows water within the internal chamber to easily flow therethrough so that heat is transferred away from the pet through convection and conduction.

Abstract: The present disclosure relates to a bracket, particularly to a universal style bracket for mounting a speaker to a television or monitor panel.

Abstract: Systems and methods are disclosed to control the temperature of an RF hyperthermia system with minimum overshoot and to improve safety by, among other things, detecting a defective temperature sensor. Temperature overshoot may be minimized by compensating for the short-term temperature difference between the area being treated and the applicator delivering the RF energy. The RF energy may heat the tissue and then the tissue may transfer heat to the applicator sensor. The system may also adapt to various applicator sizes and shapes by modifying control loop coefficients based on initial probe response.

Abstract: A semiconductor device has a first conductive layer formed over a substrate. A first insulating layer is formed over the substrate and first conductive layer. A second conductive layer is formed over the first conductive layer and first insulating layer. A second insulating layer is formed over the first insulating layer and second conductive layer. The second insulating layer has a sidewall between a surface of the second insulating material and surface of the second conductive layer. A protective layer is formed over the second insulating layer and surface of the second conductive layer. The protective layer follows a contour of the surface and sidewall of the second insulating layer and second conductive layer. A bump is formed over the surface of the second conductive layer and a portion of the protective layer adjacent to the second insulating layer. The protective layer protects the second insulating layer.

Abstract: The present invention relates to compounds of Formula I, II, III or IV, or pharmaceutically acceptable salts, esters, or prodrugs thereof: which inhibit serine protease activity, particularly the activity of hepatitis C virus (HCV) NS3-NS4A protease. Consequently, the compounds of the present invention interfere with the life cycle of the hepatitis C virus and are also useful as antiviral agents. The present invention further relates to pharmaceutical compositions comprising the aforementioned compounds for administration to a subject suffering from HCV infection. The invention also relates to methods of treating an HCV infection in a subject by administering a pharmaceutical composition comprising a compound of the present invention.

Abstract: A semiconductor device has a base substrate with first and second etch-resistant conductive layers formed over opposing surfaces of the base substrate. First cavities are etched in the base substrate through an opening in the first conductive layer. The first cavities have a width greater than a width of the opening in the first conductive layer. Second cavities are etched in the base substrate between portions of the first or second conductive layer. A semiconductor die is mounted over the base substrate with bumps disposed over the first conductive layer. The bumps are reflowed to electrically connect to the first conductive layer and cause bump material to flow into the first cavities. An encapsulant is deposited over the die and base substrate. A portion of the base substrate is removed down to the second cavities to form electrically isolated base leads between the first and second conductive layers.

Abstract: The present invention provides methods for regulating the development of apical bud formation in a plant comprising the step of modulating the expression of PtFD1 or a protein having substantial identity to PtFD1, in the plant. Transgenic poplar trees that either overexpress PtFD1 or that down regulate PtFD1 are also provided. Also provided are methods for identifying the regulatory targets of PtFD1.

Abstract: An actual linear amplifier distorts an input signal, such as an RF signal, and generates third order intermodulation (IM3) products. A single-port predistortion circuit is connected at a single node of an input line to the amplifier via an AC coupling capacitor. The fundamental frequency of the input signal is applied to a forward biased diode junction. The current through the diode is applied to a second capacitor. The appropriate setting of a tuning device, such as a tunable resistor or a tunable capacitor, causes the predistortion circuit to invert the second harmonic generated by the diode. The inverted second harmonic signal is applied to the single node of the input line to add predistortion to the signal applied to the amplifier. The predistortion cancels or substantially reduces the IM3 products at the output of the amplifier.

Abstract: A reactor system for the transformation of solid, liquid, gaseous, and related hydrocarbon feedstocks into high-purity, high-pressure gas streams capable of withstanding high temperatures and high pressures. The system comprises a plurality of reactor housings and a plurality of molten-metal bath vessels within the housings, the bath vessels in fluid communication with each other via conduits, with communication facilitated by gravity and temperature/pressure differentials.

Abstract: A flip chip semiconductor package has a substrate with a plurality of active devices. A contact pad is formed on the substrate in electrical contact with the plurality of active devices. A passivation layer, second barrier layer, and adhesion layer are formed between the substrate and an intermediate conductive layer. The intermediate conductive layer is in electrical contact with the contact pad. A copper inner core pillar is formed by plating over the intermediate conductive layer. The inner core pillar has a rectangular, cylindrical, toroidal, or hollow cylinder form factor. A solder bump is formed around the inner core pillar by plating solder material and reflowing the solder material to form the solder bump. A first barrier layer and wetting layer are formed between the inner core pillar and solder bump. The solder bump is in electrical contact with the intermediate conductive layer.

Abstract: An actual linear amplifier distorts an input signal, such as an RF signal, and generates third order intermodulation (IM3) products. In an embodiment of a Class A amplifier, the linear amplifier is a bipolar, common emitter-configured (CE) transistor using a cascode transistor to provide a fixed collector bias voltage to the CE transistor. The CE transistor has a transconductance vs. base-emitter voltage (VBE) characteristic which, when plotted, shows a transconductance that increases with an increasing VBE to a maximum, then drops, then tapers off, wherein there is an inflection point between the maximum transconductance and where the transconductance tapers off. A DC bias circuit provides a DC bias voltage to the base of the CE transistor that causes the CE transistor's operating point to track the inflection point over a range of temperatures. This operating point causes the IM3 products to be greatly reduced.

Abstract: A semiconductor device includes a first semiconductor layer and a second semiconductor layer of opposite conductivity type, a first epitaxial layer of the first conductivity type formed on sidewalls of the trenches, and a second epitaxial layer of the second conductivity type formed on the first epitaxial layer where the second epitaxial layer is electrically connected to the second semiconductor layer. The first epitaxial layer and the second epitaxial layer form parallel doped regions along the sidewalls of the trenches, each having uniform doping concentration. The second epitaxial layer has a first thickness and a first doping concentration and the first epitaxial layer and a mesa of the first semiconductor layer together having a second thickness and a second average doping concentration where the first and second thicknesses and the first doping concentration and second average doping concentrations are selected to achieve charge balance in operation.

Abstract: A transmission line pre-emphasis circuit includes a primary signal path receiving a digital data stream and generating a primary output current indicative of the digital data stream, one or more secondary signal paths each incorporating a network implementing a specific transient response where the one or more secondary signal paths receive the digital data stream and generate secondary output currents representing one or more overshoot signals indicative of the transient response of the respective network. The one or more secondary signal paths have variable gain being programmed through respective DC programming signals. The secondary output currents are summed with the primary output current. The transmission line pre-emphasis circuit further includes an output loading stage coupled to generate from the summed current a pre-emphasized digital output signal indicative of the one or more overshoot signals added to the digital data stream.

Abstract: A semiconductor device has a substrate with a die attach area. A conductive layer is formed over a surface of the substrate and extending below the surface. An insulating layer is formed over the surface of the substrate outside the die attach area. A portion of the conductive layer is removed within the die attach area to expose sidewalls of the substrate. The remaining portion of the conductive layer is recessed below the surface of the substrate within the die attach area. A semiconductor die has bumps formed over its active surface. The semiconductor die is mounted to the substrate by bonding the bumps to the remaining portion of the first conductive layer recessed below the first surface of the substrate. The sidewalls of the substrate retain the bumps during bonding to the remaining portion of the conductive layer. An encapsulant is deposited between the semiconductor die and substrate.

Abstract: A semiconductor device has a carrier. A semiconductor wafer including a semiconductor die is mounted to the carrier with an active surface of the semiconductor die facing away from the carrier. A plurality of bumps is formed over the active surface of the semiconductor die. An opening is formed in a periphery of the semiconductor die. An encapsulant is deposited over the carrier and semiconductor die, in the opening, and around the plurality of bumps such that an exposed portion of the plurality of bumps is devoid of encapsulant. A conductive via is formed through the encapsulant, within the opening, and extends to the carrier. A conductive layer is formed over the encapsulant and electrically connects to the conductive via and the exposed portion of the plurality of bumps. The carrier is removed to expose an end of the conductive via.

Abstract: A semiconductor device has a leadframe with a plurality of bodies extending from the base plate. A first semiconductor die is mounted to the base plate of the leadframe between the bodies. An encapsulant is deposited over the first semiconductor die and base plate and around the bodies of the leadframe. A portion of the encapsulant over the bodies of the leadframe is removed to form first openings in the encapsulant that expose the bodies. An interconnect structure is formed over the encapsulant and extending into the first openings to the bodies of the leadframe. The leadframe and bodies are removed to form second openings in the encapsulant corresponding to space previously occupied by the bodies to expose the interconnect structure. A second semiconductor die is mounted over the first semiconductor die with bumps extending into the second openings of the encapsulant to electrically connect to the interconnect structure.