Patents Represented by Attorney R. Bruce Brodie
  • Patent number: 6021463
    Abstract: In a subsystem for accessing addressable ECC-coded sectors of magnetic disk tracks subject to sector level redundancy group organization, a method is described for managing write updates to said sectors by maintaining a current set of all redundant sectors in a subsystem NVS buffer external to the DASD such that only a read access of the DASD sector to be modified need be made. This derives from the availability of the new record data and the old redundant sector information at the subsystem. The redundant sector is modified by logically combining the old redundant sector and the new and old data sectors and is saved to the buffer and asynchronously copied to DASD subsequently.
    Type: Grant
    Filed: September 2, 1997
    Date of Patent: February 1, 2000
    Assignee: International Business Machines Corporation
    Inventor: Karl Arnold Belser
  • Patent number: 5946328
    Abstract: A method and means for enhancing the error detection and correction capability obtained when a plurality of data byte strings are encoded in a two-level, block-formatted linear code using codeword and block-level redundancy by logically summing the data byte strings and mapping the logical sum and the data byte strings into counterpart codewords including codeword check bytes in accordance with the same linear error correction code. Next, the codewords are logically summed. The codewords and their logical sum are interleaved in a predetermined pattern prior to being recorded on a storage device or the like. On read back, the codewords of a block and their logical sum are syndrome processed to resolve any identified errors within the correction capability of any single word and any errors within the correction capability of any single word and block-level redundancy, and to provide signal indication when the correction capacity has been exceeded.
    Type: Grant
    Filed: November 17, 1997
    Date of Patent: August 31, 1999
    Assignee: International Business Machines Corporation
    Inventors: Charles Edwin Cox, Martin Hassner, Ralf Kotter, Arvind Patel
  • Patent number: 5942005
    Abstract: A computationally and storage efficient method and means for correcting errors and erasures in linear cyclic coded data, especially Reed-Solomon codes, in which erasure values are ascertained exclusively as a function of syndromes and derived error location polynomials without recourse to computation of intermediate error or erasure values.
    Type: Grant
    Filed: April 8, 1997
    Date of Patent: August 24, 1999
    Assignee: International Business Machines Corporation
    Inventors: Martin Hassner, Ralf Kotter, Tetsuya Tamura
  • Patent number: 5928363
    Abstract: A method in which unauthorized persons can be excluded from accessing an HTTP-compliant, server-based application through a client processor when the session is suspended. The method requires that authenticated access is initially bound to the application and client reauthentication by the application is required in order to resume. For persistent unauthorized users, the client processor is bound to a substituted logical partition at the server that emulates a session, notifies security, and logs the activity as evidence.
    Type: Grant
    Filed: August 27, 1997
    Date of Patent: July 27, 1999
    Assignee: International Business Machines Corporation
    Inventor: Joann Ruvolo
  • Patent number: 5930497
    Abstract: A method and means for emulating realistic access requests used in static or dynamic performance testing of a disk-based storage subsystem. The method and means are based on the fact that a test driver can substitute for an actual application if an executing process generates a pattern of accesses to disk subsystem addresses as a prescribed random walk function among a cluster of contiguous tracks associated with the process. The access pattern will emulate both locality of referencing and the fact that the likelihood of rereferencing the same track varies inversely over time.
    Type: Grant
    Filed: December 11, 1997
    Date of Patent: July 27, 1999
    Assignee: International Business Machines Corporation
    Inventors: Neena A. Cherian, Bruce McNutt
  • Patent number: 5920695
    Abstract: A method for establishing bilateral communications over a single ESCON link coupling a pair of control units. The method steps include (a) permitting link address acquisition between directly connected link-level facilities that simultaneously assume the role of a master control unit in a peer-to-peer remote copy (PPRC) configuration, (b) resolving conflicting device-level frames that initiate a path to a device (also termed an I/O connection), and (c) dynamically determining the role assumed by a link-level facility (master or slave) when a single logical path is shared.
    Type: Grant
    Filed: January 10, 1997
    Date of Patent: July 6, 1999
    Assignee: International Business Machines Corporation
    Inventors: Roger Gregory Hathorn, Bret Wayne Holley, James Lincoln Iskiyan, William Frank Micka
  • Patent number: 5915039
    Abstract: Fixed-pitch, fixed-font characters embedded in a noisy gray-scale image of picture elements (pels) within a complex background can be extracted prior to execution of any recognition operations by first deriving a normalized Boolean-coded image from the gray-scale image. Then, a subset of at least three uncontaminated character triples is formed by filtering the Boolean-coded image. Next, an affine transform is approximated from locations in the Boolean-coded image of at least three noncollinear ones of the uncontaminated character triples. Lastly, the locations in a logical matrix array of all possible character triples are estimated according to the affine transform.
    Type: Grant
    Filed: November 12, 1996
    Date of Patent: June 22, 1999
    Assignee: International Business Machines Corporation
    Inventors: Raymond Amand Lorie, Jianchang Mao, Kottappuram Mohamedali Mohiuddin
  • Patent number: 5903409
    Abstract: By matching raised hard contact areas on predetermined locations of the actuator/arm/suspension assembly opposite counterpart dedicated tracks or zones, then data track damage can be avoided, otherwise resulting from shock imposed on a disk drive when the disk drive is nonoperational. Such placement permits tradeoffs among the length and power of the error correction code, and the disk area reserved to dedicated tracks or zones.
    Type: Grant
    Filed: January 17, 1997
    Date of Patent: May 11, 1999
    Assignee: International Business Machines Corporation
    Inventors: Donald Giles Allen, Robert A. Holleran, Kirk Barrows Price
  • Patent number: 5875479
    Abstract: A volume-to-volume copy method on a DASD storage subsystem concurrent with host CPU application execution and referencing of data on a primary. In this method, updates to data made on a primary volume after the element was copied during a first pass will be deferred and copied only during a second pass rather than interrupting the first pass. This accumulation and deferral of updates to a second pass shortens the volume copy time and reduces application referencing delay.
    Type: Grant
    Filed: January 7, 1997
    Date of Patent: February 23, 1999
    Assignee: International Business Machines Corporation
    Inventors: Lawrence Carter Blount, Carol Santich Michod
  • Patent number: 5859986
    Abstract: A method and means for efficiently utilizing bus bandwidth among processors and input/output devices burst coupled in master/slave pairs over a clocked, arbitrated, bidirectional, multistate, local communications bus. The method resynchronizes arbitrated masters and selected slaves perturbed during their bus-coupled transactions by recirculating data during a write operation at a bus master in the absence of a slave acceptance signal, or recirculating by a slave in the absence of a master response. The recirculating master or slave responsive to a delayed indication from its passive opposite then sends out the data over the bus at an integral multiple of the clock rate.
    Type: Grant
    Filed: February 20, 1997
    Date of Patent: January 12, 1999
    Assignee: International Business Machines Corporation
    Inventor: George B. Marenin
  • Patent number: 5832005
    Abstract: A method and means in a stored, program-controlled machine to maintain an uninterrupted access and copying of simple parity-coded words of an initial program load (IPL) or other software from a read-only memory or a memory with limited rewrite capability in the presence of detectable errors, erasures, or faults. The method utilizes detected parity error in a word copied out from storage to modify the address register to seek the same word from a mirror address of an image copy of the IPL. The image copy is stored at a second range of consecutive memory address nonintersecting and symmetric with the address range of the original IPL. The IPL is then accessed in the second address range until either another parity error causes a switch back to the original IPL or the program terminates.
    Type: Grant
    Filed: December 11, 1997
    Date of Patent: November 3, 1998
    Assignee: International Business Machines Corporation
    Inventor: Shanker Singh
  • Patent number: 5816724
    Abstract: In the present invention, the platen bar is compositely formed of three materials. For a sole layer, a material is used which has high hardness and strength, and has a property that the repulsion against the impact of the print wires is large. For an elastic layer, a material is used which transmits less vibration to the platen base in the print operation and absorbs the impact when the wires of a printhead strike the sole layer. For platen bases, a material is used which has a very high hardness, a high molding precision, and less dimensional change due to temperature change or change with time. The elastic layer is exposed on the surface and a gap roller is positioned at the exposure location. With this, the occurrence of the dent by the gap roller can be prevented when the printing on a copy form is performed.
    Type: Grant
    Filed: May 28, 1997
    Date of Patent: October 6, 1998
    Assignee: International Business Machines Corporation
    Inventors: Toshiki Hada, Hiroyuki Takenoshita, Tsutomu Sawa
  • Patent number: 5793091
    Abstract: A parallel architecture of quantum logic gates and quantum communication channels is provided for a quantum computer, thereby achieving advantageous efficiency and computation speed. The architecture of the invention enables parallel memory operations on large quantum words, and permits the application, to the quantum case, of parallel algorithms for mathematical operations such as addition and multiplication. The invention also includes a novel apparatus for realizing parallel architecture using an array of miniature elliptical ion traps, with as many traps as there are bits in a quantum word. The ion trap array preferably uses an elliptical planar geometry, which can microfabricated by photolithography. Quantum information is transferred from one ion trap to another by either an optical coupling via a high finesse resonant cavity (photon coupling) or by electrostatic coupling of the ions' mechanical motion (phonon coupling).
    Type: Grant
    Filed: December 13, 1996
    Date of Patent: August 11, 1998
    Assignee: International Business Machines Corporation
    Inventor: Ralph Godwin Devoe
  • Patent number: 5777704
    Abstract: An arrangement for enhancing the observability of a multicolored liquid crystal display in a computer of the notebook type using an arrangement in which the top lid of the laptop is mechanically separated into a diffuser/reflective surface and the LCD in its frame, the diffusing/reflecting lid is attached through a slider and linkage arrangement permitting the diffuser/reflector to act as a flat field illuminator and to move in a plane, apart from, yet forming a dihedral angle with the plane of the LCD. The lid so positioned can opportunistically reflect ambient light through the plane of the LCD. Also, by causing the lid to project over the plane of the LCD, it secures a contrast-maintaining shadow otherwise bleached by light incident to the LCD viewing surface.
    Type: Grant
    Filed: October 30, 1996
    Date of Patent: July 7, 1998
    Assignee: International Business Machines Corporation
    Inventor: Edwin Joseph Selker
  • Patent number: 5717893
    Abstract: A method for managing a cache hierarchy having a fixed total storage capacity is disclosed. The cache hierarchy is logically partitioned to form a least recently used (LRU) global cache and a plurality of LRU destaging local caches. The global cache stores objects of all types and maintains them in LRU order. In contrast, each local cache is bound to objects having a unique data type T(i), where i is indicative of a DataType. Read and write accesses by referencing processors or central processing units (CPU's) are made to the global cache. Data not available in the global cache is staged thereto either from one of the local caches or from external storage. When a cache full condition is reached, placement of the most recently used (MRU) data element to the top of the global cache results in an LRU data element of type T(i) being destaged from the global cache to a corresponding one of the local caches storing type T(i) data.
    Type: Grant
    Filed: May 20, 1991
    Date of Patent: February 10, 1998
    Assignee: International Business Machines Corporation
    Inventor: Richard Lewis Mattson
  • Patent number: 5675767
    Abstract: A method for dynamically detecting loss of map integrity in a form of system-managed storage (SMS). In SMS, maps are used to define access paths to data and to allocate and reallocate storage resources among applications running thereon. The method steps include incorporating as an indivisible part of an overwriting commmand the duplication of map information by appending a portion of it to each data block in store, and detecting loss of map integrity as a function of a comparison mismatch between the portion stored with a counterpart data block and the map upon each read/write access.
    Type: Grant
    Filed: November 10, 1992
    Date of Patent: October 7, 1997
    Assignee: International Business Machines Corporation
    Inventors: Robert Baird, Thomas Beretvas, Gerald Parks Bozman, Richard Roland Guyette, Paul Hodges, Alexander Stafford Lett, James Joseph Myers, William Harold Tetzlaff
  • Patent number: 5644695
    Abstract: An apparatus and method for detecting and locating up to two symbols in error or erasures in an n.times.m A(n,m,t) parity coded bit array previously recorded on a multi-track storage device where n is a prime number, m.ltoreq.n, wherein at least one non-zero syndrome of m rotated and column summed syndromes is derived. The method includes an iterative process using an incremented tracking variable and testing of the cyclic equivalence of three derived vectors to isolate the number and location of the array column or columns containing the error or errors. Each derived vector is the modulo 2 sum of a selected syndrome and a selected rotated vector. Cyclic equivalence of between a derived vector and a selected rotated one of the other derived vectors for any given iteration establishes the error or errors and their column location or locations. An extension is shown for detecting and locating up to three errors or erasures.
    Type: Grant
    Filed: July 15, 1994
    Date of Patent: July 1, 1997
    Assignee: International Business Machines Corporation
    Inventors: Mario Blaum, Alexander Vardy
  • Patent number: 5608890
    Abstract: A method and means for dynamically managing access by data sets to an LRU disciplined DASD cache staging data sets. A threshold utilizes the inverse of slowly varying global hit ratios (ST) taken over a large number of data sets to control the access by individual data sets in cache as measured by their local hit ratios (DSHR). After an initial trial period, a data set is allowed access to the cache only where DSHR>ST. The method and means are self adjusting in that as I/O demand changes, ST also changes in phase such that an increase in aggregate demand for cache results in elimination of data sets whose DSHRs were marginally equal to the old ST and now less than the new ST. Utilization of a DASD Fast Write and non-volatile store (NVS) can be managed similarly if coordinated with the cache and maintenance of both a global WRITE threshold (WR), local data set write hit ratio (DSHRW), and invocation of Fast Write only where DSHRW>WT (write threshold).
    Type: Grant
    Filed: April 6, 1995
    Date of Patent: March 4, 1997
    Assignee: International Business Machines Corporation
    Inventors: Jeffrey A. Berger, Stanley C. Kurtz
  • Patent number: 5506979
    Abstract: Variable length records can be accessed from an array of N+2 synchronous fixed block formatted DASDs in a single pass and in the presence of a single DASD failure if each record is partitioned into a variable number of K fixed length blocks, the blocks are written on the DASDs in column major order K modulo (N+1), the order is constrained such that the first block of each record resides on the (N+l)st DASD, a parity block for each column resides on an (N+2)nd DASD, and each parity block spans N blocks in the same column from the first N DASDs and one block one column offset thereto on the (N+1)st DASD.
    Type: Grant
    Filed: April 2, 1991
    Date of Patent: April 9, 1996
    Assignee: International Business Machines Corporation
    Inventor: Jaishankar M. Menon
  • Patent number: 5504857
    Abstract: A computer implemented method for robustly copying pages to system managed storage in order to maintain data in a consistent state and in order to provide continuous access availability of the pages to executing applications. The method achieves data consistency by atomically shadow copying application referenced pages and amending directories in a failure independent medium on (1) an access path interrupt as well as on (2) a page update basis. Availability is enhanced by duplexing the pages and directories as part of the atomic shadow copying step.
    Type: Grant
    Filed: March 4, 1993
    Date of Patent: April 2, 1996
    Assignee: International Business Machines
    Inventors: Robert Baird, Gerald P. Bozman, George Eisenberger, Albert Kamerman, Alexander S. Lett, John J. McAssey, James J. Myers, William H. Tetzlaff, Pong-sheng Wang