Patents Represented by Attorney R. Bruce Brodie
  • Patent number: 5499354
    Abstract: Dynamic allocation of read cache space is allocated among bands of DASD cylinders rather than to data sets or processes as a function of a weighted average hit ratio to the counterpart cache space. Upon the hit ratio falling below a predetermined threshold, the bands are disabled for a defined interval as measured by cache accesses and then rebound to cache space again.
    Type: Grant
    Filed: May 19, 1993
    Date of Patent: March 12, 1996
    Assignee: International Business Machines Corporation
    Inventors: John G. Aschoff, Jeffrey A. Berger, David A. Burton, Bruce McNutt, Stanley C. Kurtz
  • Patent number: 5490269
    Abstract: A computer implemented method for speeding up the recursive most significant digit radix sorting of a set of record keys in which the keys are scanned for a shared or common prefix, coded according to the point in the key where they differ and the value of the differing digit, and processed such that during each dispersion phase the code words are used to speed processing by avoiding comparison matching of the prefixes, the recursive dispersion and collection phases continuing until singletons are reached. In the absence of shared prefixes the keys are normally recursively radix sorted.
    Type: Grant
    Filed: January 13, 1993
    Date of Patent: February 6, 1996
    Assignee: International Business Machines Corporation
    Inventors: Oded Cohn, Shmuel Gal, Yona Hollander, Dafna Sheinwald
  • Patent number: 5455946
    Abstract: A method and means for achieving files of modifiable pages in a log based phased commit transaction management system (TMS) in which those pages which have been modified since the last full or incremental backup donot require during the copy operation any modifications to the page itself but merely to a common status page. This is accomplished by management of a pair of global log sequence numbers. Comparison between a first number (ICBU.sub.-- LSN) and each data page LSN as the page is modified permits the common status page to be updated to correctly reflect the changed status. Subsequent modifications to the same page donot require amendment of the status page. The status page indicia are reset as part of the backup procedure and for ascertaining the page copy set for incremental copying. The ICBU LSN assumes one of two values as a function of the copy operation and another value for processing page modifications after the copy operation. A second number (ICRF.sub.
    Type: Grant
    Filed: May 21, 1993
    Date of Patent: October 3, 1995
    Assignee: International Business Machines Corporation
    Inventors: Chandrasekaran Mohan, Inderpal S. Narang
  • Patent number: 5454099
    Abstract: A CPU implemented method for managing the backup copying of data sets residing in non-volatile storage and for the recovery thereof in the event of CPU failure. The first step is to invoke a modified incremental backup copy policy using a small backup window and less data than that heretofore used in full, incremental or mixed policies. That is, a backup copy is made to a first designated part of non-volatile storage of only those data sets in a storage group satisfying a pair of adjustable parameters relating the last backup date, the last update, and the current date. The second step occurs during a recovery cycle in the event of CPU failure wherein the backed up datasets are copied from said first designated part into a second designated part of non-volatile storage.
    Type: Grant
    Filed: July 25, 1989
    Date of Patent: September 26, 1995
    Assignee: International Business Machines Corporation
    Inventors: James J. Myers, Pong-Sheng Wang
  • Patent number: 5446871
    Abstract: A method and system for asynchronous remote data duplexing at a distant location from copies based at a primary site storage subsystem, which copying is non-disruptive to executing applications, and further in which any data loss occasioned by losses in flight or updates never received at the time of any interruption between the primary and remote sites are accounted for at the remote site. The method assigns a token and unique sequence number responsive to each write operation at the primary site, and sends the tokens+numbers and data updates to the remote site. The method relies upon the sequence number to establish a sequency and define gaps therein to ascertain missing updates.
    Type: Grant
    Filed: March 23, 1993
    Date of Patent: August 29, 1995
    Assignee: International Business Machines Corporation
    Inventors: Robert W. Shomler, James E. McIlvain
  • Patent number: 5434992
    Abstract: A method and means is disclosed for dynamically partitioning an LRU cache partitioned into a global cache storing referenced objects of k different data types and k local caches storing objects of a single type. Referenced objects are stored in the MRU position of the global cache and overflow is managed by destaging the LRU object from the global to the local cache having the same data type. Dynamic partitioning is accomplished by recursively creating and maintaining from a trace of objects an LRU list of referenced objects and associated data structures for each subcache, creating and maintaining a multi-planar array of partition distribution data from the lists and the trace as a collection of all possible of maximum and minimum subcache sizing, optimally resizing the subcache partitions by applying a dynamic programming heuristic to the multiplanar array, and readjusting the partitions accordingly.
    Type: Grant
    Filed: September 4, 1992
    Date of Patent: July 18, 1995
    Assignee: International Business Machines Corporation
    Inventor: Richard L. Mattson
  • Patent number: 5430744
    Abstract: A Viterbi decoder having a recursive processor modified to process each node in a trellis of a partial response coded signal to shift the branch metric additions over the node to effectuate compare, select, add operation order on the predecessor survivor metrics terminating in that node, to compare the metrics of the predecessor sequences terminating in the node, to select a survivor sequence, and to add the shifted branch metrics to the metric of the selected survivor sequence.
    Type: Grant
    Filed: September 30, 1993
    Date of Patent: July 4, 1995
    Assignee: International Business Machines Corporation
    Inventors: Gerhard P. Fettweis, Razmik Karabed, Paul H. Siegel, Hemant K. Thapar
  • Patent number: 5422995
    Abstract: A method and means which upon detecting indicia embedded in a decoded run length coded bit string skips over a range of bit memory mapped addresses thus reducing the number of write operations into a counterpart bit mapped memory. The coded indicia include portions which specify a skip and a skip range for storage locations in said bit mapped memory.
    Type: Grant
    Filed: March 16, 1993
    Date of Patent: June 6, 1995
    Assignee: International Business Machines Corporation
    Inventors: Yutaka Aoki, Yuji Gohda, Darwin P. Rackley
  • Patent number: 5418921
    Abstract: A method and means using a fast write in order to eliminate DASD time from the write response time as seen by the host; eliminate some DASD writes due to overwrites caused by later host writes to previously updated blocks in cache; and reduce DASD seeks because destages will be postponed until many destages can be done to a track or cylinder. This is effectuated by destaging from the cache only the least recently referenced original or updated block and all other original or updated blocks occupying the same logical track and ordered in a predefined lower LRU range, the destage being initiated responsive to a cache miss. The destaging step is selectable from a set of destaging steps varying in their robustness.
    Type: Grant
    Filed: May 5, 1992
    Date of Patent: May 23, 1995
    Assignee: International Business Machines Corporation
    Inventors: James E. Cortney, Jaishankar M. Menon
  • Patent number: 5418940
    Abstract: A method for detecting partial page writes in pages spanning multiple sectors of a sector organized multiple tracked storage facility in a page oriented, log based transaction management system. During a page write to storage from a buffer, a status bit is embedded at the end of each page sector and a status byte in the last page sector, the status byte is complemented, and each status bit is swapped with a counterpart in the status byte as it is being written out to storage. During a page read in the buffer from storage the status bit values of each page are swapped with their byte counterpart and a partial write detected as a mismatch of the bits in the status byte. Page recovery involves recreating a page from said log upon detection of either a partial sector write or a partial page write by redoing all accessing events on the log between a predetermined point to an end of log including unconditionally redoing of all format page events logged in said interval.
    Type: Grant
    Filed: August 4, 1993
    Date of Patent: May 23, 1995
    Assignee: International Business Machines Corporation
    Inventor: Chandrasekaran Mohan
  • Patent number: 5416915
    Abstract: A method and system for minimizing seek affinity and enhancing write sensitivity in a direct access storage device (DASD) array are disclosed. SEEK affinity and WRITE efficiency are preserved in which logical cylinders, as recorded on the DASD array, are managed as individual log structured files (LSF). Tracks or segments of data and parity blocks having the same or different parity group affinity and stored on the same or different DASD cylindrical addresses are written into a directory managed buffer. Blocks having the same parity affinity and written to counterpart cylinders are written out from the buffer to spare space reserved as part of each DASD cylinder. Otherwise, blocks are updated in place in their DASD array location.
    Type: Grant
    Filed: December 11, 1992
    Date of Patent: May 16, 1995
    Assignee: International Business Machines Corporation
    Inventors: Richard L. Mattson, Jaishankar M. Menon
  • Patent number: 5414842
    Abstract: If a real memory-backed demand paging virtual store is used as a work device in an external sort, then data movements and processing time are substantially less than that for processing the same external sort in either an internal (real) memory or DASD serving as the work device. Also, reblocking of generated partial sort strings during the sort phase and of the totally ordered string during the merge phase is avoided. The optimum ratio of internal (real) memory backing to the virtual store lies between 30-80 percent. Page faulting is reducible as a consequence of the fact that in the external sorting using the virtual store as a work device, a data element need only be referenced twice.
    Type: Grant
    Filed: January 22, 1993
    Date of Patent: May 9, 1995
    Assignee: International Business Machines Corporation
    Inventors: Gary D. Archer, Douglas R. Case, Hilda J. Wu
  • Patent number: 5379385
    Abstract: A method and means for CPU accessing a staged storage subsystem in which rules defining computation of the storage system addresses are distributed with the data, the rules and storage access being interpreted by the sub-system. The method uses local storage address computation in the DASD array context rather than CPU address list generation as has occurred in the prior art.
    Type: Grant
    Filed: November 18, 1992
    Date of Patent: January 3, 1995
    Assignee: International Business Machines Corporation
    Inventor: Robert W. Shomler
  • Patent number: 5375128
    Abstract: A method for update writing in an array of DASDs in a reduced number of DASD track cycles. The method involves distributing data and parity blocks for each parity group across the array in failure independent form and reserving unused space. During a first cycle, the old data and parity blocks are read. The new parity is calculated and shadow written into reserved unused space located before the old parity block recurs. The amended data is either written in place during a second cycle or shadow written into reserved space during a subsequent portion of the first cycle.
    Type: Grant
    Filed: October 18, 1990
    Date of Patent: December 20, 1994
    Assignee: IBM Corporation (International Business Machines Corporation)
    Inventors: Jaishankar M. Menon, James M. Kasson
  • Patent number: 5357623
    Abstract: Dynamic partitioning of cache storage into a plurality of local caches for respective classes of competing processes is performed by a step of dynamically determining adjustments to the cache partitioning using a steepest descent method. A modified steepest descent method allows unpredictable local cache activities prior to cache repartitioning to be taken into account to avoid readjustments which would result in unacceptably small or, even worse, negative cache sizes in cases where a local cache is extremely underutilized. The method presupposes a unimodal distribution of cache misses.
    Type: Grant
    Filed: November 1, 1991
    Date of Patent: October 18, 1994
    Assignee: International Business Machines Corporation
    Inventor: Igal Megory-Cohen
  • Patent number: 5351246
    Abstract: A method and means for coding an (M-1).times.M data array written onto an array of M synchronous recording paths and for rebuilding and writing onto spare recording path capacity when up to a preselected number R of array DASDs fail, or one DASD becomes erroneous and up to R-2 fail. Data is mapped into the parallel paths using an (M-1).times.M data and parity block array as the storage model where M is a prime number and each block extent is uniform and at least one bit in length. The (M-1).times.M data and parity block array is encoded to include zero XOR sums along a traverses of slopes 0, 1, 2, . . . , P-1, extended cyclically over said data array. Rebuilding data and parity blocks is occasioned upon unavailability of no more than R less than or equal to P recording path failures, or one recording path in error and up to R-2 recording path failures.
    Type: Grant
    Filed: January 3, 1994
    Date of Patent: September 27, 1994
    Assignee: International Business Machines Corporation
    Inventors: Miguel M. Blaum, Ron M. Roth
  • Patent number: 5341351
    Abstract: A method and means for ensuring maximal occupancy of dual actuators movable over a cyclic multitracked DASD in transferring any percentage mix of short and long records over a set of queued referencing commands by the selective serial or concurrent dispatching of actuators to the same or different records solely as a function of the ascertained actuator availability, reference queue length, and the length of the referenced record.
    Type: Grant
    Filed: October 8, 1992
    Date of Patent: August 23, 1994
    Assignee: International Business Machines Corporation
    Inventor: Spencer W. Ng
  • Patent number: 5333143
    Abstract: B-Adjacent coding is used to correct up to two DASDs in error in an array of N data DASDs and two redundant DASDs. When two of the data DASDs fail, their data can be recreated as a function of a pair of syndromes constituting up to two Boolean equations in two unknowns. Prestoring of the matrices of the powers of the polynomial terms of the code primitive together with pipeline processing operate to expedite data recovery and balance the write operations load on the DASDs across the array. Recovery from the failure of a data and a redundant DASD involves resolving one linear Boolean equation with one unknown.
    Type: Grant
    Filed: August 29, 1991
    Date of Patent: July 26, 1994
    Assignee: International Business Machines Corporation
    Inventors: Miguel M. Blaum, Norman K. Ouchi
  • Patent number: 5319782
    Abstract: A method for synchronizing the dispatching of tasks from a CPU-based first multitasking operating system (OS) with threads of function calls opportunistically dispatched from a CPU-based second multitasking operating system. The second OS includes a set of callable resources. In the method, a task becomes bound to a thread for the duration of that thread's ownership of a callable resource from the second OS. Also, a thread becomes available on a work queue of threads for binding to a task only if the thread owns exactly one resource. After execution, the function is eliminated from the thread and ownership of that resource is relinquished and passed to the next thread queued on that resource. A task can remain bound to the same thread if there are no other threads asserting ownership to the next resource being called by the original thread. With contention, however, the task relinquishes the thread and becomes bound to another thread on the work queue.
    Type: Grant
    Filed: February 16, 1993
    Date of Patent: June 7, 1994
    Assignee: International Business Machines
    Inventors: Steven H. Goldberg, Gerald W. Holten, Jerome A. Mouton, Jr.
  • Patent number: 5301290
    Abstract: A computer implemented method for minimizing the grant of pages locks and the number of outstanding locks while ensuring consistency of the copies of pages resident among a first, and a second data cache with the original pages in shared external storage. A first processor requesting a lock on a designated page is granted a lock over the group of pages including the designated page in the absence of a concurrent lock to the page or group held by another processor. Any changed page is copied through to external storage. Otherwise, a processor intending to alter a page causes a global lock manager to notify concurrent lock holders, invalidate copies of the page in their local caches, and obtain an exclusive lock to the requesting process for the duration of its operation on the page. After this the lock is demoted to share and the changed page also copied through to external storage.
    Type: Grant
    Filed: March 14, 1990
    Date of Patent: April 5, 1994
    Assignee: International Business Machines Corporation
    Inventors: William H. Tetzlaff, Jay H. Unger