Abstract: A method and means for encoding data written onto an array of M synchronous DASDs and for rebuilding onto spare DASD array capacity when up to two array DASD fail. Data is mapped into the DASD array using an (M-1)*M data array as the storage model where M is a prime number. Pairs of simple parities are recursively encoded over data in respective diagonal major and intersecting row major order array directions. The encoding traverse covering a topologically cylindrical path. Rebuilding data upon unavailability of no more than two DASDs merely requires accessing the data array and repeating the encoding step where the diagonals are oppositely sloped and writing the rebuilt array back to onto M DASDs inclusive of the spare capacity.

Abstract: A method and apparatus are disclosed which minimize the additional read and write loading for each remaining DASD in a DASD array occasioned by a single point of failure where subsets of DASDs may accessed asynchronously (RAID 4 or RAID 5). In this method, parity groups are written across the array in a pattern forming a balanced incomplete block design or the equivalent. In the event of failure of a DASD in the array, then any additional loading resulting from the failure is uniformly spread among the remaining DASDs.

Abstract: A method and means for managing access to a logical track of KN blocks of which K are parity blocks. The KN blocks are distributed and stored in an array of N DASDs having K blocks per physical track per DASD. The array includes control means for securing synchronous access to selectable ones of the DASDs responsive to each access request. The method involves (a) formatting the blocks onto the array using a row major order modulus as the metric for balancing the data rate and concurrency (the number of DASDs bound per access) and (b) executing the random sequences of large and small access requests over the array.

Abstract: A method for managing space re-use with respect to the indices (nodes) of shadow written tree organized dynamic random accessed files/records/pages located in the external store of a CPU. The method reserves space in all non-leaf nodes and maintains a list of available node addresses. When a new node is required then space, if available, is obtained from the parent node list. Only when the parent list becomes exhausted is space (node) obtained from a node inventory manager. Deletion of a node causes its address to be placed on the free or available list maintained by that node's parent. If there is no space, then space on the parent node list is obtained by returning to the inventory manager that node on the list having the least locality with the existing subordinate (children) nodes of the parent.

Abstract: A method and means in which data and parity blocks forming parity groups together with spare blocks are distributed over array block locations according to at least one combinatorial design, each group having N data and P parity blocks. The combinatorial designs yield uniform or balanced loading thereby minimizing the number of accesses to reconstruct missing data and parity blocks and their copyback into spare block locations, and, minimize the number of accesses to the reconstructed data referenced subsequent to its copyback. Distributions of the spare block capacity of one or two DASDs are shown over single and multiple arrays and shared among multiple arrays. Parity block distribution although ancillary to spare distribution enhances throughput and reduces the number of accesses for rebuild etc.

Abstract: Write update of variable length records stored in row major order on an array of N DASDs is facilitated by utilizing the correlation between byte offsets of a variable length record and the byte offset of a byte level parity image of data stored on the same track across N-1 other DASDs.

Abstract: A conditional broadcast or notification facility of a global lock manager is utilized to both serialize access to pages stored in local caches of counterpart processors in a distributed system and to ensure consistency among pages common to the caches. Exclusive use locks are obtained in advance of all write operations. When a page is to be updated, which page is cached in a processor other than that of the requester, then a delay is posed to the grant of the exclusive lock, all shared use lock holders to the same page notified, local copies are invalidated, exclusive lock granted, page is updated and written through cache, after which the lock is demoted to shared use.

Abstract: Processors communicatively attaching a storage sub-system and which place a message on a queue no longer have to wait on a queue lock set by another processor or sub-system dequeuing a message. This is realized by use of a double ended linked list or queue of messages having an isolation/reference point wherein an enqueuing end of the list is lockable and accessible independently from the dequeuing end of the list. The locking primitive may be of the multi-processor lock synchronizing atomic type such as TEST AND SET.

Abstract: A computer-implemented method for the name-oriented accessing of files having at least zero records, any access path to files and records through an external store coupling the computer being defined by a pair of related directories. A first directory of record entries is sorted on a two-part token. The token consists of a unique sequence number assigned to the record and the sequence number of any parent record entry. Each record entry includes the token, file or record name, and external store address or pointer A traverse through the tokens constitutes a leaf-searchable B-tree.Rapid access to target records is by way of a name-sorted, inverted directory of names and tokens as a subset and which is reconstitutable from the first directory in the event of unavailability.

Abstract: One or more data-storing disk devices support logical tracks extending between radial recording zones of tracks in the device(s). Each data-storing disk in the device(s) is formatted into a plurality of radial recording zones of physical tracks, each radial recording zone having a like number of physical tracks, each physical track may be one circumvolution of a single spiral track. The physical tracks in the respective recording zones store a different number of data bytes. Each logical track including a plurality of said physical tracks; at least one of the physical tracks in each of the logical tracks is in a different one of the radial recording zones in different ones of the devices or in a single device. Described are an extended logical track and extended logical cylinder accessing methods and apparatus. Not all of the physical tracks of any of the devices or recording zones need be a member of any logical track.

Abstract: A computer implemented method by which trace data from concurrently executing virtual processors is reformatted and organized as a linked list of successive events evoking parallel activity for any given parallel task. A selective traverse of the links operates to drive time process displays of processor utilization and executing hierarchy of parallel constructs.

Abstract: A method for maintaining switchover between a backup and degrading active processor, which switchover is transparent to a terminal accessing the active processor with atomic transactions. The backup processor prepares for an outage by the active processor by synchronizing, tracking, and monitoring the active processor's log entries. When the active processor fails, the backup processor performs the necessary recovery processing and takes over user-transactions processing as the new active processor.

Abstract: A method for substituting interpolated values for ambiguous symbols in an arithmetically encoded symbol string, symbols in the unencoded original string being drawn from a Markov source and a finite alphabet. Ambiguity of a symbol is defined as where its symbol occurrence statistic lies outside of a predetermined range. Interpolation involves selectively combining the occurrence statistics of symbols adjacent the ambiguous symbol and recursively and arithmetically encoding the combined statistics. The method otherwise encodes unambiguous symbols in a conventional arithmetic manner. The decoding duals are also described.

Abstract: A method performed within a multi-processing, multi-programming computer environment for reducing conflict among tasks concurrently accessing COMMON BLOCKs in code sequences compiled within said environment from a FORTRAN like language system, and for reducing the memory used in the storing of private copies of said COMMON BLOCKs. The method involves inserting constructs at compile time into the compiled code which enable the COMMON BLOCKs to be dynamically bound at runtime to two or more referencing tasks. Then, at execution time responsive to the constructs, the blocks are bound to the tasks dynamically and scoped so that they lie within the dynamic nesting of the tasks.

Abstract: A method to manage the access of data or pages mapped into a very large virtual external address space through a cache without disturbing the logical view of the data and without having to assign physical or real backing store to said logical view. A data cache is used in which pages are indexed according to a logical address intermediate to their virtual address and their physical location in external storage. Pages common to two or more files are updated in place in the cache, while pages bound to only one file are shadow copied.

Abstract: A method for maintaining the integrity of ties and their associated tie groups in a CPU-based, layered communications subsystem in which the connection endpoints in each layer are denoted by a connection control block (CCB), the relationship between CCBs being denoted by ties. Ties and their CCBs can be mapped onto an edge-oriented graph of tie group relations. The arbitrary removal of an edge (tie) in the graph compromises graph integrity by possible formation of unenumerated subgraphs or independent graphs.The solution involves enumerating those edges having vertices which no longer reference CCBs within the tie group, removing them, and forming a second tie group. The enumeration is conducted over a Eulerian traverse of the remaining n edges of the graph. A Eulerian traverse of a graph is one which traverses each edge exactly once. Such a traverse reduces the number of comparisons M to a range N<M<O(N.sup.2).

Abstract: A method for increasing throughput of N-way central electronic complexes concurrently executing processes to selectively lockable data resources while maintaining coherency among replicates of the information state of any accessed resource. Throughput is increased by overlapping a resource lock request with the processing incidental to accessing the resource. Processes are granted locks to portions of the resource based on the interest state held by the central electronic complex in the resource. Messages are attached to locked resources and are distributed to the appropriate complexes by virtue of a list maintained by the central electronic complex holding sole interest in the resource. The central electronic complex distributing the messages must receive acknowledgement of the message reception before releasing the resource.

Abstract: A new use for an LRU-managed cache coupling the main memory of a CPU for sort string generation of m records while minimizing the number of reference misses per record to said cache is described. During a first pass, a partially nested ordering or sort is effectuated using the cache, and then during a second pass a replacement selection merge upon the nested order constrained to fit within the cache is brought about.

Abstract: A pattern-matching network is merged with an existing RETE network without recompiling the whole network, while still matching existing data. Permanent, temporary, full and partial merging operations are described, depending on the origination of match patterns among LHS, on demand (procedural programming), or top level. The merge process combines functionally identical nodes from the networks for reducing the number of nodes in the resulting network. The merger process produces so-called alpha and beta synapse nodes; alpha synapse nodes have pointers to top nodes, while beta synapse nodes consist pointers to a drain node, which is a node in the grafted RETE portions of the resulting network and to source memory nodes in the pre-existing RETE network. The algorithm for obtaining a set of synapse nodes without duplication of any logic connecting paths is described. The synapse nodes are used in updating a grafted network, also can be a suspended portion, upon completion of the merger.

Abstract: A pattern-matching system, such as of the RETE type, is updated. The updating operation is generalize to operate with correct match resuslts for generalized RETE networks (ones where join nodes may have either predecessor be another join node), and for arbitrary partial update state, characterized by stop nodes designating how far update operations have progressed for particular update tokens (designated suspended tokens) at any particular time. The updating operation consists of the following steps: First, all tokens only partially updated through the network are shadowed, in that the partial result memories associated with the stop nodes are put into the state that exists or existed before the suspended tokens arrive at the stop nodes. Then for each suspended token, it is pushed to resume nodes connected as RHS (or LHS) inputs in a descending order of resume nodes.