Patents Represented by Attorney Rabin & Berdo, P.C.
  • Patent number: 6876285
    Abstract: A high density multi-layer microcoil includes a substrate, a multi-layer coil winding, a magnetic core and a dry film photoresist structure. The multi-layer coil winding and the magnetic core are supported by the dry film photoresist structure. The fabrication process is using photolithography process to form a dry film photoresist structure with a coil tunnel having coil elements perpendicular to the substrate and two outlets at ends of the tunnel; and injecting a conductive material with a low melting point into the tunnel and forming the coil winding.
    Type: Grant
    Filed: July 23, 2002
    Date of Patent: April 5, 2005
    Assignee: Industrial Technology Research Institute
    Inventors: Morris P. F. Liang, Sway Chuang, Frank K. C. Fan, Chen Chung Kao
  • Patent number: 6874625
    Abstract: A slim storage casing able to hold two optical disks. The upper and the lower casing each have a central straddling respectively formed at the time of molding, such that two optical disks, using the-center hole of the optical disk, can be coupled to the central straddling at the upper and the lower casing respectively and stored in the storage casing. The upper and the lower casing according to the invention has a thickness of about 5 mm to 5.5 mm when coupled together.
    Type: Grant
    Filed: October 22, 2002
    Date of Patent: April 5, 2005
    Assignee: CMC Magnetics Corporation
    Inventor: Chen-Cheng Chang
  • Patent number: 6875055
    Abstract: An electrical connector includes an insulating housing with two communication ports and wrapped by a metal shield. The invention features on that the insulating housing having a sliding slot located on upper surface of the insulating housing near one of said communication port, and a fastening slot slanted bias on the insulating housing near the other communication port. The metal shield having an opening between two ends, a protruding end on one end, corresponding to the sliding slot of the insulating housing, and a fastening end, opposite to the protruding end, slants bias and corresponds to the fastening slot of the insulating housing near. The metal shield can be assembled onto the outer surface of the insulating housing rapidly and easily.
    Type: Grant
    Filed: April 20, 2004
    Date of Patent: April 5, 2005
    Assignee: Speed Tech Corp.
    Inventors: Chang-Sing Chu, Wen Lung Hsu
  • Patent number: 6872082
    Abstract: A land grid array includes a flat-plate connector plastic housing having a plurality of terminal grooves, and a plurality of terminals having a pair of contact points and disposed in the various terminal grooves, wherein the contact points serve as connecting structures between a circuit board and another circuit board, or between an integrated circuit and a circuit board. Each terminal is formed by bending an integral metal plate, and has a fixing portion, a flexible portion and a signal transmission portion. The terminal is capable of reducing overall stress, such that the signal transmission portion is easily deformed without leaving permanent deformation. Meanwhile, wiping motions by the contact points are performed between a circuit board and another circuit board, or between an integrated circuit and a circuit board for removing oxidized thin-films on contact surfaces involved.
    Type: Grant
    Filed: August 14, 2003
    Date of Patent: March 29, 2005
    Assignee: Speed Tech Corp.
    Inventors: Chien-Yu Hsu, Yen-Jang Liao, Li-Sen Chen
  • Patent number: 6872650
    Abstract: A ball electrode forming method comprises steps of: preparing a semiconductor apparatus having a plurality of electrode pads; arranging a mask having an upper surface and a lower surface, an area in the lower surface being larger than an area in the upper surface, and a plurality of openings extended from the upper surface to the lower surface, on a surface of the semiconductor apparatus having the electrode pads formed thereon so that the surface and the lower surface can face each other; arranging solder balls on the electrode pads arranged in the openings from the upper surface side of the mask; and electrically connecting the solder balls to the electrode pads to form ball electrodes. Thus, regarding a method for forming a ball electrode in a semiconductor apparatus having a BGA structure, an efficient ball electrode forming method is employed to prevent omission of a ball electrode.
    Type: Grant
    Filed: July 31, 2003
    Date of Patent: March 29, 2005
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Yasuhito Anzai
  • Patent number: 6873541
    Abstract: A nonvolatile memory cell occupying a minimum chip area is provided with a cell structure that includes two or more base materials being programmable by a heat induced chemical reaction to form a layer or layers of alloy. The formation of alloy results in a change in resistance of the cell structure so that one or more programmed states are determined. A semiconductor memory constructed by a large number of the nonvolatile memory cells can be obtained in a compact manner with simple and as few as possible steps. This process vertically stacked layers, and this semiconductor memory is thus easily to be combined with other integrated circuits on a single chip.
    Type: Grant
    Filed: June 9, 2003
    Date of Patent: March 29, 2005
    Assignee: Macronix International Co., Ltd.
    Inventors: Hsiang-Lan Lung, Rui-Chen Liu
  • Patent number: 6872494
    Abstract: A photomask for use in a semiconductor fabrication process, comprises a plurality of first mask patterns for transferring resist patterns, and second mask patterns for restraining an optical proximity effect, each having a width not larger than a resolution limit. The second mask patterns are formed in a line-like shape, and disposed so as to link together the plurality of the first mask patterns. As a result of use of the second mask patterns in the line-like shape, a fewer parameters may be added in simulation of resist patterns. Thus, it becomes possible to provide the photomask for efficiently performing simulation and forming suitable resist patterns. Further, the photomask can be used in a semiconductor fabrication process.
    Type: Grant
    Filed: May 8, 2002
    Date of Patent: March 29, 2005
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Daigo Hoshino
  • Patent number: 6871977
    Abstract: A light source portion for a backlight module that emits light to be incident on an end face of an optical waveguide. The light source portion includes a circuit board having a mounting surface, and a light emitting device having a lead terminal to be connected to the mounting surface of the circuit board and emitting light in a direction parallel to the circuit board. The light emitting device is mounted on the circuit board in such a manner that a plate thickness of the circuit board falls within a range of a thickness of the light emitting device.
    Type: Grant
    Filed: March 28, 2003
    Date of Patent: March 29, 2005
    Assignee: Rohm Co., Ltd.
    Inventor: Hideharu Osawa
  • Patent number: 6870237
    Abstract: A symmetric or asymmetric multilayer structure based on the technique of surface plasmon resonance (SPR) has been applied for modulation of resonant angle and wavelength. The fabrication of this invention can have nanoscale thin film layers up to several hundreds, while each layer has its own material of a high or low refractive index value, and the total layers in a thickness of tens to hundreds nanometers are grown in this single structure. This invention is intended for optimizing the scanning of mechanism by modulating SPR resonant angle and wavelength, and for developing the prospect of portable instruments.
    Type: Grant
    Filed: August 26, 2003
    Date of Patent: March 22, 2005
    Assignee: National Taiwan University
    Inventors: Chii-Wann Lin, Chen Kung Huang, Shiming Lin, Chih Kung Lee, Peizen Chang, Shu Sheng Lee
  • Patent number: 6870721
    Abstract: An apparatus for power source protection with automatic latch-off is provided for use in an electronic apparatus. The electronic apparatus includes a power supply and a main functional circuit, such as a notebook computer. The power supply is coupled to the main functional circuit via an electronic switching device, so as to power the main functional circuit via a power source terminal of the electronic switching device. The apparatus for power source protection with automatic latch-off includes a low-voltage-triggered latch-off device and a low-voltage-triggered responding device. The low-voltage-triggered latch-off device is coupled to the electronic switching device, so as to control the on or off state of the electronic switching device. The low-voltage-triggered responding device is coupled to the power source terminal and the low-voltage-triggered latch-off device.
    Type: Grant
    Filed: December 12, 2002
    Date of Patent: March 22, 2005
    Assignee: Quanta Computer Inc.
    Inventor: Tsung-Ta Chen
  • Patent number: 6870990
    Abstract: An optical element 1 comprises an optical substrate having a lens 2, projections 4a and 4b, and a handle 6. The lens 2 is provided to the roughly rectangular handle 6 at a predetermined position thereon, while the projections 4a and 4b are provided to the handle 6 at the respective positions separate from the lens 2 by a predetermined distance and each have a semi-cylindrical shape that extends from a bottom of the handle 6. An overall size of an arc shape of each of the projections 4a and 4b is equal to an overall size of an optical fiber with which the optical element 1 is to be coupled optically. When mounting the optical element 1 on a support substrate having a mounting groove therein, the projections 4a and 4b butt against the mounting groove, thereby positioning the optical element 1 in a direction perpendicular to an optical axis.
    Type: Grant
    Filed: June 11, 2003
    Date of Patent: March 22, 2005
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Masahiro Uekawa
  • Patent number: 6870249
    Abstract: To provide a semiconductor device that is capable of reduction in thickness and high-density mounting, and that is simple in manufacturing process and convenient for use. A wiring substrate is formed with a plurality of opening portions. In each of the opening portions, a lower chip formed by a wafer-level chip size package (WCSP) is received, and an upper chip is placed on the lower chip. The composite including them is sealed by a sealing body such as epoxy resin. Internal connection terminals of each lower chip are electrically connected to pads of the corresponding upper chip via wirings, through holes and bonding posts of the wiring substrate, and wires.
    Type: Grant
    Filed: November 28, 2003
    Date of Patent: March 22, 2005
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Yoshimi Egawa
  • Patent number: 6869829
    Abstract: A semiconductor chip (3) to be positioned with a front face thereof downward for formation of a chip-on-chip structure has electrode marks (35) provided on a back face (34) thereof. The electrode marks (35) are respectively provided in association with a plurality of electrodes (33) provided on the front face (31) of the semiconductor chip in the same arrangement as the arrangement of the electrodes (33). The arrangement of the electrode marks (35) represents the arrangement of the electrodes (33) on the front face (31) when viewed from the side of the back face (34) of the semiconductor chip 3. Therefore, the semiconductor chip (3) can easily be positioned with the front face downward on the basis of the electrode marks (35).
    Type: Grant
    Filed: August 5, 2002
    Date of Patent: March 22, 2005
    Assignee: Rohm Co., Ltd.
    Inventors: Junichi Hikita, Koji Yamamoto, Isamu Nishimura, Nobuhisa Kumamoto
  • Patent number: 6866206
    Abstract: An improved drinking fountain bubbler guard in which the guard of the invention herein is installed at an opposite angle to the front of the bubbler pedestal. The present invention is an L-shaped guard with a round bonding facet that is conjoined to the anterior extremity of the spigot cock; a gasket is postured against the guard, the spout is inserted through the gasket and then fastened into the output hole of the spigot cock such that the guard is tightly mounted onto the spigot cock. As such, the invention herein safely protects the face of served users and effectively prevents accidents, while also reducing paper cup usage and thereby complying with environmental protection objectives.
    Type: Grant
    Filed: May 20, 2003
    Date of Patent: March 15, 2005
    Inventor: Cheng-Wsiung Wu
  • Patent number: 6868113
    Abstract: A receiver for a spread spectrum communication system includes an acquiring circuit that periodically acquires a plurality of signals received via a plurality of paths from a transmitter. The receiver also includes a plurality of tracking circuits that track the synchronization of a predetermined number of signals among the plurality of signals acquired by the acquiring circuit. The receiver additionally includes a judging circuit that judges whether present and past propagation conditions of the predetermined signals tracked by the plurality of tracking circuits are good or bad. A selecting circuit is included in the receiver to select the predetermined number of signals from the plurality of signals acquired by the acquiring circuit, based upon the present and past propagation conditions of the signals judged by the judging circuit, to allow the plurality of tracking circuits to track the predetermined number of signals selected by the selecting circuit.
    Type: Grant
    Filed: March 12, 2001
    Date of Patent: March 15, 2005
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Noboru Yamashita
  • Patent number: 6867066
    Abstract: A semiconductor device provided with a shallow metal basin having a flange outwardly extending from the top edge of the side wall of the shallow metal basin, to receive a semiconductor device chip having one or more semiconductor device elements disposed therein and one or more bonding pads arranged thereon, an insulator frame having one or more external terminals arranged thereon, the external terminals being connected with the bonding pads, and the insulator frame being arranged on the flange of the shallow metal basin, and a plastic layer molded to cover the semiconductor device chip, resultantly realizing a semiconductor device packaged in a chip scale package of which the production procedure is simplified and the heat dissipation efficiency and the integration are remarkably improved.
    Type: Grant
    Filed: July 18, 2001
    Date of Patent: March 15, 2005
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Tadashi Yamaguchi
  • Patent number: 6866368
    Abstract: A process of forming a flexible circuit board for ink jetting is provided. The process includes the steps of: providing an insulation tape; forming conductive traces on the insulation tape; and forming a photo-polymer layer filling between the conductive traces, wherein parts of the conductive traces are exposed to form a plurality of contacts. The material of the insulation tape can be polyimide, Teflon, polyamide, polymethylmethacrylate, polycarbonate, polyester, polyamide polyethylene-terephthalate copolymer, or any combination of the above materials. The material of the photo-polymer layer can be solder mask or polyimide.
    Type: Grant
    Filed: March 28, 2003
    Date of Patent: March 15, 2005
    Assignee: Benq Corporation
    Inventors: Yi-Jing Leu, Chih-Ching Chen, Ming-Chung Peng
  • Patent number: 6867995
    Abstract: A read only memory device includes multiple word lines, a first and second main bit line GL (n) and BL (n), sub-bit lines SB1 (n) to SB4 (n), selection switches MB1 (n) to MB4 (n), and memory cells M1 (n) to M4 (n). The memory cells M1 (n) to M4 (n) are electrically coupled to the sub-bit lines SB1 (n) to SB4 (n) and the sub-bit line SB1 (n+1), respectively. When the memory cell M3 (n) which is connected to SB3 (n) is read, the sub-bit lines SB1 (n) to SB3 (n) are connected to the corresponding main bit lines through the turned selection switches. At this time, the sub-bit lines SB1 (n) to SB3 (n) are not floating but are all at the same high voltage level. Therefore, the capacitance effect will not exist between them to change the voltage level of the sub-bit lines quickly.
    Type: Grant
    Filed: June 10, 2003
    Date of Patent: March 15, 2005
    Assignee: Macronix International Co., Ltd.
    Inventors: Yu-Wei Lee, Sheau-Yung Shyu, Chih-Hung Wu
  • Patent number: 6865778
    Abstract: A hinge mechanism for pivotally connecting a flip onto a housing includes a bush, a spring, and a camshaft. The bush is connected to the flip and has a sidewall, a receiving space defined by the sidewall, and a protrusion. The protrusion is protruded from the sidewall. The camshaft has a first end, a second end, and a shaped notch. The shaped notch includes a first concave portion and a second concave portion, and the protrusion is slidably received within the shaped notch. The first end of the camshaft is slidably coupled to the bush, and the second end of the camshaft is restrictedly coupled to the housing. When the flip is pivoted on the housing, the bush simultaneously rotates around the pivoting axis of the hinge mechanism so that the protrusion slides within the shaped notch from the first concave portion to the second concave portion.
    Type: Grant
    Filed: February 11, 2003
    Date of Patent: March 15, 2005
    Assignee: BenQ Corporation
    Inventors: Long-Jyh Pan, Hsiao-Wu Chen
  • Patent number: D502815
    Type: Grant
    Filed: September 4, 2003
    Date of Patent: March 15, 2005
    Assignee: GIM-HWA Enterprise Co., Ltd.
    Inventor: Tso Min Wang