Patents Represented by Attorney Rabin & Berdo, P.C.
  • Patent number: 6850089
    Abstract: A capacitor-coupling acceleration apparatus is an accelerating circuit capable of being applied to interconnect lines in an integrated circuit in order to reduce delay owing to parasitic resistance and capacitance of the interconnect lines in the integrated circuit. The apparatus can be disposed between the interconnect lines. When a signal transmitted on the interconnect line has a change from a low-level voltage to a high-level voltage, the apparatus detects the voltage level change of the signal and provides a charging loop to charge the interconnect line, thereby accelerating the change from the low-level voltage to the high-level voltage. When a signal on the interconnect line has a change from the high-level voltage to the low-level voltage, the apparatus detects the voltage level change of the signal and provides a discharging loop to discharge the interconnect line, thereby accelerating the change from the high-level voltage to the low-level voltage.
    Type: Grant
    Filed: January 13, 2003
    Date of Patent: February 1, 2005
    Assignee: Industrial Technology Research Institute
    Inventors: Hong-Yi Huang, Shih-Lun Chen
  • Patent number: 6850305
    Abstract: In this invention a layout structure for a liquid crystal display, which includes a first data line, a second data line, a first scan line, a second scan line, a third scan line, and a first and second pixel. The first pixel includes a first sub-pixel, a second sub-pixel, and a third sub-pixel. The first sub-pixel is coupled to the first data line and first scan line. The second sub-pixel is coupled to the second data line and first scan line. The third sub-pixel is coupled to the second data line and second scan line. The second pixel includes a fourth sub-pixel, a fifth sub-pixel, and a sixth sub-pixel. The fourth sub-pixel is coupled to the first data line and second scan line. The fifth sub-pixel is coupled to the first data line and third scan line. The sixth sub-pixel is coupled to the second data line and third scan line.
    Type: Grant
    Filed: September 8, 2003
    Date of Patent: February 1, 2005
    Assignee: Himax Technologies, Inc.
    Inventors: Wen-Han Hsieh, Yen-Chen Chen
  • Patent number: 6849498
    Abstract: Disclosed herein is a method of manufacturing a semiconductor capacitor. In the semiconductor capacitor manufacturing method, an amorphous film composed of non-doped silicon is formed. The amorphous film is changed to a lower film having projections and depressions defined in the surface thereof by heat treatment. An amorphous film composed of impurity-doped silicon is formed over the surface of the lower film. Further, the amorphous film composed of the impurity-doped silicon is changed to an upper film having projections and depressions defined in the surface thereof by heat treatment with the projections and depressions provided over the surface of the lower film as a basis. The semiconductor capacitor is equipped with an electrode having the lower film and the upper film.
    Type: Grant
    Filed: August 7, 2002
    Date of Patent: February 1, 2005
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Hiroki Kuroki
  • Patent number: 6848937
    Abstract: A retractable extension cord housing with a low-profile plug holder retractably houses an extension cord in a hollow body and has an external surface. The plug holder comprises a plug recess, a cord groove and an optional retaining tab. The plug recess and cord groove are formed in the external surface to hold a low-profile plug and a section of the extension cord attached to the low-profile plug. Therefore, the entire retractable extension cord housing has an appearance that is neat and clean.
    Type: Grant
    Filed: September 9, 2003
    Date of Patent: February 1, 2005
    Inventor: Feng-Shen Hsiao
  • Patent number: 6850304
    Abstract: An IPS-LCD having a compensation electrode structure. In each pixel area, at least two common electrodes extending in a first Y-direction and at least one pixel electrode extending in a second Y-direction are inter-digitated with each other. Also, at least two compensation electrodes extending in the Y-direction are patterned on the same plane with the pixel electrode, and overlap the two common electrodes, respectively. A first interval between the first compensation electrode and the pixel electrode is equal to a second interval between the pixel electrode and the second compensation electrode.
    Type: Grant
    Filed: May 21, 2004
    Date of Patent: February 1, 2005
    Assignee: Hannstar Display Corp.
    Inventor: Deuk Su Lee
  • Patent number: 6847046
    Abstract: A light-emitting device and a method for manufacturing the same are described, by forming a SiN/Al1-x-yInxGayN(0?x?1, 0?y?1, x+y?1) superlattice layer between a substrate and an undoped GaN as a buffer layer, so as to reduce dislocation density of the buffer layer. In the SiN/Al1-x-yInxGayN(0?x?1, 0?y?1, x+y?1) superlattice layer, Al1-x-yInxGayN(0?x?1, 0?y?1, x+y?1) can be n-type, p-type or undoped.
    Type: Grant
    Filed: December 31, 2003
    Date of Patent: January 25, 2005
    Assignees: Epitech Corporation, Ltd.
    Inventors: Shih-Chen Wei, Yung-Hsin Shie, Wen-Liang Li, Shi-Ming Chen
  • Patent number: 6847668
    Abstract: The present invention provides a ridge-type semiconductor laser devise comprising: a lower cladding layer of a first conductivity type, an active layer, and a first upper cladding layer of a second conductivity type, which are sequentially stacked on a compound semiconductor substrate of the first conductivity type; a second upper cladding layer of the second conductivity type which has a ridge shape and is provided on the first upper cladding layer; and a contact layer of the second conductivity type provided on the second upper cladding layer. Current blocking layers are provided on the first upper cladding layer, alongside the second upper cladding layer. Respective sections of these current blocking layers that follow the sides of the second upper cladding layer are of the second conductivity type, and respective sections of these current blocking layers that follow the first upper cladding layer are of the first conductivity type.
    Type: Grant
    Filed: August 12, 2002
    Date of Patent: January 25, 2005
    Assignee: Rohm, Co., Ltd.
    Inventor: Takashi Kimura
  • Patent number: 6843765
    Abstract: In an apparatus of stimulating a reaction point of a human body by a certain frequency signal, where frequencies respectively matching with organs are different and the matching frequencies are different in accordance with conditions of disease, a signal generating portion constituted by a melody IC is provided, a switching device is turned on and off in correspondence to a relaxation rhythm signal output from the generating portion, and a signal is obtained from a secondary side of an output transformer in synchronous with the on and off operations, thereby making it possible to treat by a plurality of signals in a band of a plurality of frequencies.
    Type: Grant
    Filed: April 8, 2003
    Date of Patent: January 18, 2005
    Inventor: Shin'ichi Kawamata
  • Patent number: 6845355
    Abstract: A voice recording and reproducing device employing differential vector quantization divides an input voice signal into frames and predicts the sample values of each frame. The first sample value in a frame is predicted from one or more sample values of the preceding frame. Each predicted sample value is then used in predicting the next sample value in the same frame. For example, the predicted sample values may be fed back into a shift register that is initially loaded with sample values from the preceding frame, and prediction may be carried out by an arithmetic operation on the shift-register contents. This scheme reduces the amount of arithmetic circuitry needed for making the predictions, and reduces the cost of the device.
    Type: Grant
    Filed: February 6, 2001
    Date of Patent: January 18, 2005
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Hiroshi Sasaki, Masayasu Sato
  • Patent number: 6844795
    Abstract: A SAW (Surface Acoustic Wave) filter includes serial arm resonators and parallel arm resonators interconnected in pairs in a multiple-stage, ladder configuration. A resonating device is serially connected to any one of the serial arm resonators and has an attenuation pole frequency higher than that of the serial arm resonator. At the attenuation pole frequency of the serial arm resonator, the resonating device functions as capacitance without performing attenuation. The resonating device has an antiresonance frequency 1.8 times or more but 2.2 times or less, or 2.7 times or more but 3.3 times or less, as high as the antiresonance frequency of the serial arm resonator.
    Type: Grant
    Filed: February 21, 2003
    Date of Patent: January 18, 2005
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Naoto Inose
  • Patent number: 6844921
    Abstract: A wafer holder (20) is capable of preventing foreign matter such as dust from becoming adhered to the wafer. The holder (20) is constituted by providing a wafer supporting portion (13) at one disk surface of a disk-shaped substrate portion (12), with the wafer supporting portion (13) having a ring shape with the smallest possible width over which the peripheral portion of the wafer (10) can be supported. Even if there is foreign matter present on the wafer holder or there is dust/deposit film adhering to the rear surface of the wafer, it is possible to prevent the occurrence of a local resist pattern defect by ensuring that the height of the wafer surface including the resist layer remains unchanged.
    Type: Grant
    Filed: September 30, 2002
    Date of Patent: January 18, 2005
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Koji Komatsu
  • Patent number: 6845434
    Abstract: A method for updating parametric data for use in data management system. The data management system includes a data storage device which includes a non-volatile memory device and a random access memory (RAM) device. The non-volatile memory device includes a transaction data storage device and a backup data storage device. When the requirements of a client device change, corresponding parameters stored in the RAM device can be changed and the changed parameters are written to the transaction data storage device. When the system restarts due to contingency, the contents of the backup data storage device are written to the RAM device, and then the corresponding parameters of the RAM device are updated according to the contents of the transaction data storage device. In this way, the contents of the RAM device can be restored to the parameters that was set before the system interruption.
    Type: Grant
    Filed: April 30, 2002
    Date of Patent: January 18, 2005
    Assignee: Benq Corporation
    Inventor: Chih-Hsien Lin
  • Patent number: 6841884
    Abstract: A semiconductor device includes a substrate having a chip mounting surface and a package surface. The semiconductor chip is mounted on the substrate and has electrode pads formed on a circuit forming surface thereof. The chip also has an insulating layer formed on the circuit forming surface and includes an opening for exposing the surface of electrode pads, conductive posts over the insulating layer, and re-distribution wirings formed on the insulating layer. The device has further has external terminals disposed on the package surface; substrate pads formed on the chip mounting surface, internal wirings formed on the chip mounting surface, and a sealing resin for sealing the chip mounting surface and the semiconductor chip.
    Type: Grant
    Filed: November 7, 2003
    Date of Patent: January 11, 2005
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Yoshinori Shizuno
  • Patent number: 6840357
    Abstract: Two oil chambers 28. 29 are formed in a cylinder 21. The piston rod oil chamber 28 is connected with a reservoir 50 formed on an outer section of the cylinder. Two parallel passages 33, 34 are formed in a sealing case 23 provided on an upper section of the cylinder. The sealing case 23 is provided with a needle valve 35 regulating the area of the opening of the passage 33, a poppet valve 37 closing the oil chamber 34 with the biasing force of the spring 40 and an adjuster 39 regulating the biasing force of the spring 40. A part of the oil flowing out of the oil chamber 28 in an expansion stroke is discharged through the needle valve 35 and the puppet valve 37 in order to allow respective regulation of the damping force at that time.
    Type: Grant
    Filed: October 31, 2002
    Date of Patent: January 11, 2005
    Assignees: Bombardier Inc., Kayaba Industry Co., Ltd.
    Inventors: Yoshiro Toiyama, René Lemieux
  • Patent number: 6841452
    Abstract: A silicon oxide film having a ununiform thickness is deposited inside each of trenches defined in a silicon substrate by etching within a device isolation region, in such a manner that only corner portions of trench bottoms are exposed. The silicon substrate is selectively etched from the exposed trench corner portions of the silicon substrate lying inside the trenches to thereby increase the volume of each trench.
    Type: Grant
    Filed: September 30, 2003
    Date of Patent: January 11, 2005
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Hiroyuki Tanaka
  • Patent number: 6841875
    Abstract: A semiconductor device includes a semiconductor substrate formed with a plurality of electrode pads, and wiring electrically connecting the electrode pads to external electrodes to be connected to conductive patterns formed on an external circuit board, the wiring formed into a plurality of layers. The semiconductor device also includes insulating layers interposed between the layers of the wiring, and between the lowermost layer of the wiring and the semiconductor substrate, thereby to ensure insulation therebetween; the layers of the wiring each having depressed portions located at via holes formed in the insulating layers, the depressed portions connected to the lower layer of the wiring or the electrode pads; bump electrodes formed on the depressed portions of the uppermost layer of the wiring; external electrodes formed on the top surfaces of the bump electrodes; and a sealing layer formed over the uppermost layer of the wiring so as to expose the top surface of each of the bump electrodes.
    Type: Grant
    Filed: November 18, 2003
    Date of Patent: January 11, 2005
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Takashi Ohsumi
  • Patent number: 6841873
    Abstract: A semiconductor device comprises a semiconductor chip which has a first surface, a pad which is formed directly on the first surface, an oxide film which is formed on the first surface, an insulating film which is formed on the oxide film and a part of the pad, a conductive film which is formed on the insulating film and the pad, a sealing material which covers a part of the conductive film and the insulating film and a bump which is formed over the conductive film, wherein the bump is exposed from a surface of the sealing material.
    Type: Grant
    Filed: September 30, 2002
    Date of Patent: January 11, 2005
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Hideaki Yoshida, Tae Yamane
  • Patent number: 6842711
    Abstract: The present invention provides a high precision, low cost laser power calibration system. First, the photo signals output from a standard photo diode are received by a photo calibration system; then a set of standards consisting of the corresponding current signals and the power signals are saved in an EEPROM. Finally, the photo diode to be calibrated can be calibrated using the present system in accordance with the calibration standards.
    Type: Grant
    Filed: April 25, 2003
    Date of Patent: January 11, 2005
    Assignee: Benq Corporation
    Inventors: Hsing-Hua Liu, Yao-Jeng Huang, Lin Hsiao
  • Patent number: D500872
    Type: Grant
    Filed: February 3, 2004
    Date of Patent: January 11, 2005
    Assignee: Mass Technology (H.K.) Limited
    Inventor: Onn Fah Foo
  • Patent number: D501201
    Type: Grant
    Filed: April 6, 2004
    Date of Patent: January 25, 2005
    Assignee: Smartant Telecom Co., Ltd.
    Inventors: Leo Chiang, Simon Lin