Patents Represented by Attorney Rabin & Berdo, P.C.
  • Patent number: 7557692
    Abstract: A parking sensor apparatus has at least two ultrasonic sensors, and a method to decrease erroneous determinations of the parking sensor apparatus has a first detecting process and a second alternate process. In first detecting process, the two ultrasonic sensors are controlled to transmit and receive ultrasonic detecting signals. If a reflected ultrasonic signal is detected and an obstacle is determined to be existed according to the ultrasonic signal, the two ultrasonic sensors are controlled alternately in second alternate detecting process to further determine whether the obstacle is real or not. That is, the method and the parking sensor apparatus only requires two detecting cycles to determine the real obstacle, so the method and parking sensor apparatus have fast response whether any obstacle is close to the vehicle.
    Type: Grant
    Filed: December 19, 2006
    Date of Patent: July 7, 2009
    Inventor: Shih-Hsiung Li
  • Patent number: 7557007
    Abstract: The method for manufacturing a semiconductor device according to the invention includes forming a thick silicon oxide film uniformly in a trench. Argon ions or the like implanted obliquely into the trench to form an ion implanted damaged region selectively in the portion of the silicon oxide film on the trench sidewall utilizing the shadowing effects of the oblique ion implantation. The silicon oxide film is wet etched to selectively remove the silicon oxide film in the ion implanted damaged region utilizing the etching rate difference, wherein the etching rate is faster in the damaged region than in the undamaged region. As a result, a thick residual oxide film is formed on the bottom and the lower sidewall portion of the trenchwithout causing any bird's beak.
    Type: Grant
    Filed: December 30, 2005
    Date of Patent: July 7, 2009
    Assignee: Fuji Electric Device Technology Co., Ltd.
    Inventors: Kazuo Shimoyama, Mutsumi Kitamura, Hongfei Lu
  • Patent number: 7554838
    Abstract: A simulating circuit for simulating the operation of a magnetic tunnel junction (MTJ) device having at least a free layer and a fixed layer is provided. The simulating circuit includes a closed switch loop for simulating the magnetization of the free layer and the fixed layer, thus for simulating the data recording, wherein the magnetization includes parallel state or anti-parallel state; a first write loop for simulating the first quadrant of the operation region of the MTJ device; a second write loop, a third write loop, and a fourth write loop for simulating the second quadrant, the third quadrant, and the fourth quadrant of the operation regions, respectively; a first resistor for simulating the wire resistance of the bit lines; a second resistor for simulating the wire resistance of the write word lines; and a third resistor for simulating the resistance of the magnetic MTJ device.
    Type: Grant
    Filed: January 5, 2006
    Date of Patent: June 30, 2009
    Assignee: Industrial Technology Research Institute
    Inventor: Yung-Hsiang Chen
  • Patent number: 7555224
    Abstract: An all-optical label swapping system and method superimposes a low-speed ASK label on top of a high-speed DC-balanced-line-coded ASK payload. An old ASK label is erased by modulating the combined payload and label signal with the inverse of the received ASK label. This ASK labeling technique requires only low speed external modulators and low speed optical receivers to perform the label swapping mechanism, and does not require sophisticated optical components.
    Type: Grant
    Filed: January 31, 2005
    Date of Patent: June 30, 2009
    Assignee: Industrial Technology Research Institute
    Inventors: Yu-Min Lin, Maria C. Yuang, San-Liang Lee, Winston I. Way
  • Patent number: 7554168
    Abstract: A semiconductor device comprises a package having a cavity in the interior thereof, a chip having a semiconductor element, and an adhesive portion comprised of a silicone or fluorine resin and particles each having a predetermined shape. The adhesive portion fixes the chip on the bottom of the cavity.
    Type: Grant
    Filed: June 22, 2006
    Date of Patent: June 30, 2009
    Assignee: Oki Semiconductor Co., Ltd.
    Inventor: Yoshihiko Ino
  • Patent number: 7554639
    Abstract: A method to control the pretilt angle of a liquid crystal device is disclosed. The claimed invention provides two substrates and at least one vertical alignment layers, which are fabricated on one side of each substrate and are opposite to each other. Moreover, a liquid crystal layer is sandwiched between the alignment layers, and the preferred embodiment of the liquid crystal device has an Optically Compensated Birefrigence (OCB) configuration. More particularly, before the process of alignment for the liquid crystal device is performed, a pretilt angle disclosed in the present invention is adjusted since at least one vertical alignment layer is treated with a particle beam generated by plasma or ions. The pretilt angle can range between 5 and 85 degrees.
    Type: Grant
    Filed: September 14, 2006
    Date of Patent: June 30, 2009
    Assignees: Taiwan TFT LCD Association, Chunghwa Picture Tubes, Ltd., Au Optronics Corp., Quanta Display Inc., Hannstar Display Corp., Chi Mei Optoelectronics Corp., Industrial Technology Research Institute, Toppoly Optoelectronics Corp.
    Inventors: Ching-Wen Hsiao, Bang-Hao Wu, Hsin-Chun Chiang, Yu-Ming Chen
  • Patent number: 7555580
    Abstract: A multi-function PC card includes: a first PC card interface that is capable to be coupled to a host device; a functional block that provides a first function to the host device; a second PC card interface that is capable to be coupled to an additional PC card; and an interface controller that allows one of the functional block and the additional PC card to be accessed by the host device through the first PC card interface.
    Type: Grant
    Filed: August 31, 2004
    Date of Patent: June 30, 2009
    Assignee: Oki Semiconductor Co., Ltd.
    Inventors: Masahiko Ohkubo, Noriaki Shinagawa
  • Patent number: 7554503
    Abstract: A wide band antenna has a ground plane, a dielectric member and a radiating patch. The dielectric member is mounted on the ground plane. The radiating patch is held by the dielectric member, is mounted on the ground plane and has a main conductor, a feeding conductor, a coupling conductor, an extension conductor and a shorting conductor. The main conductor has a first resonant mode. The extension conductor has a second resonant mode. The coupling conductor is capable of feeding high frequency signals into the main conductor and the extension conductor by capacitive coupling effect. With the main conductor, the extension conductor and the coupling conductor, the size of the wide band antenna is effectively reduced.
    Type: Grant
    Filed: January 15, 2008
    Date of Patent: June 30, 2009
    Assignee: Advanced Connectek Inc.
    Inventors: Cheng-Hsuan Hsu, Sheng-Chih Lin, Tsung-Wen Chiu, Fu-Ren Hsiao
  • Patent number: 7554172
    Abstract: An electrode plate for an electricity storage and discharge device, which includes a plurality of I/O convergence terminals evenly distributed along a periphery of the electrode plate, and a plurality of conductive structures, each conductive structure for one of the I/O convergence terminals, wherein each conductive structure is of a radial pattern that centers on the one of the I/O convergence terminals, and radiates towards the interior of the electrode plate.
    Type: Grant
    Filed: April 7, 2005
    Date of Patent: June 30, 2009
    Inventor: Tai-Her Yang
  • Patent number: 7554809
    Abstract: A heatsink assembly structure combined with a heat-generating element disposed on a circuit board is provided. The heatsink assembly structure includes a heat conducting plate and at least one spring plate. The heat conducting plate includes a pressing surface and an abutment surface. The spring plate includes at least one fixing section and a plurality of pressing sections extending from the fixing section. When the fixing section of the spring plate is fixed to the circuit board, each of the pressing sections applies a force to press the heat conducting plate towards the heat-generating element, so as to attach the abutment surface on the heat-generating element, and conduct heat generated by the heat-generating element to the heat conducting plate. Thus, a plurality of forces pressing the heat conducting plate downward is provided with a simple structure.
    Type: Grant
    Filed: February 9, 2007
    Date of Patent: June 30, 2009
    Assignee: Inventec Corporation
    Inventor: Kai-Po Chang
  • Patent number: 7551662
    Abstract: A distributed feedback (DFB) quantum dot semiconductor laser structure is provided. The DFB quantum dot semi-conductor laser structure includes: a first clad layer formed on a lower electrode; an optical waveguide (WG) formed on the first clad layer; a grating structure layer formed on the optical WG and including a plurality of periodically disposed gratings; a first separate confinement hetero (SCH) layer formed on the grating structure layer; an active layer formed on the first SCH layer and including at least a quantum dot; a second SCH layer formed on the active layer; a second clad layer formed on the second SCH layer; an ohmic layer formed on the second clad layer; and an upper electrode formed on the ohmic layer. Accordingly, an optical WG is disposed on the opposite side of the active layer from the grating structure layer, thereby increasing single optical mode efficiency.
    Type: Grant
    Filed: November 24, 2006
    Date of Patent: June 23, 2009
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Dae Kon Oh, Jin Hong Lee, Jin Soo Kim, Sung Ui Hong, Byung Seok Choi, Hyun Soo Kim, Sung Bock Kim
  • Patent number: 7550817
    Abstract: A semiconductor device has a fuse, an internal circuit and a protection capacitor. The fuse has a first terminal connected to be applied to a fixed voltage and a second terminal. The internal circuit includes a transistor. The transistor has a threshold voltage and a gate. The protection capacitor is connected between the second terminal of the fuse and the gate of the transistor. The protection capacitor supplies the threshold voltage to the transistor where the fuse supplies the fixed voltage to the protection capacitor.
    Type: Grant
    Filed: March 18, 2005
    Date of Patent: June 23, 2009
    Assignee: Oki Semiconductor Co., Ltd.
    Inventor: Yasuhiro Fukuda
  • Patent number: 7549257
    Abstract: An earthquake shock damper has two connectors, two shaft assemblies, multiple energy absorbers, multiple spacers and multiple energy distribution assemblies. The connectors are connected to structural members of a building. The shaft assemblies are coaxially attached respectively to the connectors. The energy absorbers are mounted around the shaft assemblies, and each energy absorber has a central body and multiple extensions extending out from the central body. The spacers are mounted around the shaft assemblies, and each spacer is mounted between the central bodies of adjacent energy absorbers to define the interval between the energy absorbers. The energy distribution assemblies are attached to the extensions of the energy absorbers.
    Type: Grant
    Filed: July 7, 2005
    Date of Patent: June 23, 2009
    Inventor: Kuo-Jung Chuang
  • Patent number: 7549389
    Abstract: A ball valve apparatus for a refrigeration system is described. The ball valve apparatus comprises a ball valve for controlling flow of refrigerant and a moisture indicator for showing a moisture content of the refrigerant, and the moisture indicator and the ball valve are formed as one body. Since a moisture indicator and a ball valve are formed as one body, the installation cost and the size of a refrigeration system can be reduced.
    Type: Grant
    Filed: March 6, 2007
    Date of Patent: June 23, 2009
    Assignee: Essentech Co., Ltd
    Inventors: Si-Nam Cho, Sang-Bong Lee
  • Patent number: 7550186
    Abstract: An angle-laminated composite tube with double layer of materials uses an inner layer material and an outer layer material with different functional properties. The two materials are cut into a plurality of slices in a specific shape. They are laminated alternately with a mismatching angle inside a mold with a specific angle to form a laminated assembly. Finally, a hot press is used to cure the laminated assembly into a structure with an inner layer, an outer layer, and an interlacing layer. The slice shape of the inner layer material and the outer layer material is specifically designed so that the inner layer, the outer layer, and the interlacing layer receive an even pressure during the curing process, rendering desired densities in the layers. The angle-laminated composite tube can achieve a high structural strength, with the inner and outer parts satisfying different functional needs.
    Type: Grant
    Filed: December 2, 2005
    Date of Patent: June 23, 2009
    Assignee: Chung Shan Institute of Science and Technology
    Inventors: Mau-Yi Huang, Geng-Wen Chang, Chih-Chin Lu, Guang-Shyang Ger
  • Patent number: 7548143
    Abstract: Provided is a microwave module having a converter for improving transmission characteristics in a millimeter-wave band. When a microstrip transmission line and a conductor-backed coplanar waveguide (CBCPW) transmission line are connected by wire bonding, a change in impedance caused by wire bonding and an abrupt change in electric field components between the two transmission lines are reduced by the converter. Therefore, insertion loss and return loss are reduced, and transmission characteristics in a millimeter-wave band are improved.
    Type: Grant
    Filed: October 19, 2007
    Date of Patent: June 16, 2009
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Dong Young Kim, Jae Kyoung Mun, Dong Suk Jun, Hae Cheon Kim
  • Patent number: 7547913
    Abstract: Provided are a phase-change memory device using a phase-change material having a low melting point and a high crystallization speed, and a method of fabricating the same. The phase-change memory device includes an antimony (Sb)-selenium (Se) chalcogenide SbxSe100-x phase-change material layer contacting a heat-generating electrode layer exposed through a pore and filling the pore. Due to the use of SbxSe100-x in the phase-change material layer, a higher-speed, lower-power consumption phase-change memory device than a GST memory device can be manufactured.
    Type: Grant
    Filed: August 30, 2006
    Date of Patent: June 16, 2009
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sung Min Yoon, Nam Yeal Lee, Sang Ouk Ryu, Seung Yun Lee, Young Sam Park, Kyu Jeong Choi, Byoung Gon Yu
  • Patent number: 7547937
    Abstract: A semiconductor memory device includes a first word-line, a first non-inverted bit-line, a first inverted bit-line, a first global interconnection layer, a first memory capacitor having a first storage electrode, a first counter electrode, and a first oxide dielectric film, a second memory capacitor having a second storage electrode, a second counter electrode, and a second oxide dielectric film, a first local interconnection layer including a first contact portion, a second contact portion, and a first non-contact portion, a first hydrogen barrier layer covering at least the first contact portion and the second contact portion of the first local interconnection layer, a first switching transistor having a first gate electrode, a second switching transistor having a second gate electrode, and a third switching transistor having a third gate electrode.
    Type: Grant
    Filed: March 29, 2006
    Date of Patent: June 16, 2009
    Assignee: Oki Semiconductor Co., Ltd.
    Inventor: Tomomi Yamanobe
  • Patent number: 7547575
    Abstract: A die bonder and a die bonding method thereof are provided. The die bonder includes a wafer platform, an arranging platform, a conveyer, at least one first pick-up device and a second pick-up device. The wafer platform is for placing a wafer with several dies. The conveyer is for carrying and conveying a substrate. The first pick-up device is for picking up one of the dies and placing each die on the arranging platform. The second pick-up device is for picking up the dies on the arranging platform and placing the dies on the substrate at the same time.
    Type: Grant
    Filed: October 4, 2007
    Date of Patent: June 16, 2009
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Ho-Ming Tong, Kao-Ming Su, Chao-Fu Weng, Teck-Chong Lee, Chian-Chi Lin, Chia-Jung Tsai, Chih-Nan Wei, Song-Fu Yang
  • Patent number: D595435
    Type: Grant
    Filed: May 28, 2008
    Date of Patent: June 30, 2009
    Assignee: Mass Technology (H.K.) Ltd.
    Inventor: Onn Fah Foo