Abstract: A configuration for treating wafers in at least one clean room includes a configuration of production units and measuring units that receive wafers via a transport system for transporting cassettes. Several functionally allocated production units and/or measuring units are combined to form a manufacturing cell which is provided with a loading and unloading station for receiving and forwarding cassettes with wafers. Individual wafers can be supplied to the production units and/or measuring units within the manufacturing cell in order to be treated.
Abstract: An optical signal alternately traverses a total of n couplers and n−1 DGD units, arranged therebetween, with a differential group delay between two signal modes. The power division between the two signal modes is measured in each DGD unit in a power division controller, and a signal that is proportional to the difference between the powers in the two signal modes is obtained. The signal is led to an integrating controller whose control signal is led to a differential phase shifter that is accommodated in the DGD unit present upstream in the beam path. The difference between the powers of the two signal modes is thereby brought to zero at least approximately. This has the consequence that it is essentially only the chromatic dispersion that is generated or equalized, but no other disturbing distortions of the optical signal are produced.
Abstract: A method for producing a semiconductor structure includes applying at least one first layer, etching the first layer using a masking layer such that fences are produced, and, after removal of the masking layer and application of an auxiliary layer, the auxiliary layer and the fences are removed jointly except for a predetermined extent of the auxiliary layer. The present invention also relates to use of the method for producing spacers in a semiconductor structure.
Abstract: Information is transmitted between a base station and other transceiver stations in a radio communication system within a common frequency channel in the downlink and uplink. At least one switching time is established in this case between the downlink and uplink. These bursts can be configured for the highest possible spectral efficiency in accordance with the rules of mobile radio telephony. However, a burst of shortened duration is transmitted before and/or after the switching time. In TDD transmission systems, this, therefore, prevents the receiving and transmitting operation from overlapping for the switching time due to disadvantageous relative signal propagation times.
Type:
Grant
Filed:
August 25, 2000
Date of Patent:
October 26, 2004
Assignee:
Siemens Aktiengesellschaft
Inventors:
Markus Dillinger, Jürgen Schindler, Jean-Michel Traynard
Abstract: A phase detector for a delay locked loop with a delay unit that delays a periodic clock signal by a settable delay, has a first input for the periodic clock signal, a second input for the delayed clock signal, an UP output and a DOWN output. The phase detector outputs a first pulse signal at the UP output and a second pulse signal at the DOWN output, which signals can respectively assume a first or a second level, for the setting of the delay unit. The first pulse signal changes to the first level in the event of a positive edge of the clock signal and the second pulse signal changes to the first level in the event of a positive edge of the delayed clock signal. In the event that both pulse signals are at the first level, a reset device resets both pulse signals to the second level.
Abstract: A method and apparatus apply a lacquer layer to the upper side of a printed medium (i.e. a printed sheet). The method and apparatus form a film of lacquer, in particular a UV lacquer film. Next, the lacquer film is dried or hardened under the action of heat and/or UV radiation. Next, the dried/hardened lacquer film is transferred to the (fresh or still wet) printed upper side of the printed medium, with simultaneous permanent adhesion of the film to this upper side.
Abstract: A semiconductor component and a method for fabricating it includes a substrate and an epitaxial layer situated thereon and integrating at least a first and a second bipolar component in the layer. The first and second bipolar components have a buried layer and different collector widths. The buried layer of the second component has a larger layer thickness than that of the first component; exactly one epitaxial layer is provided. The different collector widths produced as a result thereof are influenced by the outdiffusion of the dopant of the buried layers by other substances.
Abstract: A holder in a brush-cleaning installation, preferably for combined use in the brush-cleaning and centrifugal-drying process, contains a carrier part from which there extend, in a spider-shaped manner, a plurality of carrying arms. On the carrying arms there is mounted, in a rotatable manner in each case, a guide roller which, in addition to positioning the semiconductor wafer vertically, also makes it possible for the semiconductor wafer to be positioned horizontally with the aid of an annular collar on a bottom section of the guide roller.
Type:
Grant
Filed:
April 29, 2002
Date of Patent:
October 19, 2004
Assignee:
Infineon Technologies AG
Inventors:
Matthias Fehr, Rüdiger Hunger, Thomas Mieth
Abstract: A circuit configuration for driving a programmable link has a volatile memory cell, which is coupled to the fuse for the permanent storage of data stored in the volatile memory, and also a shift register, which enables data to be read out from the volatile memory cell and data to be written to the memory cell. In this case, a plurality of shift registers may be interconnected to form a shift register chain for the purpose of driving a plurality of fuses. The shift register chain thus enables fast writing and reading to/from the volatile memory with a low outlay on circuitry.
Abstract: A method and logic/memory module set the desired corrected duty cycle between the time periods of the first and second level states of at least one control/reference signal. In that, the rising time period of the rising edge and/or the fall time period of the falling edge of the control/reference signal are increased and/or decreased (i.e. changed) by a predefinable correction time period.
Abstract: A connector arrangement comprises first conductor teeth on a first support and second conductor teeth on a second support. A slider is provided for electrically and mechanically connecting and disconnecting respective first conductor teeth on the first support to respective second conductor teeth on the second support in the manner of a zipper.
Abstract: An oscillator circuit includes an oscillator core having two capacitances, two inductors designed as bonding wires, and a de-attenuation amplifier coupled to the oscillator core. The inductors of the oscillator core, which is preferably embodied to be tunable, are connected to a leadframe by a respective terminal. A chip including the oscillator core and the deattentuation amplifier is configured on the leadframe. A resonance transformation circuit is preferably provided for coupling the oscillator core and the de-attenuation amplifier. The oscillator can be used in a mobile radio when there are high requirements with regard to the phase noise.
Abstract: A test reticle having a pad and antenna structures with varying critical dimensions is provided to measure sidewall angles developing in the resist sidewalls of clear lines. These sidewall angles originate from resist flow due to the occurrence of excessively high temperatures in a resist process on a lithographic track after the exposure of a semiconductor wafer. A scanning electron microscope is used to perform the measurement. A sequence of temperatures is applied in each postbake step to process a wafer, and the sidewall angle is determined afterwards from e.g. a critical dimension measurement with a known resist thickness. An error signal is issued, if a threshold value of a sidewall angle is exceeded. The temperature of the resist process, e.g. the postbake, is then adjusted to a temperature below the temperature causing the warning signal.
Type:
Grant
Filed:
July 3, 2002
Date of Patent:
October 19, 2004
Assignee:
Infineon Technologies SC300 GmbH & Co. KG
Abstract: A device having a semiconductor component and a printed circuit board are described. The semiconductor component has external contacts and the printed circuit board has contact terminals. The contact terminals display a central blind opening, into which the external contacts of the semiconductor component protrude and are in a force-locking engagement with the contact terminal areas. In the method of electromechanically connecting the two parts to form a device, after they have been aligned, the two components are merely pressed onto each other.
Type:
Grant
Filed:
January 25, 2002
Date of Patent:
October 19, 2004
Assignee:
Infineon Technologies AG
Inventors:
Bernd Barchmann, Erik Heinemann, Josef Heitzer, Frank Pueschner
Abstract: A shaped part or article of manufacture is formed of a selected gamma titanium aluminide alloy with outstanding mechanical properties which can be produced particularly economically. First, a semi-finished article is formed in a hot forming process with a degree of deformation of greater than 65%. Then the semi-finished article is shaped with the alloy being in a solid-liquid phase by applying mechanical forming forces during at least part of the shaping process.
Abstract: Novel poly-o-hydroxyamides can be cyclized to give polybenzoxazoles which have a good diffusion barrier effect with respect to metals. The poly-o-hydroxyamides can be applied to a semiconductor substrate by customary techniques and converted into the polybenzoxazole in a simple manner by heating. This results in a good barrier layer with respect to diffusion of metals. This allows the diffusion barrier between conductor track and dielectric to be substantially dispensed.
Type:
Grant
Filed:
June 27, 2003
Date of Patent:
October 19, 2004
Assignee:
Infineon Technologies AG
Inventors:
Recai Sezi, Andreas Walter, Anna Maltenberger, Klaus Lowack
Abstract: A semiconductor component has a cell array formed in a semiconductor body with a number of identical transistor cells and at least one edge cell formed at an edge of the cell array. Each of the transistor cells has a control electrode, which is formed in a trench, and the edge cell has a field plate, which is formed in a trench, with a distance between the trench of the edge cell and the trench of the immediately adjacent transistor cell being less than the distance between a trench of a transistor cell and the trench of an immediately adjacent transistor cell in the cell array.
Type:
Grant
Filed:
March 28, 2003
Date of Patent:
October 19, 2004
Assignee:
Infineon Technologies AG
Inventors:
Ralf Henninger, Franz Hirler, Joachim Krumrey, Markus Zundel, Walter Rieger, Martin Pölzl
Abstract: In a method for operating an MRAM semiconductor memory configuration, for the purpose of reading an item of stored information, reversible magnetic changes are made to the TMR cell and a current that is momentarily altered as a result is compared with the original read signal. As a result, the TMR memory cell itself can serve as a reference, even though the information in the TMR memory cell is not destroyed, i.e. writing-back does not have to be effected. The method can preferably be applied to an MRAM memory configuration in which a plurality of TMR cells are connected, in parallel, to a selection transistor and in which there is a write line which is not electrically connected to the memory cell.
Abstract: Chemically amplified photoresists exhibit increased transparency at a wavelength of 157 nm. The chemically amplified photoresist includes a polymer containing first repeating units derived from a cinnamic acid or a cinnamic ester, which are at least monofluorinated or substituted by fluoroalkyl groups. Processes for structuring substituents using transparency enhancement of resist copolymers for 157 nm photolithography using fluorinated cinnamic acid derivatives are also included.
Type:
Grant
Filed:
July 30, 2002
Date of Patent:
October 19, 2004
Assignee:
Infineon Technologies AG
Inventors:
Christoph Hohle, Jörg Rottstegge, Christian Eschbaumer, Michael Sebald
Abstract: An etching mask is produced for etching a substrate by a photoresist layer being exposed such that areas which are exposed once are not yet completely exposed and, on the basis of a reflective layer which is located under the photoresist layer, additionally exposed areas are exposed completely. In consequence, a first etching mask which is used for etching a substrate can be renewed by a second etching mask in that a photoresist layer which is applied to the first etching mask or instead of the first etching mask is exposed such that areas which have been exposed once are not yet completely exposed, and areas which have been additionally exposed on the basis of a reflective layer which is located under the photoresist layer and corresponds to the first etching mask are exposed completely.
Type:
Grant
Filed:
June 12, 2002
Date of Patent:
October 19, 2004
Assignee:
Infineon Technologies AG
Inventors:
Matthias Goldbach, Thomas Hecht, Bernhard Sell