Abstract: An evaluation configuration has a first MOS evaluation stage, an isolation stage, and a bipolar evaluation stage. The isolation stage is connected between the first MOS evaluation stage and the bipolar evaluation stage. The isolation stage isolates the first MOS evaluation stage from the bipolar evaluation stage. The evaluation configuration can reliably detect very small read signals and allows a high integration density.
Abstract: A memory device includes a memory module, a control unit and a bus connected to the memory module and the control unit. In an accessing operation of the memory module via bus, the control unit applies a first command which causes high power consumption in the memory module, to the memory module via part of the bus only.
Abstract: A data read access and a data write access is shared between two memory banks. A first memory bank of which is operated with a clock that is shifted by half a clock pulse with respect to the operating clock of the other, second memory bank. Partial data streams are combined at the output of the two memory banks to form a data stream with double the frequency.
Type:
Grant
Filed:
October 7, 2003
Date of Patent:
October 12, 2004
Assignee:
Infineon Technologies AG
Inventors:
Robert Kaiser, Helmut Schneider, Florian Schamberger
Abstract: The valve drive mechanism is particularly suitable for internal combustion engines of motor vehicles. The mechanism has at least one driven cam element and a valve control member which is moved (translationally or rotationally) by the cam element. The cam element is rotatingly mounted in a flexible surround element which is connected to the valve control member in a plane orthogonal to the axis of rotation of the cam element. The surround element can be reversably extended, such as elastically extended, to enable a variation in the resulting valve lift.
Abstract: A housing for biometric sensor chips and a method for producing such a housing includes a freely accessible fingerprint checking area on a sensor chip, a mount substrate with contact outer surfaces thereon, the mount substrate being a mounting strip with perforated edges, on which the contact outer surfaces are disposed partially outside a housing frame, and the sensor chip is positioned within the housing frame.
Abstract: The fitting, in particular a safety valve, operates according to the relief principle or according to the loading principle. The fitting is opened and closed by a plurality of control parts. The control parts are connected in series in the control line of the fitting and are each actuated by a control valve. The control parts open the fitting only when all the control parts are in a position which opens the fitting. The fitting closes as soon as even only one of the control parts is in a position which closes the fitting.
Type:
Grant
Filed:
August 26, 2003
Date of Patent:
October 12, 2004
Assignee:
Framatome ANP GmbH
Inventors:
Hermann-Josef Conrads, Erwin Laurer, Jürgen Model
Abstract: An electromechanical actuator has at least one electromagnet, an armature and a resetting device. A connector is provided, with at least one contact element, which is electro-conductively connected to the coil of the electromagnet, and which is disposed in such a way that, at least during the assembly to the actuator onto a support, it can be electrically contacted by an assembly contacting element.
Type:
Grant
Filed:
November 14, 2001
Date of Patent:
October 12, 2004
Assignees:
Siemens Aktiengesellschaft, Bayerische Motoren Werke Aktiengesellschaft
Inventors:
Erwin Bauer, Wolfram Bohne, Wolfgang Hundt, Hanspeter Zink
Abstract: A gas cooker includes a pot support that can be fixed on a top panel, preferably a cooktop panel, by a permanent-magnet configuration. The permanent-magnet configuration has magnet parts disposed at connecting locations on a pot support and on the top panel, and the magnet parts are located opposite one another. At least one of the magnet parts is a permanent magnet and another of the magnet parts is either a material magnetically attracted by the permanent magnet or a further permanent magnet having a polarity opposite the permanent magnet and magnetically attracted by the permanent magnet. As such, the configuration magnetically retains the pot support in a predetermined position on the top panel.
Abstract: A reverse-blocking power semiconductor component includes a drift path subdivided into a source-side area and a drain-side area by a region with opposite doping. Provided above this region is a gate. Alternatively, the body zone of the one conduction type is subdivided into a source-side part and a drain-side part by a region of the other conduction type. This region acts as an electron collector. The reverse-blocking power semiconductor component can be incorporated in compensation components, and power transistors. Methods for producing power semiconductor components are also provided.
Abstract: The invention relates to starch, derived from amylopectin potatoes, which is preferably in a modified and/or derivatised form. Said starch is an especially advantages protective colloid for use in conducting emulsion polymerization reactions. The invention also relates to emulsion [co]polymerization methods and polymer dispersions produced thereby.
Abstract: An integrated circuit includes an analog amplifier connected to a terminal pad and has a Miller compensation of a section of the analog amplifier. The Miller compensation circuit is connected to a terminal for reference-ground potential through a capacitive element. An EMC interference radiation that can be coupled in through the terminal pad is attenuated by the capacitive element. The operating points of the internal nodes of the analog amplifier are, thereby, stabilized.
Abstract: A method for monitoring processes includes identifying process variables in a process space as operating values, carrying out a measurement of actual values of the operating values, presetting or measuring actual values of at least one operating parameter that influences these operating values, assessing operating values as a function of the operating parameters, and generating a map of the process space by allocating at least one subset of points of the process space to at least two classes which represent a measure of the risk of the operating state of the printing machine. An apparatus for implementing the above-described method has at least one diagnostic apparatus, an input unit, a machine control unit and a display apparatus. The apparatus also has a cartography unit which provides a map of the process space of the operating values as a function of the operating parameters.
Abstract: A regulated output voltage and an output current are generated by using a switching device for providing the output current and controlling the switching device with the first control circuit functioning in a pulse width modulation mode and in an alternative manner with a second control circuit functioning in a pulse frequency modulation mode. A second feedback circuit is included in the second control circuit and a time delay is introduced in the second feedback circuit in order to introduce a limitation of the pulse frequency.
Abstract: The invention relates to a semiconductor circuit configuration and to an associated fabrication method, in which a semiconductor substrate has a plurality of word lines and a plurality of bit lines for the row by row and column by column driving of a matrix of switching elements. In this case, a plurality of electrically conductive connection strips for connecting source and drain regions in the active region to the respective bit lines are formed between the word lines such that they directly make contact with the source and drain regions at the surface of the semiconductor substrate in the active region. In this way, a particularly compact cell area is obtained in conjunction with very simple lithographic conditions.
Abstract: An integrated circuit configuration includes a semiconductor body having a first semiconductor zone of a first conductivity type in a region near a rear side and a second semiconductor zone of the first conductivity type adjoining the first semiconductor zone and doped more weakly than the first semiconductor zone in a region near a front side, a first component region in the body having at least one semiconductor zone of a second conductivity type, a second component region in the body having at least one semiconductor zone of the second conductivity type, and a conversion structure having a semiconductor zone of the second conductivity type and a semiconductor zone of the first conductivity type that are short-circuited and disposed at a distance from the first semiconductor zone between the first and second component regions in the second semiconductor zone.
Type:
Grant
Filed:
January 23, 2003
Date of Patent:
October 5, 2004
Assignee:
Infineon Technologies AG
Inventors:
Ludwig Rossmeier, Norbert Krischke, Wolfgang Werner, Peter Nelle
Abstract: The method enables determining imaging errors of photomasks for the lithographic structuring of semiconductors. A latent image of the mask is first produced in a photoactivatable layer by exposure. After heat treatment carried out for increasing the contrast and development of the exposed resist, the latter is treated with an amplification agent which preferably diffuses into the exposed parts of the photoresist. There, it reacts with groups of the photoresist, which leads to an increase in the layer thickness of the resist in the exposed parts. A topographical image of the surface of the photoresist, which can be created, for example, by scanning electron microscopy, then indicates imaging errors by protuberances which are located outside the image of the mask. The mask layout can be tested under production conditions and the adjustment and the checking of all components of the phototransfer system used for the production of microchips is facilitated.
Type:
Grant
Filed:
April 30, 2002
Date of Patent:
October 5, 2004
Assignee:
Infineon Technologies AG
Inventors:
Günther Czech, Ernst-Christian Richter, Ulrich Scheler, Michael Sebald
Abstract: A gear train for a machine for processing flat printing materials includes a coupling for separating and closing the gear train. The gear train further includes rotating elements having toothing systems which, in a closed state of the gear train, are in mutual engagement and, in a separated state of the gear train, are out of engagement. A multiplicity of the rotating elements are combined into pairs. The toothing systems of one of the pairs of rotating elements has a tooth pitch differing from the toothing systems of a respective other of the pairs of rotating elements. A machine, including the gear train, for processing flat printing materials, is also provided.
Abstract: In a high-temperature fuel cell, the problem exists that a series electrical resistance rises while the high-temperature fuel cell is operating. This rise is caused by oxidation of the fuel-gas-side surface of the bipolar plate. Oxidation of this nature is largely suppressed by an oxidation buffer that is disposed in the fuel gas chamber and takes up the oxygen.
Abstract: In a process facility for producing semiconductor wafers, a third physical unit is configured between two physical units that produce mini environments. The third physical unit has a laminar flow at right angles to the laminar flows of the two physical units and is operated with a slightly higher flow velocity. According to the Bernoulli equation, the static pressure in the third physical unit is therefore lower than in the surrounding two physical units. Advantageously, therefore, no contamination from the more highly loaded one of the two physical units passes over into the lesser loaded one of the two physical units.
Abstract: A method for etching phase shift layers of half-tone phase masks includes etching a phase shift layer by using a plasma which is obtained from CH3F and O2. A high cathode power is used for the etching. The method has a very high selectivity between the substrate and the phase shift layer, so that half-tone phase masks with a high imaging quality can be produced.