Patents Represented by Attorney Richard A. Bachand
  • Patent number: 4591741
    Abstract: A circuit for clamping the base of an output pull-down transistor includes a clamp transistor connecting the base of the pull-down transistor to a ground node and a drive circuit for rapidly turning on the clamp transistor in response to a high-to-low transition on an input node. The drive circuit includes a string of Schottky diodes connecting the base of the clamp transistor to the collector of a transistor whose base is responsive to the voltage on the input node.
    Type: Grant
    Filed: March 5, 1984
    Date of Patent: May 27, 1986
    Assignee: Texas Instruments Incorporated
    Inventor: Michael D. Cooper
  • Patent number: 4581552
    Abstract: Power-up clear circuitry includes a latch which powers-up in a preferred state. Threshold detect circuitry changes the state of the latch when the supply voltage reaches its operating value, and then switches itself off. Transient protection circuitry ensures that the latch properly powers-up in the preferred state after a supply transient which drops below the threshold voltage of the circuit devices.
    Type: Grant
    Filed: February 17, 1984
    Date of Patent: April 8, 1986
    Assignee: Texas Instruments Incorporated
    Inventors: Richard H. Womack, Brock Barton, Robert Martin
  • Patent number: 4572772
    Abstract: An electronic flame off (EFO) electrode used to form balls on bonding wire builds up layers of aluminum oxide during use. The aluminum oxide is removed by moving the EFO electrode next to a cleaning electrode, and causing a glow discharge to pass across the gap between them. The EFO electrode is charged negative with respect to the cleaning electrode, and a noble gas, such as argon, fills the region around the gap.
    Type: Grant
    Filed: November 7, 1983
    Date of Patent: February 25, 1986
    Assignee: Texas Instruments Incorporated
    Inventor: James R. Peterson
  • Patent number: 4572886
    Abstract: A method for optically marking selected integrated circuit bars of visual identification. In one embodiment a layer for photosensitive material applied to a portion of all of the bars on a wafer prior to testing. Selected bars are marked by directing a beam of radiant energy at the photosensitive material, which changes opacity and/or color in the irradiated region.
    Type: Grant
    Filed: November 3, 1983
    Date of Patent: February 25, 1986
    Assignee: Texas Instruments Incorporated
    Inventor: Lee R. Reid
  • Patent number: 4570164
    Abstract: A receiving antenna for use in proximity to an antenna having a circular radiating magnetic field includes at least one antenna having a null spatial sensitivity pattern along at least one axis, oriented with the circular radiating antenna located in said null pattern. In a preferred embodiment, the antenna having spatial sensitivity is three orthogonally oriented loop antennas, arranged to be insensitive to signals from the circular radiating antenna and sensitive to TE and TM signals from a remote location.
    Type: Grant
    Filed: September 2, 1982
    Date of Patent: February 11, 1986
    Assignee: Rockwell International Corporation
    Inventor: Robert C. Carter
  • Patent number: 4567432
    Abstract: A system for statically and dynamically testing an integrated circuit die in wafer form at various temperatures includes a multilayer support fixture in which the probes, the static test switching circuitry, and the dynamic test switching circuitry are mounted on separate, spaced apart, planar layers detachably connected to one another, the probe and the probe support board being formed of materials having a low temperature coefficient of thermal expansion. A heated/cooled wafer positioning chuck controls the temperature of the wafer thereon during static and dynamic testing.
    Type: Grant
    Filed: June 9, 1983
    Date of Patent: January 28, 1986
    Assignee: Texas Instruments Incorporated
    Inventors: Douglas A. Buol, Dean N. Mize, John W. Pattschull, Robert M. Wallace
  • Patent number: 4564953
    Abstract: A programmable high resolution timing system includes a selectable modulus prescaler counter. In one embodiment a high frequency clock is coupled to a prescaler counter which provides an output signal every predetermined number of clock pulses. The prescaler is coupled to a period counter which provides a period signal after a predetermined number of prescaler output signal pulses. The prescaler and period counter are coupled to a memory which stores data corresponding to the selected modulus of the prescaler and the number of counts by which the period counter output signal is to be delayed. The period resolution is thus made substantially equal to the resolution of the high frequency clock by varying the prescaler modulus at programmable intervals.
    Type: Grant
    Filed: March 28, 1983
    Date of Patent: January 14, 1986
    Assignee: Texas Instruments Incorporated
    Inventor: Paul M. Werking
  • Patent number: 4562812
    Abstract: Method and apparatus for ignition control of an internal combustion engine provide for computation of an ignition instant based upon operating parameters of the engine measured during a preceding ignition cycle. A device for controlling the ignition of the engine includes a central calculating unit (17) and a peripheral input/output unit (1) controlled by a micro-code program stored in a micro-code ROM (18). Computation of engine speed is accomplished by a disk (5a) having teeth on the periphery (5b), and cooperating with a magnetic detector (5d), the disk being rigid with the crankshaft of the engine to be controlled.
    Type: Grant
    Filed: January 20, 1984
    Date of Patent: January 7, 1986
    Assignee: Texas Instruments Incorporated
    Inventor: Gerard Chauvel
  • Patent number: 4553436
    Abstract: A silicon accelerometer employing the piezoresistive effect of single crystal silicon to measure the flexure of semiconductor beams supporting a semiconductor mass. In one embodiment a rectangular semiconductor center mass is supported at each corner by a semiconductor beam parallel to one side of the center mass and perpendicular to the adjacent beams, each of the beams having an implanted resistor at the stationary end thereof. The crystal planes and relative orientations of the resistors are selected so that two resistors always increase, and two always decrease their resistance by the same amount as the center mass is displaced, which allows them to be connected in a Wheatstone bridge having a symmetric differential output.
    Type: Grant
    Filed: November 9, 1982
    Date of Patent: November 19, 1985
    Assignee: Texas Instruments Incorporated
    Inventor: Jan I. Hansson
  • Patent number: 4546370
    Abstract: Monolithic integration of digital logic circuitry, precision control circuitry, and high voltage interface circuits on the same semiconductor chip is achieved, using various combinations selected from D-MOS, vertical NPN, lateral NPN, PNP, P-MOS, N-MOS, and J-FET components. Cathode driver circuits for a plasma display panel are integrated with this technology. Other applications include automotive and television circuits.
    Type: Grant
    Filed: November 21, 1984
    Date of Patent: October 8, 1985
    Assignee: Texas Instruments Incorporated
    Inventor: Patrick A. Curran
  • Patent number: 4544257
    Abstract: The specification discloses an automatic shutter timing control for a camera. A voltage supply is applied to a capacitor (38). An electronic switch such as a PMOS gate (44) has conductive and non-conductive states and is connected across the capacitor (38). A pair of transistors (32) and (40) are interconnected in a current mirror configuration and are connected between the voltage supply and the capacitor (38) and are operable in conjunction with a charging resistor (30) such that the capacitor (38) may be charged to a predetermined voltage when the PMOS device (44) is in a non-conductive state. A transistor (54) is operable to receive an electrical control signal in order to sink current from the charging resistor (30) and to prevent current flow through the PMOS device (44). A comparator (42) is responsive to a predetermined voltage on the capacitor (38) to control the camera shutter.
    Type: Grant
    Filed: April 6, 1984
    Date of Patent: October 1, 1985
    Assignee: Texas Instruments Incorporated
    Inventors: Hideo Taka, Bernhard H. Andresen
  • Patent number: 4536738
    Abstract: A programmable circuit arrangement is described which can be programmed by applying a programming voltage so that it delivers at its output a signal having a predetermined binary value. The circuit arrangement comprises an input means responsive to the programming voltage. Further, it comprises a conducting means connected to the input means and capable of being brought to a non-conductive state upon application of the programming voltage to the input means. The circuit arrangement further comprises an output means connected to the conductive means and delivering a signal having one binary value in the conductive state of the conductive means and the other binary value in the non-conductive state of the conductive means.
    Type: Grant
    Filed: January 24, 1983
    Date of Patent: August 20, 1985
    Assignee: Texas Instruments Incorporated
    Inventors: Horst Huse, Werner Elmer
  • Patent number: 4536664
    Abstract: A high speed, noninverting circuit for providing an interface between transistor-transistor logic gates and Schottky transistor logic gates. In one embodiment the output of a TTL circuit is coupled through a Schottky diode to an emitter-follower whose input is Schottky clamped. The output of the emitter-follower is coupled to a constant current sink and to the cathode of a low barrier Schottky diode, the anode of which forms the STL-compatible output of the interface circuit. The present circuit thus performs a noninverting level translation with minimum propagation delay.
    Type: Grant
    Filed: February 16, 1983
    Date of Patent: August 20, 1985
    Assignee: Texas Instruments Incorporated
    Inventor: Robert C. Martin
  • Patent number: 4524346
    Abstract: Analog AC to digital signal converter includes a sampling circuit which cyclically samples the analog AC signal to form analog sampling values, and an analog-digital converter for converting the analog sampling values to digital sampling values. A sign integrator integrates the sign of the digital sampling values, and a compensating voltage generator generates a compensating voltage in dependence upon the integration result. A combination circuit combines the compensating voltage with the analog sampling value from the sampling means and applies the combination result to the analog-digital converter. The circuit compensates any DC voltage component contained in the analog AC signal and avoids interferences resulting from such DC voltage component.
    Type: Grant
    Filed: July 2, 1982
    Date of Patent: June 18, 1985
    Assignee: Texas Instruments Incorporated
    Inventors: Hartmut Bosserhoff, Wolfgang Steinhagen, Ulrich Joeres
  • Patent number: 4520476
    Abstract: An apparatus for enabling full duplex operation of a co-located transmitter and receiver on the same frequency. Directional couplers in the transmit and receive transmission lines (or line) provide continuous samples of transmit and receive signals to an adaptive combiner. The combiner includes a ninety degree quadrature hybrid for producing in-phase and quadrature signals from the transmit sample, inverters for each of the in-phase and quadrature signals to selectively invert them, attenuators to controllably attenuate each of the in-phase and quadrature signals, and a summer to add the selectively inverted and attenuated in-phase and quadrature signals with the receive signal sample to cancel portions of the receive signal deriving from the transmit signal.
    Type: Grant
    Filed: December 13, 1982
    Date of Patent: May 28, 1985
    Assignee: Rockwell International Corporation
    Inventor: Eugene P. Searl
  • Patent number: 4520277
    Abstract: A three terminal power switch utilizing a lateral thyristor switching circuit is disclosed which exhibits very high gain for both turn-on and turn-off. The gate turn-off capability of the lateral thyristor is accomplished utilizing a secondary shunting thyristor to pull current out of the gate in response to the turn-off signal. The output thyristor is designed to maximize its turn-off gain, and the drive thyristor is designed for optimum forward conduction characteristics; the output thyristor carries approximately ten times the current of the drive thyristor, in one embodiment.
    Type: Grant
    Filed: May 10, 1982
    Date of Patent: May 28, 1985
    Assignee: Texas Instruments Incorporated
    Inventor: Larry A. Hahn
  • Patent number: 4517455
    Abstract: A dual peak detector circuit containing a first circuit for receiving the input voltage and storing the maximum value of the input voltage and a second circuit for receiving the input voltage and storing the minimum value of the input voltage. Both are connected to third circuit which also receives the input voltage and provides an output when the input voltage transitions from the maximum input value to the minimum input value. When the input voltage transitions from the minimum input value to the maximum output value, the third circuit alters the output to indicate the input voltage change.
    Type: Grant
    Filed: October 4, 1982
    Date of Patent: May 14, 1985
    Assignee: Texas Instruments Incorporated
    Inventors: Willie B. Benitez, III, Billy R. Masten
  • Patent number: 4516223
    Abstract: A bipolar ROM having a polysilicon PN junction diode as the matrix element for each bit of storage, wherein the diode is constructed laterally to the associated word line of the array. The word line and diode are implanted with impurities, then metal is deposited on the exposed surfaces of the polysilicon and the structure undergoes a sintering process. A layer of oxide covers the structure and a metal bit line connection is made to the diode P-type section, while the word line and other section of the diode are N-type. P and N type regions may be interchanged, as the polarity of a bit line or word line is a function of drive and sense circuitry. This combination of structure and method allows the use of polysilicon because of the lower sheet resistance and higher speed. Also, the use of PN junction diodes is possible instead of a design requiring Schottky diodes or transistors as matrix elements.
    Type: Grant
    Filed: August 3, 1981
    Date of Patent: May 7, 1985
    Assignee: Texas Instruments Incorporated
    Inventor: Donald A. Erickson
  • Patent number: 4516087
    Abstract: A method and apparatus for generating an MSK detectable signal with reduced side lobe energy of the type in which the MSK detectable signal has two combined orthogonal channels to transmit a data signal. A predetermined channel envelope modulation waveform pattern is selected in accordance with a group of data bits, and the respective orthogonal channels are amplitude modulated with the selected predetermined waveforms. The addition of the orthogonal channels results in a constant amplitude signal with greatly reduced energy in the higher order sidelobes.
    Type: Grant
    Filed: April 12, 1982
    Date of Patent: May 7, 1985
    Assignee: Rockwell International Corporation
    Inventor: Warren B. Bruene
  • Patent number: D282765
    Type: Grant
    Filed: May 16, 1983
    Date of Patent: February 25, 1986
    Inventor: Ronald P. Shipman