Abstract: An enhanced telephony call waiting feature and apparatus is provided wherein identifying information related to a third party wishing to converse with a first party already communicating with a second party is provided to the first party during a mute condition in a manner that minimizes the time period of the mute condition. The method is fully compatible with existing services while allowing for new services. The method comprises the steps of the local switching office sending a call waiting tone having predetermined characteristics to the first party and its apparatus responding thereto by generating an acknowledgment signal. The apparatus then initiates a mute condition simultaneous with the ACK signal generation, or in response to detection of a carrier signal, or at some other time after exchange of the call waiting tone and/or the acknowledgment signal has occurred.

Abstract: There is described a stacked assembly of a plurality of modules (32, 33, 36) and a timepiece (1) including such an assembly forming a movement (3). The modules are mounted via assembly orifices on a plurality of mounting pins (24) and assembled by compression between first and second planes (23, 25). In order to absorb variations in thickness (e) in a first element (34) of the assembly, the latter includes a plurality of tube-shaped intermediate elements, called stepped tubes (8), mounted respectively on the mounting pins, each stepped tube being inserted in an assembly orifice (34a) of the first element.

Abstract: A single crystal semiconductor region is fabricated in a semiconductor wafer. The region is either cantilevered, supported at one or both ends, or midpoint, or supported at multiple locations. After a pattern and etch step, a dielectric fill step is performed to define the boundaries of the region in the semiconductor wafer. Oxygen or nitrogen is implanted in the semiconductor wafer on a surface area of the semiconductor wafer that corresponds to a top surface of the region. The annealing of the oxygen or nitrogen ions convert the silicon to an oxide or a nitride beneath the surface area. The silicon dioxide or silicon nitride is etched away to produce a semiconducting region of a single crystal material.

Abstract: A method for manufacturing a semiconductor device comprising of the steps of creating an oxide layer on a first surface of an epitaxial layer having damage layer located at a predetermined depth from the first surface, the damaged layer being in parallel alignment with the first surface. Then, using the oxide layer as a masked, etch the epitaxial layer to create a plurality of pillars, the plurality of pillars being enclosed in a first area of the top surface of the epitaxial layer, the first area having a predefine perimeter and the plurality of pillars being separated from each other by inner trenches and from the perimeter by a perimeter trench, the inner trenches and perimeter trench extend from the first surface to at least the predetermined depth of damaged layer. Form an oxide layer that coats the pillars, fills the perimeter trench and coats the sides and bottoms of the inner trenches prior to removing the oxide layer from at least the sidewalls and bottom of the inner trenches.

Abstract: A series of connections of photodiodes has a plurality of alternating N-type conductivity surface areas with P-type conductivity surface areas with each member of the P-type conductivity surface areas being separated by a member of N-type conductivity surface areas. Metal conductors connect the P-type conductivity areas to the N-type conductivity areas at an N+ implanted area within the N-type conductivity surface area to form the series connection of photodiodes.

Abstract: There is described an FM receiver (29) including; an antenna (2) able to receive a high frequency signal from a transmitter; a high frequency stage (3); an oscillator (5); a mixer unit (30) able to provide a signal (S6) at an intermediate frequency (fIF); an FM demodulation stage (8); and an automatic frequency control stage (36) able to control the oscillator, so as to keep said intermediate frequency (fIF) of said signal (S6) constant. This receiver further includes a locked loop (32) arranged to enslave said intermediate frequency (fIF) from a pilot frequency (fp) present in the demodulated signal. One advantage of such a locked loop is that the intermediate frequency is enslaved so that the aliasing phenomenon does not prevent demodulation of the signals containing the RDS data.

Abstract: The method consists in using a setting device for jewel holes or prismatic jewels including at least a reference plane, on which the jewel to be fixed is wedged, said plane including at least spatial positioning means for said jewel, such as studs or cavities. Once the jewel is set in place, it is secured to its housing by applying a laser beam to its edge, possibly with the addition of a fusible material.

Abstract: A semiconductor high-voltage device comprising a voltage sustaining layer between a n+-region and a p+-region is provided, which is a uniformly doped n(or p)-layer containing a plurality of floating p(or n)-islands. The effect of the floating islands is to absorb a large part of the electric flux when the layer is fully depleted under a high reverse bias voltage so as the peak field is not increased when the doping concentration of voltage sustaining layer is increased. Therefore, the thickness and the specific on-resistance of the voltage sustaining layer for a given breakdown voltage can be much lower than those of a conventional voltage sustaining layer with the same breakdown voltage. By using the voltage sustaining layer of this invention, various high voltage devices can be made with better relation between specific on-resistance and breakdown voltage.

Abstract: An N type buried layer is formed, in one embodiment, by a non selective implant on the surface of a wafer and later diffusion. Subsequently, the wafer is masked and a selective P type buried layer is formed by implant and diffusion. The coefficient of diffusion of the P type buried layer dopant is greater than the N type buried layer dopant so that connections can be made to the P type buried layer by P wells which have a lower dopant concentration than the N buried layer.

Abstract: An EPROM structure includes a NMOS transistor integrated with a capacitor. The terminal names of the NMOS transistor follow the conventional nomenclature: drain, source, body and gate. The gate of the NMOS transistor is connected directly and exclusively to one of the capacitor plates. In this configuration, the gate is now referred to as the “floating gate”. The remaining side of the capacitor is referred to as the “control gate”.

Abstract: The invention concerns electronic chronograph watches which include a central hour hand (3), a central minute hand (4) and a small off-central second hand (6) for permanently indicating the current time, chronograph hands (7, 8, 9) for indicating a measured time when the watch is operating in chronograph mode, drive units for driving said hands and generator means responding to manual control means (P1, P2, 10) to apply control pulses to said drive units. According to the invention, the watch also includes a central second hand (5) driven by its own drive unit and the generator means include means for selectively applying the control pulses to this drive unit, so that the central second hand indicates the seconds of the current time, in phase with the small off-center second hand (6), when the watch is operating normally and the measured seconds when the watch is operating in chronograph mode.

Abstract: An EPROM structure includes a NMOS transistor integrated with a capacitor. The terminal names of the NMOS transistor follow the conventional nomenclature: drain, source, body and gate. The gate of the NMOS transistor is connected directly and exclusively to one of the capacitor plates. In this configuration, the gate is now referred to as the “floating gate”. The remaining side of the capacitor is referred to as the “control gate”.

Abstract: There is disclosed an improved sub-aqua device suitable for towing a person through the water. Specifically there is disclosed a sub-aqua device including: a support member; a pair of manoeuvring planes for manoeuvring the device, each defining an elevation plane; and a means for controlling each manoeuvring plane including a handle, each handle extending in a plane coincident with the respective elevation plane.

Abstract: A technique for supplying drive voltage to the gate of a high-side depletion-mode N-channel MOS-device for high-side switches or any circuit with a depletion-mode N-channel MOS-device with its source at a voltage above local ground.