Abstract: A multiplication circuit having a Booth decoder, a partial product generator and a computation and formatting circuit. An incrementing device is combined with the computation circuit, enabling an anticipated incrementation if it is desired to obtain a rounded result.

Abstract: A circuit to detect the crossing of at least one voltage threshold by an input voltage of an integrated circuit has two arms mounted in negative feedback configuration, each comprising a forward biased diode in series with a current generator. The current generator of an arm is controlled in voltage by the other arm. An inverter calibrated to detect a crossing of a given threshold is connected at input to the connection point between the diode and the generator of one of the arms.

Abstract: Distortion control in a push-pull output stage of a speech amplifier of a telephone powered through the telephone line is more effectively and advantageously implemented by independently sensing an eventual state of saturation reached by any of the two output transistors of the amplifier, summing the current signals representative of the sensed state of saturation of either or both output transistors, integrating the resulting sum current signal to produce a DC signal and using the DC signal for activating an AGC loop. The DC signal indiscriminately accounts for any cause of saturation, though virtually representing the level of the amplified AC signal. Distortion may be controlled without penalizing output voltage swing and power consumption.

Abstract: A method of determining an object's position and associated apparatus provides positional information in a form that may be conveniently communicated to a computer to calculate the object's position. In a preferred embodiment, representatively incorporated in a computer keyboard, a method of determining an object's position includes forming an optical grid of reflected beacons and detecting an obstruction of the reflected beacons. The preferred embodiment apparatus utilizes a single light source and a single light sensor to detect an object's position in two dimensions.

Abstract: A ROM cell array in which the drains are more lightly doped than the sources. This reduces the worst-case capacitance seen by the bitlines, and consequently reduces the access time of the memory.

Abstract: A programmable cell and a multibit register composed of a plurality of such cells, specifically for performing a coincidence check between a certain code permanently recorded in the cell or cells and a logic configuration present on a pair or on a plurality of pairs of control lines are disclosed. Each cell has two branches connected in OR configuration to a common sensing line of the cell or of the multibit register. The logic states to be tested for coincidence are applied in a complemented form through a pair of lines to each cell, that is to the two branches of the cell. Each cell, permanently programmed in one or the other of its branches, intrinsically performs a comparison between its permanently programmed logic configuration and the configuration of the complemented control lines associated therewith. A great simplification is achieved in the overall circuitry of a redundance or reconfiguration system.

Abstract: The use of electromechanical devices for the configuration of the address for access to a peripheral unit in a data-processing system is avoided by replacing them with a non-volatile EEPROM-type memory. The data in non-volatile memory is read as soon as the peripheral unit is put into operation, and the information that it delivers is stored in volatile memory and used as a comparison address to validate the operation of the peripheral unit.

Abstract: The dynamic range of operation of a differential transconductance input stage is reduced when the amplitude of the input signal decreases, thus reducing the level of the noise that is generated by the input stage. A DC signal representative of the sensed amplitude of the input signal is employed for either reducing the value of a common, emitter-degenerating resistance or of the bias current that is forced in the two branches of the differential input stage.

Abstract: A device and method for providing a frame buffer interface to a serial rendering system which automatically synchronizes with data in the rendering path before blanking the active frame. To prevent rewriting to a frame buffer of rendered data before the current rendered data can be displayed, the disclosed embodiment provides that when the data is ready to be displayed, all further writes to the buffer are suspended, while all other accesses throughout the system are allowed to proceed. When the vblank command is received, data is passed to the display system for display, and writes to that buffer are re-enabled. When writes to a specific buffer portion are suspended, all other processes may continue independently.

Abstract: An improved fabrication process employing relatively non-critical masks permits the fabrication of high density electrically programmable and erasable EEPROM or FLASH-EPROM devices. In practice the novel process permits the fabrication of a contactless, cross-point array providing for a more comfortable "pitch" of bitline metal-definition while realizing a cell layout with a gate structure which extends laterally over adjacent portions of field oxide, thus establishing an appropriate capacitive coupling between control and floating gates. Two alternative embodiments are described.

Abstract: A circuit for the generation of a time-stabilized output pulse Iout comprises a capacitor biased by two completely independent voltages whose bias voltages are filed by a current generator through current mirrors and are therefore very stable.

Abstract: The differential input stage of a sense amplifier is provided with a positive feedback for introducing a predefinable hysteresis that will prevent spurious transitions of the output of the sense amplifier, enhancing noise immunity. The positive feedback is realized by employing an inverting amplifying stage, which will introduce an hysteresis on one of the two switching phases. The thresholds of the sense amplifier may be made symmetric by modifying the area ratio of the load transistors.

Abstract: A read circuit for memory cells which has two legs, each having, in cascade with one another, an electronic switch (SW1,SW2), an active element (T1,T2), feedback connected to the active element in the other leg to jointly produce a voltage amplifier, and a switch load element (L1,L2). Each active element is driven through a high-impedance input circuit element.

Abstract: An oversampling digital filter with Finite Impulse Response is implemented using a serial structure having a memory for the coefficients, a memory for the signal samples to be filter, a multiplier connected to the output of the memories, an accumulator connected to the output of the multiplier, and a simple control unit which controls these elements according to an input clock signal.

Abstract: Methods and test platforms for developing an application-specific integrated circuit incorporating, on the same chip, a signal processor core, RAM memory and ROM memory intended to receive a management program and processing program, and input-output management peripherals specific to the application. The signal processor, RAM memory and ROM memory correspond respectively to existing separate IC components. The processing program is developed and tested on a test platform including at least these separate IC components together with a core-emulation integrated circuit, which includes the signal processor core in a minimal configuration. An interface program and diagnostic interface logic allows the platform to be controlled from a microcomputer, which can thereby implement automatic chaining of tests.

Abstract: The speech circuit matches the impedance of the telephone line by synthesizing a complex impedance using a positive feedback loop which has a single resistor (11), and cancels out the side tone using a subtractor (20') which extracts from the signal (Va) coming from the line a signal (Vb) correlated to the signal to be transmitted. In order to achieve cancellation of the side tone unaffected by the noise produced in the impedance synthesizing circuits, the signal (Vb) is derived by processing the signal present in the resistor (11) at the output of the feedback loop.

Abstract: Nonuniformities of luminance characteristics in a field emission display (FED) are compensated pixel by pixel by storing a matrix of correction values, determined by testing, and by applying a corrected drive signal through the relative column drive stages. The individual pixel's correction factor that is applied to the corresponding video signal may be stored in digital or analog form in a nonvolatile memory array. Various embodiments are described including the use of a second updatable RAM array wherein pixel's correction factors are calculated and stored at every power-on to provide an opportunity of trimming-up the luminance of the display for compensating long term decline of luminance due to the phosphors ageing process.

Abstract: An improved fabrication process employing relatively non-critical masks permits the fabrication of high density electrically programmable and erasable EEPROM or FLASH-EPROM devices. In practice the novel process permits the fabrication of a contactless, cross-point array providing for a more comfortable "pitch" of bitline metal-definition while realizing a cell layout with a gate structure which extends laterally over adjacent portions of field oxide, thus establishing an appropriate capacitive coupling between control and floating gates. Two alternative embodiments are described.

Abstract: Converter topologies in which two separate switching transistors and two capacitors are used on the input side. Preferably the two transistors are switched alternately, to alternately pull down different nodes in an inductor-capacitor chain. Two capacitors are interposed in series between an input inductor on the input and a transformer primary winding. Preferably the two transistors are connected with their parasitic diodes in opposite senses, so that one can source current from a first node to ground when off, and the other can sink current from a second node to ground when off.

Abstract: A reference voltage generator having a dual slope temperature characteristic, for use in an automotive alternator voltage regulator, comprises a bandgap circuit (R1,R2,R3,R4) which generates a voltage (A) having a thermal drift coefficient of zero and a voltage (B) having a non-zero thermal drift coefficient. These voltages are applied to a voltage divider (R5,R6) and a voltage-follower type of circuit (OPA1). A unidirectional conduction amplifier circuit (OPA2) has an input terminal connected to an intermediate point (C) on the voltage divider. A second voltage divider (R7,R8) is connected between the output terminals of the voltage-follower circuit (D) and the amplifier circuit (E) . An intermediate node (F) of the second voltage divider is coupled to an output terminal (VREF) of the generator.