Patents Represented by Attorney Robert J. Depke
  • Patent number: 6803131
    Abstract: Fine projections on a magnetic layer surface are controlled so as to reduce a media noise and improve C/Nmedia characteristic. A magnetic recording medium allows reproduction through a MR head or a GMR head. The magnetic layer on a main surface of a non-magnetic base has a coercive force of 80 KA/m or more and 180 KA/m or less. Assuming that a height of the fine projections is h and a diameter of the fine projections at a half-height h/2 is &phgr;h/2, 99% of the fine projections having a height not less than 10 nm satisfy a relationship as expressed by 100 nm≧&phgr;h/2≧40 nm.
    Type: Grant
    Filed: September 6, 2002
    Date of Patent: October 12, 2004
    Assignee: Sony Corporation
    Inventors: Naoki Ikeda, Seiichi Onodera
  • Patent number: 6803304
    Abstract: A method for producing an electrode enabling fabrication of small electrodes at a high dimensional accuracy without being affected by the number of connections between chips, comprising the steps of forming an insulating film on an interconnection pattern of a semiconductor chip, forming a mask layer having an opening on the insulating film at a position where an electrode is to be formed, removing the insulating film within the opening by using the mask layer as a mask to expose a portion of the interconnection pattern, forming a conductor layer on the exposed interconnection pattern and the mask layer, removing the conductor layer formed on the mask layer while leaving the conductor layer formed on the exposed interconnection pattern, and removing the mask layer, and a method for producing a semiconductor device provided with such electrode.
    Type: Grant
    Filed: September 10, 2001
    Date of Patent: October 12, 2004
    Assignee: Sony Corporation
    Inventor: Yukio Asami
  • Patent number: 6798493
    Abstract: A photolithography apparatus includes a laser beam source, a focusing lens, a detecting unit, and a control unit. The laser beam source emits a laser beam. The focusing lens is disposed in the near field of an exposure surface of an exposure substrate for receiving the laser beam emitted from the laser beam source. The detecting unit detects one linearly polarized component of the laser beam reflected from the distal end surface of the focusing lens. The control unit controls the distance between the distal end surface of the focusing lens and the exposure surface based on a detection signal supplied from the detecting unit.
    Type: Grant
    Filed: February 24, 2003
    Date of Patent: September 28, 2004
    Assignee: Sony Corporation
    Inventor: Shingo Imanishi
  • Patent number: 6799306
    Abstract: Layout of a high-speed signal wiring on a power supply plane is checked and specified at an optimum position capable of minimizing a spurious electromagnetic radiation so as not to affect other wiring layers. When a high speed signal line which is an object to be checked exists on a power supply plane, a perpendicular distance between the high speed signal line and the plane which is nearest to the signal line is determined, and compared with a minimum required distance computed therefor in advance on the basis of its circuit specification of the high speed signal line. If the perpendicular distance determined does not exceed the minimum required distance computed, an appropriate message corresponding to the name of the high speed signal line is displayed.
    Type: Grant
    Filed: June 1, 2001
    Date of Patent: September 28, 2004
    Assignee: Sony Corporation
    Inventors: Kenji Araki, Ayao Yokoyama
  • Patent number: 6791657
    Abstract: A light control device includes a GH cell and a polarizer wherein a host material is made of a negative type liquid crystal whose dielectric anisotropy is negative and a guest material is made of a dichromatic positive type dye. The polarizer is provided at a side of light incident on the polarizer. A cell gap ranges from 2 &mgr;m to 4 &mgr;m, at least, in an effective light path.
    Type: Grant
    Filed: September 5, 2001
    Date of Patent: September 14, 2004
    Assignee: Sony Corporation
    Inventors: Toshiharu Yanagida, Toru Udaka, Masaru Kawabata
  • Patent number: 6791810
    Abstract: There is provided a protection circuit of a field effect transistor having a structure which can be fabricated without restricting a pattern layout and without increasing a process step. A protection circuit of a field effect transistor is a protection circuit of a Schottky gate HFET, and is a circuit in which a forward direction diode and a reverse direction diode are cascade-connected to form a diode unit and two such diode units are connected in series, and a gate line connected to a gate electrode of the HFET is grounded through the protection circuit. The diodes are diodes formed integrally with the Schottky gate HFET which is protected against surge breakdown, and are constituted as Schottky barrier diodes made of an n+-GaAs cap layer formed on a GaAs substrate and Schottky electrodes formed on the n+-GaAs cap layer.
    Type: Grant
    Filed: May 22, 2001
    Date of Patent: September 14, 2004
    Assignee: Sony Corporation
    Inventors: Mitsuhiro Nakamura, Shinichi Wada
  • Patent number: 6784014
    Abstract: A process for producing a solid-state imaging device which includes the steps of forming a light-receiving portion of a pixel in a surface region on the substrate, forming above the light receiving portion an inter-layer dielectric having a depression in its surface, forming on the inter-layer dielectric a light transmitting film having in its surface a concave conforming to the depression, forming at the position that covers the concave on the light transmitting film a mask layer with a convexly curved surface, and etching the mask layer and the light transmitting film all together, thereby making the light transmitting film into a shape of convex lens with an upwardly curved surface.
    Type: Grant
    Filed: August 21, 2001
    Date of Patent: August 31, 2004
    Assignee: Sony Corporation
    Inventor: Kouichi Tanigawa
  • Patent number: 6782927
    Abstract: A can filler valve wiper mechanism for use with a can filler machine is disclosed. The can filler machine includes mechanism for moving a can along a predetermined can travel path, and a movable filler valve which moves along a predetermined filler valve travel path above at least a portion of the can travel path. A can wiper mechanism comprises a rotating wiper, which can be a common paint roller. The rotating wiper is disposed at a location between a moving can and a moving can filler valve located above the can so that the wiper engages and collects material located between the valve and can. Preferably, the wiper engages the bottom of the filler valve itself as the valve passes the wiper.
    Type: Grant
    Filed: December 3, 2002
    Date of Patent: August 31, 2004
    Assignee: Ace Hardware Corporation
    Inventor: Charles L. McGehee
  • Patent number: 6780793
    Abstract: An improved method for producing a semiconductor device with a fluorine-doped silicon oxide interlayer insulating film. In one embodiment, the fluorine-doped silicon oxide layer (FSG layer) is formed in a process chamber. Thereafter, a silicon oxide layer is formed in the same process chamber over the FSG layer at a higher temperature than the FSG layer formation temperature. In another embodiment, after the FSG layer is formed, a surface layer of the FSG layer is selectively sputtered away before the silicon oxide layer is formed.
    Type: Grant
    Filed: September 19, 2001
    Date of Patent: August 24, 2004
    Assignee: Sony Corporation
    Inventors: Yoshiyuki Tanaka, Yoshiyuki Enomoto, Masaki Saito
  • Patent number: 6780692
    Abstract: In a method of fabricating a thin film transistor through conversion of an amorphous silicon film into a polysilicon film to be an active layer of the thin film transistor by a laser annealing treatment, a laser annealing apparatus comprising a plurality of semiconductor laser devices arranged performs the laser annealing treatment by irradiating the surface of the amorphous silicon film with laser light uniformized in the light intensity of the laser light radiated onto the surface of the amorphous silicon film, whereby the crystal grain diameter of the polysilicon film obtained through recrystallization is uniformized, and it is possible to obtain a thin film transistor with transistor characteristics enhanced by using the polysilicon film as the active layer.
    Type: Grant
    Filed: August 8, 2002
    Date of Patent: August 24, 2004
    Assignee: Sony Corporation
    Inventors: Koichi Tatsuki, Koichi Tsukihara, Naoya Eguchi
  • Patent number: 6777355
    Abstract: A manufacturing apparatus for a semiconductor device comprises: a clean room for installing a plurality of semiconductor manufacturing and processing apparatuses; an external air cleaning device connected to a supply port of the clean room for supplying a cleaned-up outside air into the clean room; a common air duct section installed in the clean room; a first air cleaning and ventilating means connected to said common air duct section for cleaning and ventilating a part of the cleaned-up outside air to the common air duct section; individual air duct section branched off from the common air duct section and connected to each of said semiconductor manufacturing and processing apparatuses; and a second air cleaning and ventilating means interposed between the individual air duct section and each of the semiconductor manufacturing and processing apparatuses for cleaning and ventilating the air to be supplied to each of the semiconductor manufacturing and processing apparatuses.
    Type: Grant
    Filed: November 20, 2003
    Date of Patent: August 17, 2004
    Assignee: Sony Corporation
    Inventors: Toshiro Kisakibaru, Isao Honbori, Yasushi Kato, Toshikazu Suzuki, Hirohisa Koriyama, Hayato Iwamoto, Hitoshi Abe
  • Patent number: 6778171
    Abstract: A method of tracking objects that allows objects to be tracked across multiple scene changes, with different camera positions, without losing track of the selected object. In one embodiment, a method of tracking an object using a computer, a display device, a camera, and a camera tracking device, the computer being coupled to the display device, the camera and the camera tracking device is disclosed. The method includes: A first image from within a field-of-view of the camera is captured. The first image, which includes an actual object with a tracking device, is displayed on the display device. Information about the tracking device's location is received. The information is used to create a virtual world reflecting the actual object's position within the field-of-view of the camera as a shape in the virtual world. Information about the camera tracking device is received. A virtual-camera position in the virtual world is created.
    Type: Grant
    Filed: October 31, 2000
    Date of Patent: August 17, 2004
    Assignee: Eagle New Media Investments, LLC
    Inventor: Dan Kikinis
  • Patent number: 6773970
    Abstract: A method of producing a semiconductor device able to prevent outward diffusion of an impurity from a gate electrode and improve the device quality, the method comprising the steps of forming a gate electrode made of a semiconductor layer on a substrate (preferably SOI substrate) via a gate insulating film, forming a first insulating film coating the gate electrode by ALD, forming a second insulating film on a first insulating film, introducing an impurity to a substrate (preferably silicon active layer of the SOI wafer) to form a source/drain region by self-alignment with respect to the gate electrode, and forming an interlayer insulating film on the second insulating film.
    Type: Grant
    Filed: February 19, 2003
    Date of Patent: August 10, 2004
    Assignee: SonyCorporation
    Inventor: Hiroshi Komatsu
  • Patent number: 6773091
    Abstract: The present invention relates to a liquid discharge device, and a method of manufacturing the liquid discharge device. Particularly, the present invention relates to a liquid discharge device in a system in which droplets are ejected by heating with a heating element, and which is capable of effectively avoiding deterioration in reliability due to damage to a protecting layer. In the present invention, heat treatment is performed for stabilizing the connection between the heating element and a wiring pattern, and then an anti-cavitation layer is formed.
    Type: Grant
    Filed: December 2, 2002
    Date of Patent: August 10, 2004
    Assignee: Sony Corporation
    Inventors: Takaaki Miyamoto, Shogo Ono, Osamu Tateishi, Toshimitsu Sato
  • Patent number: 6773745
    Abstract: A method of producing a magnetic recording medium comprising the step of forming a magnetic layer on a non-magnetic base film running at a constant speed by continuous oblique evaporation depositing metal vapor of volatilized metal incident obliquely to a surface of the non-magnetic base film, wherein the evaporation is conducted at a film forming rate, defined as an average deposition rate of the magnetic layer at a part of the non-magnetic base film exposed to the incident metal vapor, of not less than a predetermined rate to form an internal microstructure of the magnetic layer comprising columns each having a diameter of not more than about 15 nm constituted by magnetic particles having a size of not more than about 10 nm connected in chains in a direction substantially perpendicular to the magnetic layer and non-magnetic particles packed between the columns and separating the columns from each other, and a magnetic recording medium produced by the above method.
    Type: Grant
    Filed: August 14, 2002
    Date of Patent: August 10, 2004
    Assignee: Sony Corporation
    Inventors: Yuichi Arisaka, Junichi Tachibana, Takuya Ito, Yoh Iwasaki
  • Patent number: 6774444
    Abstract: A method for making a solid-state imaging device that can form a first P-type well region deep in a substrate without being affected by the heat applied during an epitaxial growth process is disclosed. The method includes a first step of preparing a substrate composite comprising an first substrate and a second substrate on the first substrate, a second step of implanting impurity ions from the surface of the second substrate at an energy exceeding 3 MeV so as to form a barrier layer, and a third step of forming a photosensor in the second substrate.
    Type: Grant
    Filed: January 22, 2003
    Date of Patent: August 10, 2004
    Assignee: Sony Corporation
    Inventor: Hideshi Abe
  • Patent number: 6768152
    Abstract: In a magnetoresistive effect element in which at least a free layer (12) made of a ferromagnetic material, a nonmagnetic layer (13) made of a nonmagnetic material and a fixed layer (11) made of a ferromagnetic material and of which the magnetization direction is fixed are laminated in that order and in which information can be recorded by the use of a change of magnetization direction in the free layer (12), the free layer (12) is divided into a plurality of regions (12a), (12b), these regions (12a), (12b) are located around a write electrode (8) extending along the direction in which these respective layers (11) to (13) are laminated so as to surround the write electrode (8) and the respective regions (12a), (12b) surrounding the write electrode (8) constitute a magnetic field returning structure for returning a magnetic field.
    Type: Grant
    Filed: February 6, 2003
    Date of Patent: July 27, 2004
    Assignee: Sony Corporation
    Inventor: Yutaka Higo
  • Patent number: 6764737
    Abstract: A method of producing an information recording medium having enhanced planarity with high productivity, comprising steps of processing a surface of a disk substrate by satin-like finishing, heating and pressing the disk substrate through compression using a stamper having relief shapes so as to transfer the relief shapes to at least one satin-like finished surface of the disk substrate, forming a recording layer on the relief shape surface of the disk substrate, and forming a coating layer on the recording layer, and a production apparatus for the information recording medium, and an information recording medium produced by the method of producing.
    Type: Grant
    Filed: October 29, 2002
    Date of Patent: July 20, 2004
    Assignee: Sony Corporation
    Inventors: Nobuyuki Arakawa, Ken Minemura
  • Patent number: 6759256
    Abstract: A semiconductor fabricating method is disclosed. A first container accommodating a predetermined number of semiconductor wafers and labeled with a first identifier and a second container labeled with a second identifier are mounted on a first processing apparatus, and the first and second identifiers are stored. While the first processing apparatus is submitting the semiconductor wafers to a first process, designated ones of the processed wafers are loaded into the second container as sample wafers. The second container is mounted on an inspection apparatus to inspect the sample wafers. Then, the first and second containers are mounted on a second processing apparatus and are identified by comparison of identifiers thereof with the stored first and second identifiers, respectively. The second processing apparatus submits the rest of the processed semiconductor wafers and the inspected sample wafers to a second process, and the processed sample wafers are returned to the first container.
    Type: Grant
    Filed: October 15, 2002
    Date of Patent: July 6, 2004
    Assignee: Sony Corporation
    Inventor: Toshiyuki Makita
  • Patent number: 6756299
    Abstract: A process for fabricating a semiconductor device, which reduces the number of steps required for forming a via hole and a wiring trench in the insulating film comprised of a low dielectric-constant insulating material, resulting in a lower cost for fabrication and a shorter turn around time, is provided. A photosensitive silazane film is exposed and developed to form a hard mask on an interlayer dielectric. The hard mask defines a wiring pattern for a wiring layer and a position of a via hole. Then, a resist film is formed on the interlayer dielectric to form a resist mask having a via hole pattern, and part of a via hole is formed using the resist mask. The interlayer dielectric is subjected to anisotropic etching using the hard mask to form a wiring trench and to allow the via hole to reach the wiring layer, and the wiring layer is exposed.
    Type: Grant
    Filed: November 1, 2002
    Date of Patent: June 29, 2004
    Assignee: Sony Corporation
    Inventor: Naoki Nagashima