Patents Represented by Attorney Robert J. Depke
  • Patent number: 6754095
    Abstract: A D/A converter capable of temporally controlling output of analog data during D/A conversion is provided. The digital to analog converter includes a ferroelectric non-volatile semiconductor memory. The ferroelectric non-volatile semiconductor memory includes a data line, a memory unit which has M memory cells, and M plate lines. Each of the memory cells includes a first electrode, a ferroelectric layer and a second electrode. The first electrode of the memory cells is shared in the memory unit and is connected to the data line. The second electrode of the mth memory cell is connected to the mth plate line. And the area of the ferroelectric layer of the memory cells varies among the memory cells.
    Type: Grant
    Filed: October 29, 2002
    Date of Patent: June 22, 2004
    Assignee: Sony Corporation
    Inventors: Masahiro Tanaka, Toshiyuki Nishihara, Yukihisa Tsuneda
  • Patent number: 6749286
    Abstract: A liquid ejecting device and method control the flying characteristic of liquid while enabling stable ejection of the liquid, without shortening the life of bubble producing units (heating resistors). The liquid ejecting device has heads each including liquid ejecting portions arranged in parallel which each include a liquid cell, bisected heating resistors in the liquid cell which produce bubbles in liquid in the liquid cell in response to the supply of energy, and a nozzle for ejecting the liquid in the liquid cell by using the bubbles produced by the heating resistors. The heating resistors are supplied with energy, and a difference is set between a manner of supplying energy to one heating resistor and a manner of supplying energy to the other heating resistor. Based on the difference, a flying characteristic of the liquid ejected from the nozzle is controlled.
    Type: Grant
    Filed: January 30, 2003
    Date of Patent: June 15, 2004
    Assignee: Sony Cörporation
    Inventor: Takeo Eguchi
  • Patent number: 6747834
    Abstract: A method of correcting a position detection signal with a high precision in a short time and a position detection device able to be made compact and low cost, comprising detectors for outputting position detection signals including two signals having a phase difference of 180 degrees along with movement of an object to be detected and a signal processor for obtaining an offset voltage level by averaging the position detection signals and shifting a position detection signal so that a reference voltage level of a center of amplitude matches the voltage level. Also, the signal processor corrects an amplitude of a position detection signal by using two signals having a phase difference of 90 degrees.
    Type: Grant
    Filed: May 23, 2000
    Date of Patent: June 8, 2004
    Assignee: Sony Corporation
    Inventor: Yasuhiko Matsuyama
  • Patent number: 6744115
    Abstract: A semiconductor device comprising: a first insulating film formed on a semiconductor substrate; a semiconductor layer at least a part of which is formed on the first insulating film; a second insulating film comprising a non-doped silicon oxide film and formed on the semiconductor layer; a third insulating film comprising a silicon oxide film containing at least phosphorus formed on the second insulating film; and a fourth insulating film comprising a non-doped silicon oxide film formed on the third insulating film.
    Type: Grant
    Filed: July 5, 2001
    Date of Patent: June 1, 2004
    Assignee: Sony Corporation
    Inventor: Yuji Sasaki
  • Patent number: 6741621
    Abstract: A laser irradiation apparatus includes a laser light generation element, a splitting element for splitting laser light generated from the laser light generation element, a light interference element for causing a first beam and a second beam of the laser light split by the splitting element to interfere with each other to form a periodic light pattern, and a phase shifting element for electro-optically shifting the phase of the first beam. The laser light generation element is a pulse oscillation laser based on laser diode excitation.
    Type: Grant
    Filed: September 12, 2002
    Date of Patent: May 25, 2004
    Assignee: Sony Corporation
    Inventor: Akihiko Asano
  • Patent number: 6739777
    Abstract: A printer that uses a roll-shaped printing medium comprising a printing surface on which images are printed, a releasably adhered printing portion, and a release portion holding the adhered printing portion includes a conveying device conveying the printing medium while pulling out the printing medium by a predetermined amount every time an image is to be printed; a printing member printing an image with respect to the printing medium conveyed by the conveying device; a half-cutting unit cutting off the printing portion of the printing medium except for the release portion, along the conveying direction of the image printed by the printing member, at the interval corresponding to the dimension of the image in the width direction perpendicular to the conveying direction; and a cutting unit cutting the printing medium along the width direction, at the positions corresponding to the dimension of the aforementioned image in the conveying direction.
    Type: Grant
    Filed: December 10, 2002
    Date of Patent: May 25, 2004
    Assignee: Sony Corporation
    Inventors: Hikaru Kobayashi, Masahiro Uehara
  • Patent number: 6736699
    Abstract: An electrolytic polishing apparatus for electrolytic-polishing a conductive film subject to formed on a substrate including a resistance measuring unit for measuring the resistance of the film. The electrolytic polishing apparatus may also include a termination point detecting portion for detecting a termination point of polishing by reading a variation of the resistance value measured by the resistance measuring unit, or a polishing control portion for terminating electrolytic polishing on the basis of the termination point of polishing detected by the termination point detecting portion.
    Type: Grant
    Filed: August 3, 2001
    Date of Patent: May 18, 2004
    Assignee: Sony Corporation
    Inventors: Takeshi Nogami, Naoki Komai, Hideyuki Kito, Mitsuru Taguchi
  • Patent number: 6730557
    Abstract: A semiconductor device having a bipolar transistor which is capable of high integration, and a semiconductor device in which the bipolar transistor has good characteristic properties. A process for producing said semiconductor device.
    Type: Grant
    Filed: July 10, 2001
    Date of Patent: May 4, 2004
    Assignee: Sony Corporation
    Inventor: Chihiro Arai
  • Patent number: 6722557
    Abstract: An effective method for cleaning flux residues produced in process of fabricating semiconductor devices, and a method of fabricating the semiconductor devices including this cleaning method are provided. The flux cleaning method for cleaning the solder bump electrodes formed using a flux comprises the steps of: applying a pretreatment process including coating of the solder bump electrode with the flux and applying a heat treatment thereto, and carrying out the flux cleaning to clean the heat-treated flux.
    Type: Grant
    Filed: May 17, 2001
    Date of Patent: April 20, 2004
    Inventor: Tohru Tanaka
  • Patent number: 6721342
    Abstract: Disclosed is an array type semiconductor laser device including a plurality of semiconductor laser chips each of which has an active layer for forming a light emitting point, wherein the semiconductor laser chips are arrayed on the same substrate in such a manner as to be spaced from each other at intervals. In this laser device, an array configuration of the semiconductor laser chips is specified such that a gap between arbitrary adjacent two laser chips located inwardly from both outermost laser chips positioned at both the edges of the semiconductor laser device is wider than a gap between each of said outermost laser chips and an LD chip adjacent thereto. This laser device is advantageous in reducing the effect of thermal interference mutually exerted on the laser chips, thereby ensuring a thermal uniformity over the entire laser chips.
    Type: Grant
    Filed: January 15, 2003
    Date of Patent: April 13, 2004
    Assignee: Sony Corporation
    Inventors: Yoshifumi Yabuki, Tsuyoshi Tojo
  • Patent number: 6720742
    Abstract: A light control device comprises a liquid crystal cell 12, and a pulse control unit 62 or 64 wherein when a transmittance of light transmitted from said liquid crystal element is changed from an actual light transmittance to an intended light transmittance, the pulse control unit is able to insert beforehand a drive pulse for control corresponding to a minimum light transmittance or a maximum light transmittance, at least, prior to application of a drive pulse corresponding to the intended light transmittance. A method of driving the light control device is also described wherein the light control device is driven by use of the drive pulse for control, along with a pickup device wherein the light control device is arranged in a light path of a pickup system.
    Type: Grant
    Filed: October 10, 2001
    Date of Patent: April 13, 2004
    Inventors: Toshiharu Yanagida, Toru Udaka, Masaru Kawabata, Kazuhiro Tanaka
  • Patent number: 6717860
    Abstract: A method of erasing a non-volatile semiconductor memory device comprising, to raise the convergence of the erasure voltage, performing a write-erase operation, at least one write-erase operation after erasure, or a plurality of write-erase operations as an operation when erasing a memory transistor including dispersed charge storing means in a gate insulating film interposed between a channel-forming region of the semiconductor and a gate electrode and, to increase the erasure speed, optimizing an erasure voltage and/or an erasure time in accordance with the phenomenon of the absolute value of a voltage of an inflection point taking an extremum at the erasing side in a hysteresis curve shown the change of threshold voltage with respect to an applied voltage of the memory transistor becoming larger along with a shortening of a voltage application time.
    Type: Grant
    Filed: September 18, 2000
    Date of Patent: April 6, 2004
    Assignee: Sony Corporation
    Inventor: Ichiro Fujiwara
  • Patent number: 6717285
    Abstract: A wind powered generating device comprises a tube cluster, a collector assembly, and a turbine assembly. The collector assemblies utilize sails that can be rotated to direct wind down through an inlet tube to a central outlet tube. The central outlet tube is narrowed at a portion, and a turbine is mounted at this narrowed portion to take advantage of the Venturi effect that accelerates the air as it passes the turbine. This permits reliable and efficient operation in areas that were not formerly considered windy enough to be economically feasible for the deployment of wind powered generating devices. Alternative embodiments of the invention include mechanisms for dealing with violent weather conditions, a first of which allows excess wind to bleed off beneath and between the sails, and a second which collapses and covers the sail with a protective sheath/sock.
    Type: Grant
    Filed: September 14, 2001
    Date of Patent: April 6, 2004
    Inventor: Michael Ferraro
  • Patent number: 6709512
    Abstract: When a polycrystalline or single crystal silicon layer is grown by catalytic CVD, a catalyst having a nitride covering at least its surface is used. In case that tungsten is used as the catalyst, tungsten nitride is formed as the nitride. The nitride is made by heating the surface of the catalyst to a high temperature around 1600 to 2100° C. in an atmosphere containing nitrogen prior to the growth. When the catalyst is heated to the temperature for its use or its nitrification, it is held in a hydrogen atmosphere.
    Type: Grant
    Filed: August 29, 2001
    Date of Patent: March 23, 2004
    Assignee: Sony Corporation
    Inventors: Hisayoshi Yamoto, Hideo Yamanaka
  • Patent number: 6709979
    Abstract: A method of implementing an electrolytic polishing process against a wiring-material film by way of preventing excessive polishing or incomplete polishing caused by presence of differential steps locally generated in the objective wiring-material film. The inventive method comprises a step of forming a wiring-material film for burying recessed portions formed on an insulating film formed on a substrate via a plating process; a step of reducing a local differential step generated on the surface of the wiring-material film by way of preserving the wiring material film on the insulating film; and a final step of removing the wiring-material film deposited on the insulating film by way of preserving such wiring-material film deposited, solely inside of the recessed portions.
    Type: Grant
    Filed: May 29, 2001
    Date of Patent: March 23, 2004
    Assignee: Sony Corporation
    Inventors: Naoki Komai, Takeshi Nogami, Hideyuki Kito, Mitsuru Taguchi, Katsumi Ando
  • Patent number: 6707092
    Abstract: In a semiconductor memory including a dynamic random access memory, a memory cell of the dynamic random access memory includes: a semiconductor pillar (a silicon pillar); a capacitor in which one side of the silicon pillar is used as a charge accumulation electrode; and a longitudinal insulated gate static induction transistor in which the other side of the silicon pillar is used as an active region (a source region, a channel formation region and a drain region), and a bit line is connected to the silicon pillar.
    Type: Grant
    Filed: July 12, 2002
    Date of Patent: March 16, 2004
    Inventor: Masayoshi Sasaki
  • Patent number: 6705516
    Abstract: A historical information recording device provided in a product for storing in a recorder product historical information relating to the product's manufacture, physical distribution, sale, registration, repair, and disposal and transmitting the information in response to information input from the outside, having a plurality of transmission modes and provided with a mode switcher for selecting a first transmission mode at the time of usual use and switching the transmission mode in response to an input signal to a second transmission mode with at least an output, frequency, method of modulation, or transmission time different from that of the first transmission mode, a historical information tamper prevention unit for prohibiting a write operation in the storage unit under predetermined conditions to prevent tampering of the product historical information, and a discriminator for discriminating if the recorder is the specific historical information recorder which should be covered by the recording and/or
    Type: Grant
    Filed: April 26, 1999
    Date of Patent: March 16, 2004
    Inventor: Michitaka Kubota
  • Patent number: 6704919
    Abstract: The check system comprises the steps of: computing the optimum position and the optimum capacitance value of the bulk capacitor on a wiring printed circuit board mounting an IC which is an object of checkup, using simple mathematical expressions; determining if an actual capacitance value and an actual position of the bulk capacitor tentatively designed are nearly equal to the optimum value and optimum position computed; determining if the tentatively designed capacitance value of the bulk capacitor exceeds a value of a total sum of capacitance values of decoupling capacitors multiplied by a predetermined constant; and if the optimum conditions are not satisfied, displaying appropriate instructions to modify the tentative design value and position of the bulk capacitor to coincide with the optimum value and position.
    Type: Grant
    Filed: June 26, 2001
    Date of Patent: March 9, 2004
    Assignee: Sony Corporation
    Inventors: Kenji Araki, Ayao Yokoyama
  • Patent number: 6700146
    Abstract: A semiconductor memory device able to increase the effective area of a capacitor in a memory cell and ensure a sufficient amount of charge contained in a read signal while maintaining the smallest cell area and a method for producing the same, wherein a first node electrode, a first ferroelectric film, and plate electrodes form four ferroelectric capacitors, plate electrodes, a second ferroelectric film, and a second node electrode form other four ferroelectric capacitors, the first node electrode is electrically connected to the second node electrode, a capacitor below a plate electrode is connected in parallel with the capacitor above the plate electrode, and these two capacitors connected in parallel form a memory cell storing 1 bit of data.
    Type: Grant
    Filed: January 27, 2003
    Date of Patent: March 2, 2004
    Assignee: Sony Corporation
    Inventor: Yasuyuki Ito
  • Patent number: D487813
    Type: Grant
    Filed: February 5, 2003
    Date of Patent: March 23, 2004
    Assignee: Tensor Corporation
    Inventor: Roger Sherman