Abstract: A memory device capable of data writing at a time other than during manufacturing is provided by using a memory element including an organic material. In a memory cell, a third conductive film, an organic compound, and a fourth conductive film are stacked over a semiconductor film provided with an n-type impurity region and a p-type impurity region, and a pn-junction diode is serially connected to the memory element. A logic circuit for controlling the memory cell includes a thin film transistor. The memory cell and the logic circuit are manufactured over one substrate at the same time. The n-type impurity region and the p-type impurity region of the memory cell are manufactured at the same time as the impurity region of the thin film transistor.

Abstract: A space is provided under part of a semiconductor layer. Specifically, a structure in which an eaves portion (a projecting portion, an overhang portion) is formed in the semiconductor layer. The eaves portion is formed as follows: a stacked-layer structure in which a conductive layer, an insulating layer, and a semiconductor layer are stacked in this order is etched collectively to determine a pattern of a gate electrode; and a pattern of the semiconductor layer is formed while side-etching is performed.

Abstract: A viscous fluid-sealed damper (1) having a shaft receiving section (2c) in which an installation shaft (3) with a swollen head (3b) is fitted and also having a separation wall (2). At least a portion of the separation wall (2) is constructed from an elastic separation membrane, and the separation wall (2) continues to the periphery of the upper edge of the shaft receiving section (2c) such that the shaft receiving section (2c) extends inward. Viscous fluid is sealed inside the separation wall (2). A positioning section (2f) for positioning the shaft receiving section (2c) is provided at that position of a bottom face (2a) of the separation wall section (2) that faces the shaft receiving section (2c). The viscous fluid-sealed damper can be assembled with good work efficiency and is unlikely to be damaged during assembly.

Abstract: A thin film integrated circuit which is mass produced at low cost and a method for manufacturing a thin film integrated circuit according to the invention includes the steps of: forming a peel-off layer over a substrate; forming a base film over the peel-off layer; forming a plurality of thin film integrated circuits over the base film; forming a groove at the boundary between the plurality of thin film integrated circuits; and introducing a gas or a liquid containing halogen fluoride into the groove, thereby removing the peel-off layer; thus, the plurality of thin film integrated circuits are separated from each other.

Abstract: To improve bonding strength and improve reliability of an SOI substrate in bonding a semiconductor substrate and a base substrate to each other even when an insulating film containing nitrogen is used as a bonding layer, an oxide film is provided on the semiconductor substrate side, a nitrogen-containing layer is provided on the base substrate side, and the oxide film formed on the semiconductor substrate and the nitrogen-containing layer formed over the base substrate are bonded to each other. Further, plasma treatment is performed on at least one of the oxide film and the nitrogen-containing layer before bonding the oxide film formed on the semiconductor substrate and the nitrogen-containing layer formed over the base substrate to each other. Plasma treatment can be performed in a state in which a bias voltage is applied.

Abstract: A TFT is manufactured using at least five photomasks in a conventional liquid crystal display device, and therefore the manufacturing cost is high. By performing the formation of the pixel electrode, the source region and the drain region by using three photomasks in three photolithography steps, a liquid crystal display device prepared with a pixel TFT portion, having a reverse stagger type n-channel TFT, and a storage capacitor can be realized, FIG. 2.

Abstract: An object of the invention is to provide a method for manufacturing a light emitting device capable of reducing deterioration of elements due to electrostatic charge caused in manufacturing the light emitting device. Another object of the invention is to provide a light emitting device in which defects due to the deterioration of elements caused by the electrostatic charge are reduced. The method for manufacturing the light emitting device includes a step of forming a top-gate type transistor for driving a light emitting element. In the step of forming the top-gate type transistor, when processing a semiconductor layer, a first grid-like semiconductor layer extending in rows and columns is formed over a substrate. The plurality of second island-like semiconductor layers are formed between the first semiconductor layer. The plurality of second island-like second semiconductor layers serve as an active layer of the transistor.

Abstract: A TFT formed on an insulating substrate source, drain and channel regions, a gate insulating film formed on at least the channel region and a gate electrode formed on the gate insulating film. Between the channel region and the drain region, a region having a higher resistivity is provided in order to reduce an Ioff current. A method for forming this structure comprises the steps of anodizing the gate electrode to form a porous anodic oxide film on the side of the gate electrode; removing a portion of the gate insulating using the porous anodic oxide film as a mask so that the gate insulating film extends beyond the gate electrode but does not completely cover the source and drain regions. Thereafter, an ion doping of one conductivity element is performed. The high resistivity region is defined under the gate insulating film.

Abstract: A semiconductor device is provided, which comprises a first demodulation circuit, a second demodulation circuit, a first bias circuit, a second bias circuit, a comparator, an analog buffer circuit, and a pulse detection circuit. An input portion of the pulse detection circuit is electrically connected to an output portion of the analog buffer circuit, a first output portion of the pulse detection circuit is electrically connected to an input portion of the first bias circuit, and a second output portion of the pulse detection circuit is electrically connected to an input portion of the second bias circuit.

Abstract: An encoder encodes sound data and the like to generate a binary signal. A mapper converts the binary signal into a four-level symbol and outputs the four-level symbol. A base band filter includes a root raised cosine filter and a sinc filter. The base band filter blocks a predetermined frequency component of a symbol to shape the symbol into a waveform signal and outputs the waveform signal shaped. An FM modulator transmits a signal subjected to FM modulation according to a magnitude of an amplitude of a waveform signal to a receiving unit. When a symbol of ±3 is outputted from the mapper, a frequency shift of a signal transmitted from the FM modulator has a predetermined value in a range of ±0.822[kHz] to ±0.952[kHz]. This makes it possible to provide a modulating apparatus, a mobile communication system, a modulating method, and a communication method that use a modulating method that can conform to the FCC rule to be enforced in 2005 without using a linear power amplifier.

Abstract: The present invention provides an ultrathin thin film integrated circuit and a thin film integrated circuit device including the thin film integrated circuit device. Accordingly, the design of a product is not spoilt while an integrated circuit formed from a silicon wafer, which is thick and produces irregularities on the surface of the product container. The thin film integrated circuit according to the present invention includes a semiconductor film as an active region (for example a channel region in a thin film transistor), unlike an integrated circuit formed from a conventional silicon wafer. The thin film integrated circuit according to the present invention is thin enough that the design is not spoilt even when a product such as a card or a container is equipped with the thin film integrated circuit.

Abstract: A technology for reducing distance between adjacent pixel electrodes to smaller than the limit set by conventional process margin and also preventing adjacent pixel electrodes from being short circuited is provided.

Abstract: To provide an SOI substrate with an SOI layer that can be put into practical use, even when a substrate with a low allowable temperature limit such as a glass substrate is used, and to provide a semiconductor substrate formed using such an SOI substrate. In order to bond a single-crystalline semiconductor substrate to a base substrate such as a glass substrate, a silicon oxide film formed by CVD with organic silane as a source material is used as a bonding layer, for example. Accordingly, an SOL substrate with a strong bond portion can be formed even when a substrate with an allowable temperature limit of less than or equal to 700° C. such as a glass substrate is used. A semiconductor layer separated from the single-crystalline semiconductor substrate is irradiated with a laser beam so that the surface of the semiconductor layer is planarized and the crystallinity thereof is recovered.

Abstract: An object is to provide a semiconductor device having stable electric characteristics in which an oxide semiconductor is used. An oxide semiconductor layer is subjected to heat treatment for dehydration or dehydrogenation treatment in a nitrogen gas or an inert gas atmosphere such as a rare gas (e.g., argon or helium) or under reduced pressure and to a cooling step for treatment for supplying oxygen in an atmosphere of oxygen, an atmosphere of oxygen and nitrogen, or the air (having a dew point of preferably lower than or equal to ?40° C., still preferably lower than or equal to ?50° C.) atmosphere. The oxide semiconductor layer is thus highly purified, whereby an i-type oxide semiconductor layer is formed. A semiconductor device including a thin film transistor having the oxide semiconductor layer is manufactured.

Abstract: To provide a memory element that positively utilizes a phenomenon such as a dielectric breakdown, differently from a conventional memory element, and to provide a memory device having an increased memory capacity. The invention provides a memory device having a pair of electrodes and multiple memory material layers stacked between the electrodes, and an operating method thereof, where the memory material layers are sequentially destroyed by applying voltage. For example, in the case of stacking two memory material layers in the memory device, the memory device is operated in such a manner that a first voltage is applied to the pair of electrodes to destroy one of the two memory material layers, and then a second voltage is applied thereto to destroy the other of the two memory material layers.

Abstract: Techniques are provided for unifying steps of sealing material so that the yield and the reliability of a liquid-crystal display device become high. A starting film of scanning lines is patterned so that prismatic dummy wirings 301 for the first layer which are not electrically connected are formed in regions R1 and R2, and wirings 302 extending from the pixel section are formed in a region R3, and wirings 303 having connection end portions 303a are formed in a region R4. After an interlayer insulation film is formed, the starting film of the signal lines is patterned so that the dummy wirings 304 for the second layer are formed to embed the gaps between the wirings 301 to 303, and also the wirings 305 and the wirings 303 which extend from the pixel portion are connected to each other. This permits unification of the cross-sectional structure of the sealing material formation region.

Abstract: A method for manufacturing a semiconductor device provided with a circuit capable of high speed operation while the manufacturing cost is reduced.

Abstract: An object of the present invention is to improve use efficiency of a semiconductor substrate without lowering efficiency of a fabrication process. Another object of the present invention is to achieve cost reduction by effective use of a semiconductor substrate whose thickness is reduced due to repeated use in a process of manufacturing an SOI substrate. In a process of manufacturing an SOI substrate, a semiconductor substrate is used as a bond substrate a predetermined number of times, or as long as it meets predetermined conditions. In a case where a first single crystal semiconductor substrate cannot be used as a bond substrate, it is bonded to a second single crystal semiconductor substrate. Then, a stacked-layer substrate formed from the first single crystal semiconductor substrate and the second single crystal semiconductor substrate bonded to each other is used as a bond substrate in a process of manufacturing an SOI substrate.

Abstract: Semiconductor elements deteriorate or are destroyed due to electrostatic discharge damage. The present invention provides a semiconductor device in which a protecting means is formed in each pixel. The protecting means is provided with one or a plurality of elements selected from the group consisting of resistor elements, capacitor elements, and rectifying elements. Sudden changes in the electric potential of a source electrode or a drain electrode of a transistor due to electric charge that builds up in a pixel electrode is relieved by disposing the protecting means between the pixel electrode of the light-emitting element and the source electrode or the drain electrode of the transistor. Deterioration or destruction of the semiconductor element due to electrostatic discharge damage is thus prevented.

Abstract: When an electrode is formed over an organic layer, a temperature is limited because the organic layer can be influenced depending on a temperature in forming the electrode. Therefore, there are problems that an expected electrode cannot be formed, and miniaturization of an element is inhibited. The present invention provides a structure of an organic memory element in which two electrodes are provided in the same layer as two terminals of the memory element, and a layer containing an organic compound is provided between the electrodes. By narrowing a distance between the two electrodes, writing can be performed at low voltage. In addition, a structure of the memory element is simplified, and the area of the memory element can be reduced.