Abstract: In a digital storage disk array system in which parity blocks are created and stored in order to be able to recover lost data blocks in the event of failure of a disk, high-activity parity groups are created for data blocks having high write activity and low-activity parity groups are created for data blocks not having high write activity. High-activity parity blocks formed from the high-activity data blocks are then stored in a buffer memory of a controller rather than on the disks in order to reduce the number of disk accesses during updating.

Abstract: A computer or a display apparatus with an input function which is of simple construction and has high operability for touch input or pen input. A system body, a cover unit having a display panel with an input function on one side, and connection means such as a rotatable arm, which is rotatably connected to the cover unit and to the system body at a different portion from a portion at which said cover unit is conventionally connected, so as to allow the cover unit to be placed on the system body in a position in which the display panel mounted on the cover unit is placed face up or face down. The cover unit can be placed upside down on the system body without sliding of the cover unit with respect to the system body.

Abstract: A liquid crystal display apparatus in normally-white mode in which gray scale display is obtained by providing different applied voltages corresponding to different gray scale levels, respectively, characterized in that in a curve showing the relationship between the applied voltage and light transmittance, the lowest applied voltage is set so as to be shifted in the direction of a monotonically decreasing region of the curve. The display simultaneously provides both good contrast ratios and good gradation at large viewing angles, and gray scale is not inverted.

Abstract: A high definition, high quality active matrix type liquid crystal display is provided by excluding electrodes from a single side of two transparent substrates to reduce extra space, and providing only transfers in the remaining space. On the side of liquid crystal inlet 14, similarly as on other sides, a plurality of transfers 19 is provided outside seal 24. From transfers 19 on the side of liquid crystal inlet 14, a wiring pattern is formed inwardly, intersecting seal 24, to connect to extended conductor 21 formed in parallel with seal 24. Extended conductor 21 is led toward the side where signal line lead electrode 18 is provided, again crossing seal 24 to be connected with transfer lead electrode 20 formed on that side.

Abstract: An output window is created on the user's terminal screen when a parallel program is executing. This window displays an array of graphical elements (each preferably a small square area), which are partitioned into groups of one or more graphical elements per group, each partition representing a task or thread of the parallel program. These graphical elements are capable of assuming any one of several (or many) different graphical states (each of these states preferably being a different color for the graphical clement). A task running on a parallel processor system can set its associated graphical elements to different states (e.g., colors) during execution of the task generally through a special instruction in the task that specifics which graphical clement (of the graphical elements assigned to that task) should be set and to what state. When such an instruction is executed by a processor running that task, a message is sent to the module that controls the graphical element display at the user's terminal.

Abstract: To generate a dot clock for a liquid crystal display device from a horizontal sync signal with reduced skew, a phase locked loop (PLL) is divided into three functional parts. The first part generates a particular frequency by supplying voltage from a latch type DAC (digital/analog converter) to a VCO (voltage controller oscillator). A horizontal sync signal is estimated from the dot clock signal that is finally generated and the output value of the DAC is increased or decreased in accordance with the difference between this estimated horizontal sync signal and the actual horizontal sync signal. This increase or decrease correction is made at, for example, the vertical sync timing. The second part achieves synchronization. A signal corresponding to the phase error between the actual horizontal sync signal and the dot clock signal is added to the signal from the DAC to control the phase of the dot clock.

Abstract: In a machine translation method and apparatus, an input text analyzer analyzes an input text in a first language to form a graph structure of nodes and edges. An equivalent selector introduces variables to ambiguous components of the graph structure by a variable introducer. A constraint solver propagates constraints on the variables to other components. Solutions are then found for equivalent determination and locally consistent solutions are also found for the respective components. A variable realizer finds solutions to the respective locally consistent components according to the patterns of the variables. An output text generator then generates text in a second language from a set of these solutions.

Abstract: A drive circuit is disclosed for a liquid crystal display apparatus of the active matrix type having a large number of gray levels that can be displayed. The drive circuit comprises a plurality of sections each including a sample-and-hold circuit 22. The sample-and-hold circuit 22 has a plurality of switches Sw 1 through Sw 4. To these switches are separately supplied different ramp signals Vr 1 through Vr 4 from a ramp generator circuit 24 shared by all the sections. These ramp signals have waveforms which respectively assume a plurality of different voltage levels and are shifted from each other by a predetermined voltage level. The decoder 21 selects one of the switches Sw 1 through Sw 4 and a specific one of the voltage levels in the ramp signal applied to that selected switch depending on the gray scale data in the latch 20. The output of the sample-and-hold circuit is transmitted to the data line 7a via a buffer 23.

Abstract: A system and method for forecasting that combines a neural network with a statistical forecast is presented. A neural network having an input layer, a hidden layer, and an output layer with each layer having one or more nodes is presented. Each node in the input layer is connected to each node in the hidden layer and each node in the hidden layer is connected to each node in the output layer. Each connection between nodes has an associated weight. One node in the input layer is connected to a statistical forecast that is produced by a statistical model. All other nodes in the input layer are connected to a different historical datum from the set of historical data. The neural network being operative by outputting a forecast, the output of the output layer nodes, when presented with input data. The weights associated with the connections of the neural network are first adjusted by a training device.

Abstract: A system for making porous silicon on blank and patterned Si substrates by "immersion scanning", particularly suitable for fabricating light-emitting Si devices and utilizing an open electolytic cell having a cathode and an opposing anode consisting of a Si substrate on which the porous silicon is to be formed, both disposed, with their opposing surfaces in parallel, in an aqueous HF solution electrolyte contained in the cell. The substrate anode is mounted to be movable relative to the electrolyte so as to be mechanically cycled or scanned in and out of the electrolyte at a programmable rate during anodization. The uniformity, thickness and porosity of the resulting anodized layer on the substrate are determined by the scanning speed, number of cycles, current density, and HF-based electrolyte parameters of the system, and the Si substrate resistivity, conductivity type, and crystal orientation.

Abstract: A method for encapsulating a semiconductor chip. The method includes the steps of first positioning a chip over a laser-curing cavity, and then dispensing a predetermined amount of encapsulant over the chip. Sequential steps include synchronizing a firing of a laser pulse immediately after the dispensing step, and curing the encapsulant by conducting heat generated by the laser pulse, through the chip.

Abstract: In a partitioned database system of the Shared Nothing type, one or more secondary replicas of each partition are maintained by spooling (i.e., asynchronously sending) modified (usually called dirty) pages from the primary replica to the secondary replica(s) rather than by using a synchronous page update or by sending log entries instead of entire pages. A Write-Ahead Log protocol is used so that a dirty page is not forced to non-volatile storage until a log record of the modification is created and written to non-volatile storage. Replica updating does not delay the committing of transactions because replica updating is done asynchronously with respect to transaction processing. Since dirty pages are sent rather than only log entries, disk accesses and processing at the secondary replica(s) arising from the maintaining of the replicas are minimized as well. Only one centrally accessible log is maintained for all replicas of the same partition.

Abstract: A method and an apparatus for driving a liquid crystal display, in which flicker and cross talk are removed for arbitrary display patterns. The liquid crystal display has a plurality of scan lines, a plurality of data lines, and a plurality of pixels arranged in a matrix at the intersections of the scan and the data lines. The polarity of data signals outputted to the data lines is inverted for each occurrence of a pixel to be placed into a predetermined state. The predetermined state may be a dark state or a bright state of a binary display, or one of several levels of a display having more than two gray scale levels.

Abstract: The object of this invention is to provide a light scattering liquid crystal display applicable to direct view type displays which realizes a structure with uniform-brightness and high-contrast. A liquid crystal display of this invention including a light scattering liquid crystal cell 10 comprising: polymer dispersed liquid crystal; a first surface and a second surface defining the liquid crystal cell 10; a background having black patterns 17, each occupying an area covering at least display pixel, and first openings 19 existing between the black patterns on the first surface; and opaque mask 21 having second openings 23 and shading the locations opposite to the first openings 19.

Abstract: The present electrical apparatus comprises an antenna for directing towards an electric field source to detect the electric field (E) to be reduced. The antenna is connected to amplifier for generating an output signal in response to an input signal from the antenna. The output signal is in anti-phase to the input signal. A radiator is connected to the amplifier for radiating a cancelling electric field (E') in anti-phase to the electric field (E) from the source in response to the output signal from the amplifier to at least partially cancel reduce the electric field from the source. The antenna, when directed towards the source, is positioned relative to the radiator and the source to detect both the cancelling electric field (E') from the radiator and the electric field (E) from the source. The input signal produced by the antenna is thus derived from the sum of the electric field (E) to be reduced from the source and the cancelling electric field (E') from the radiator.

Abstract: A fault-tolerant high performance mirrored disk subsystem is described which has an improved disk writing scheme that provides high throughput for random disk writes and at the same time guarantees high performance for disk reads. The subsystem also has an improved recovery mechanism which provides fast recovery in the event that one of the mirrored disks fails and during such recovery provides the same performance as during non-recovery periods.Data blocks or pages which are to be written to disk are temporarily accumulated and sorted (or scheduled) into an order (or schedule) which can be written to disk efficiently, which in a preferred embodiment is in accordance with the physical location on disk at which each such block will be written. This also generally corresponds to an order which is encountered by a writ head during a physical scan of a disk. The disks of a mirrored pair are operated out of phase with each other, so that one will be in read mode while the other is in write mode.

Abstract: A system for resolving structural ambiguities in syntactic analysis of natural language, which ambiguities are caused by prepositional phrase attachment, relative clause attachment, and other modifier-modifiee relationships in sentences. The system uses instances of dependency (modification relationship) structures extracted from a terminology dictionary as a knowledge base. Structural ambiguity is represented by indicating that a word in a sentence has several words as candidate modifiees. The system resolves such ambiguity by 1) first searching the knowledge base, which contains dependency information in the form of tree structures, for dependencies between the word and each of its possible modifiees, 2) then assigning an order of preference to these dependencies by means of a path search in the tree structures, and 3) finally selecting the most preferable dependency as the modifiee. The sentences can be analyzed by a parser and transformed into dependency structures by the system.

Abstract: A method and apparatus for extracting multi-word technical terms from a text file in a computer system. Word strings are selected from the text that have at least two words, that have at most a specified maximum number of words, that include none of a special set of selected tokens, and that only include selected characters. Word string which occur less than a specified minimum number of times in the text file are deleted. The remaining strings form a set of word strings very likely to be multi-word technical terms. Improvements on the quality of the set of word strings can be accomplished by deleting word strings which do not satisfy certain grammatical constraints.

Abstract: A cache control maintains a history table SETLAT for the prediction of line entry (i.e., set member) within a congruence class for cache accessing. For a given cache access, a SETLAT entry can be selected based on the requesting logical address bits directly. The selection of a SETLAT entry may also be based on the hashing of such logical address bits together with other information in order to achieve sufficient randomization. A similar hashing history table may be devised to predict virtual address translation information with high accuracy. Such prediction mechanisms not only allow efficient implementation of the cache access path but also offer the opportunity of achieving multiple accesses per cycle.The proposed prediction method also provides a generic approach to efficient implementations for various directory based table accesses.

Abstract: A pull-down circuit for a TTL compatible data output buffer uses NMOS devices. The pull-down circuit comprising two NMOS stages. Namely, a diode configuration stage where the gate and drain electrodes are shorted together during pull-down and a common-source stage. Both PMOS and NMOS devices are used for shorting the gate and drain electrodes.