Patents Represented by Attorney, Agent or Law Firm Rosenthal & Osha L.L.P.
  • Patent number: 6586910
    Abstract: In such a voltage equalizer circuit in which each of plural windings P1 to Pn electromagnetically coupled to each other, each of plural storage elements E1 to En series-connected to each other, and each of plural first switching elements S1 to Sn are connected to each other in a series connecting manner so as to constitute a plurality of closed circuits, this voltage equalizer apparatus is featured by that a reference voltage winding Pp electromagnetically coupled to the plurality of windings is provided; both a DC power supply Ep and a second switching element Sp are series-connected to the second winding; and all of the plural first switching elements and the second switching element are turned ON/OFF in a synchronous manner.
    Type: Grant
    Filed: October 18, 2001
    Date of Patent: July 1, 2003
    Assignees: Fuji Jukogyo Kabushiki Kaisha, Nagano Japan Radio Co., Ltd.
    Inventors: Fujio Matsui, Mitsunori Ishii, Seiichi Anzawa, Hiroshi Nishizawa
  • Patent number: 6584854
    Abstract: A pressure-detecting chamber 23, a pressure-directing path 25 and a buffer space 24 are formed on the upper face of a main-body-side substrate 22 as recessed portions, and the upper face of the pressure-detecting chamber 23 is covered with a thin-type diaphragm 31, and upper faces of the pressure-directing path 25 and the buffer space 24 are covered with a cover substrate 30. A pressure-introducing unit 26 formed on the lower face of the main-body-side substrate 22 is connected to the lower face of the buffer space 24. The cross-section of the buffer space 24 is greater than the cross-section of the pressure-introducing unit 26, and the capacity of the buffer space 24 is greater than the capacity of the pressure-directing path 25.
    Type: Grant
    Filed: June 19, 2002
    Date of Patent: July 1, 2003
    Assignee: OMRON Corporation
    Inventors: Isamu Kimura, Masatoshi Oba, Takashi Itakura
  • Patent number: 6585543
    Abstract: An electrical connector of the present invention includes a contact having a first retaining portion; and a housing having an accommodating cavity for accommodating the contact and a second retaining portion that confronts the first retaining portion in such a manner as to prevent the contact from moving in a direction for the contact to be taken out from the cavity when the contact is in the state of being accommodated in the cavity. The housing comprising a first member arranged at a side from which the contact is inserted in the cavity and provided with the second retaining portion; and a second member assembled to the first member so that the second retaining portion can be covered by the second member.
    Type: Grant
    Filed: April 5, 2001
    Date of Patent: July 1, 2003
    Assignee: J.S.T. Mfg. Co., Ltd.
    Inventors: Keiji Kuroda, Kiyoshi Aramoto
  • Patent number: 6587983
    Abstract: Semiconductor device testing apparatus and method for testing a semiconductor device, includes: a pattern generator (10) which, based on a predetermined control sequence, generates an input signal pattern (12) and an expectation data signal pattern (14); a comparison unit (90) which compares an output signal pattern output from the semiconductor device and the expectation data signal pattern, and outputs a match signal when the output signal is matched with predetermined data determined based on the expectation data signal pattern. The pattern generator (10) includes: a stoppage unit which stops the control sequence when the match signal does not become active during a predetermined match cycle; a resuming address register which sets up a resuming address indicating a resuming position of the control sequence; and a resuming unit which resumes the control sequence based on the resuming address.
    Type: Grant
    Filed: April 3, 2000
    Date of Patent: July 1, 2003
    Assignee: Advantest Corporation
    Inventor: Hiroyasu Nakayama
  • Patent number: 6584236
    Abstract: An image processing apparatus for detecting the inclination of an object is provided. This image processing apparatus has a read means which reads the object and outputs image data, an amount of change calculation means which calculates the sum of the amounts of change of the image data of the object in at least one direction, and an inclination calculation means which calculates the inclination of the object based on the sum calculated by the amount of change calculation means.
    Type: Grant
    Filed: October 7, 1999
    Date of Patent: June 24, 2003
    Assignee: Advantest Corporation
    Inventors: Kazuyuki Maruo, Takahiro Yamaguchi, Masayoshi Ichikawa
  • Patent number: 6584075
    Abstract: A routing engine for a node controller of a switch or for a router provides enhanced routing for unicast and multicast connections by representing preferred routing trees, associated with different bandwidths and quality of service indications, as tables having, for each entry, a node identification, a parent node identification, a link identifier and ah effective distance by which a node identified by the node identification is separated from the controller or router. The routing engine adapts quickly to changes in network configurations, such as link failure, by quickly patching a table affected by the failure in order to maintain service until a new preferred routing tree can be calculated. Recalculations of preferred routing trees are avoided by using said table to determine whether a new link or a restored link could possibly provide a more cost effective route than that specified in the existing table.
    Type: Grant
    Filed: June 30, 1997
    Date of Patent: June 24, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: Amit Gupta, Raphael Rom, Tony Hsiao
  • Patent number: 6578989
    Abstract: An optical device for an optical element to control a light path about emission light emitted from the optical element to external or incident light entered from external to the optical element, which includes a light reflecting member, a resin member covering a light reflection surface of the light reflecting member, and a bumper member interposed between the light reflecting member and the resin member. The resin member is provided with a boundary surface for almost totally reflecting light deviated from a predetermined region in front of the optical element, and the boundary surface of the resin member or the light reflecting member is so disposed that light deviating from the predetermined region in front of the optical element and passing between the optical element and an external of the optical device is reflected more than once with each of the boundary surface and the light reflecting member.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: June 17, 2003
    Assignee: Omron Corporation
    Inventors: Yoshimasa Osumi, Akira Matsui, Hironobu Kiyomoto
  • Patent number: 6576991
    Abstract: An integrated circuit device is disclosed. The device includes an active film having a semiconducting material and an integrated circuit disposed on an active face of the active film. The integrated circuit includes a plurality of circuit elements. In addition, the device includes an additional film fixed to the active face of the active film, the additional film at least partially covering said integrated circuit, and an anti-fraud mechanism disposed within the additional film, the anti-fraud mechanism being positioned to align with one of the plurality of circuit elements. In some aspects, the additional film includes a protective sub-film and a sealing sub-film, wherein the protective sub-film is sealed to the active face of the active film by the sealing sub-film.
    Type: Grant
    Filed: January 28, 2002
    Date of Patent: June 10, 2003
    Assignee: Schlumberger Systems
    Inventors: BĂ©atrice Bonvalot, Robert Leydier
  • Patent number: 6575695
    Abstract: A centrifugal blower capable of reducing noise. The centrifugal blower comprises an impeller having a hub plate and a set of blades disposed on at least one surface of the hub plate so as to surround an axis of rotation; and a casing surrounding the impeller and having a volute portion disposed at an outer peripheral portion thereof. The portion of casing facing the set of blades is formed with a plurality of through holes, whereas a sound absorbing material is attached thereto so as to cover the through holes. The noise caused by a compression wave of air occurring between the blades of impeller and the inner face of casing is efficiently absorbed by a sound absorbing material disposed adjacent the blades.
    Type: Grant
    Filed: November 7, 2000
    Date of Patent: June 10, 2003
    Assignee: Maruyama Mfg. Co., Inc.
    Inventor: Junichi Miyamoto
  • Patent number: 6577680
    Abstract: A video signal coding device is provided with unit dividing means (202) for dividing an input picture into units each of which is a coding quantity control unit consisting of one or a plurality of frames to be processed by any one of intra-frame coding, inter-frame forward coding, and inter-frame bidirectional coding; activity calculating means (203) for calculating a frame activity for every frame of the input picture, and calculating a unit activity for every unit from the frame activities of frames belonging to the same unit; target coding quantity deciding means (205) for deciding a target coding quantity of a coding frame on the basis of the frame activity of the coding frame which is a coding object, the unit activity of a coding unit to which the coding unit belongs, and the average unit activity of a unit prior to the coding unit; and coding means (206) for coding the coding frame by the target coding quantity so as to generate coded data.
    Type: Grant
    Filed: July 17, 2002
    Date of Patent: June 10, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazuhiro Wake, Masakazu Nishino, Yuji Fujiwara, Seiichi Takeuchi
  • Patent number: 6577002
    Abstract: A 180 degree bump placement layout for an integrated circuit power grid is provided. This layout improves integrated circuit performance and reliability and gives an integrated circuit designer added flexibility and uniformity in designing the integrated circuit. Further, a patterned bump array for a top metal layer of an integrated circuit having a plurality of 180 degree bump placement structures is provided.
    Type: Grant
    Filed: November 29, 2001
    Date of Patent: June 10, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: Sudhakar Bobba, Tyler Thorp, Pradeep Trivedi
  • Patent number: 6572421
    Abstract: A tilt device for a marine propulsion unit is disclosed having a damp bracket fixed to the hull of a vessel a swivel bracket tilting connected to the damp bracket, a cylinder device disposed between the damp bracket and the swivel bracket, and a pump device for extending and contacting the cylinder device, where in the cylinder device and the pump device are arranged in series.
    Type: Grant
    Filed: August 29, 2001
    Date of Patent: June 3, 2003
    Assignee: Showa Corporation
    Inventor: Kazuhiko Sadakata
  • Patent number: 6573770
    Abstract: A method and apparatus for post-fabrication adjustment of a delay locked loop leakage current is provided. The adjustment system includes an adjustment circuit that adjusts a leakage current offset circuit to compensate for the leakage current of a capacitor in the delay locked loop. The capacitor connects to a control voltage of the delay locked loop. Such control of the leakage current in the delay locked loop allows a designer to achieve a desired delay locked loop operating characteristic after the delay locked loop has been fabricated.
    Type: Grant
    Filed: August 29, 2002
    Date of Patent: June 3, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: Claude R. Gauthier, Pradeep R. Trivedi, Brian W. Amick, Dean Liu
  • Patent number: 6574168
    Abstract: A time measuring device includes: an input signal detecting unit for detecting three or more edges in an input signal and to output three or more detection signals in parallel, the three or more detection signals changing based on the three or more edges, respectively; a converting unit for converting phase differences between change timings of the detection signals and clock edges in a reference clock having a predetermined operating frequency into analog voltage values, respectively; a counting unit for counting, from change timings of at least two of the detection signals, number of the clock edges between the clock edges from which at least two detection signals are respectively delayed by the phase differences corresponding to at least two detection signals; an operating unit for calculating a time interval between edges of the three or more edges based on the analog voltage values and the number of clock edges.
    Type: Grant
    Filed: September 5, 2001
    Date of Patent: June 3, 2003
    Assignee: Advantest Corporation
    Inventor: Mishio Hayashi
  • Patent number: 6572520
    Abstract: An apparatus for transporting envelope blanks in an envelope making machine comprises at least one conveyor belt having a plurality of perforation holes therein, on which envelope blanks are transported through the machine in a conveyor plane. Beneath the conveyor belt is at least one suction chamber by means of which ambient air can be sucked through the perforation holes to retain blanks on the conveyor belt. At least one guide belt is provided on at least one side beside the conveyor belt in the direction of movement thereof. The conveyor belt and the guide belt are drivable so as to move synchronously in the direction of travel of the envelope blanks.
    Type: Grant
    Filed: May 17, 2001
    Date of Patent: June 3, 2003
    Assignee: Winkler + Dunnebler Aktiengesellschaft
    Inventor: Martin Blumle
  • Patent number: 6571353
    Abstract: A semiconductor memory tester is provided. A memory controller inputs failed cell identification information. A memory specifies the location of a memory cell indicated by the information. A block fail memory stores a block specification information indicating a remedial block to which the memory cell indicated by the fail cell identification information belongs. A SBFM address selector outputs sub block identification information indicating the sub block to which the memory cell indicated by the failed cell identification information belongs. A fail information obtaining controller detects whether the memory cell indicated by the failed cell identification information belongs to the main cell are or not. A sub block fail memory stores sub block specification information indicating the sub block indicated by the sub block identification information, only when the failed memory cell belongs to the memory cell area.
    Type: Grant
    Filed: November 22, 1999
    Date of Patent: May 27, 2003
    Assignee: Advantest Corporation
    Inventor: Shinya Sato
  • Patent number: 6570421
    Abstract: A method and apparatus for post-fabrication adjustment of a phase locked loop leakage current is provided. The adjustment system includes an adjustment circuit that adjusts a leakage current offset circuit to compensate for the leakage current of a capacitor in the phase locked loop. The capacitor connects to a control voltage of the phase locked loop. Such control of the leakage current in the phase locked loop allows a designer to achieve a desired phase locked loop operating characteristic after the phase locked loop has been fabricated.
    Type: Grant
    Filed: August 29, 2002
    Date of Patent: May 27, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: Claude R. Gauthier, Pradeep R. Trivedi, Brian W. Amick
  • Patent number: 6570298
    Abstract: A vibration control device 1 in accordance with the present invention is provided with a liquid lever mechanism 4 which has an action member 5, a liquid chamber 6 and a driving plate 7, and is used for enlarging a displacement, a piezo-actuator 2 which can be displaced in a direction so as to change the volume of the liquid chamber 6, and a rubber vibration isolator 3 which is placed between the liquid lever mechanism 4 and the piezo-actuator 2 in series therewith. This vibration control device 1 has a low natural frequency so that it has a superior passive vibration-blocking performance at high-frequency bands, while maintaining a superior active vibration-blocking performance at low-frequency bands, and also makes it possible to achieve a small size.
    Type: Grant
    Filed: May 9, 2001
    Date of Patent: May 27, 2003
    Assignee: Tokkyokiki Co., Ltd.
    Inventor: Masashi Yasuda
  • Patent number: 6570420
    Abstract: A method and apparatus for post-fabrication adjustment of a delay locked loop leakage current is provided. The adjustment system includes a programmable current source that adjusts a leakage current offset circuit to compensate for the leakage current of a capacitor. The capacitor connects to a control voltage of the delay locked loop. The programmable current source includes at least one current source and switch to adjust the leakage current offset circuit. The programmable current source is selectively adjusted by a combinational logic circuit. Such control of the leakage current in the delay locked loop allows a designer to achieve a desired delay locked loop operating characteristic after fabrication of the adjustable delay locked loop.
    Type: Grant
    Filed: August 29, 2002
    Date of Patent: May 27, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: Pradeep R. Trivedi, Claude R. Gauthier, Dean Liu
  • Patent number: D476990
    Type: Grant
    Filed: August 1, 2001
    Date of Patent: July 8, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: Milton C. Lee, John Jamieson, Niklas Gustavsson, Boris Landwehr