Patents Represented by Attorney, Agent or Law Firm Rosenthal & Osha L.L.P.
  • Patent number: 6462604
    Abstract: A circuit for reducing the noise associated with a clock signal for a flip-flop based circuit has been developed. The circuit includes a charge control portion that stores charge at a pre-determined time of the clock cycle and a dump control portion that releases the stored current also at a pre-determined time of the clock cycle. The charge is released onto the power grid of the system served by the clock signal.
    Type: Grant
    Filed: May 2, 2001
    Date of Patent: October 8, 2002
    Assignee: Sun Microsystems, Inc.
    Inventors: Brian W. Amick, Claude R. Gauthier
  • Patent number: 6461401
    Abstract: A composite structural metal use, for example, in drill bit bodies is disclosed. The metal includes powdered tungsten carbide, and binder metal consisting of a composition by weight of manganese in a range of about zero to 25 percent, nickel in a range of about zero to 15 percent, zinc in a range of about 3 to 20 percent, tin in a range of more than 1 percent to about 10 percent, and copper making up about 24 to 96 percent by weight of the composition. In one embodiment, the composition includes about 6 to 7 percent tin therein. In another embodiment, the composition includes about 0-6 percent by weight of cobalt.
    Type: Grant
    Filed: August 10, 2000
    Date of Patent: October 8, 2002
    Assignee: Smith International, Inc.
    Inventors: Kumar T. Kembaiyan, Thomas W. Oldham
  • Patent number: 6461205
    Abstract: In a hydraulic circuit of a tilt device for a marine propulsion unit provided with a tilt cylinder device and a trim cylinder device, a throttle is provided in a communication passage connecting a first chamber of the trim cylinder device to a tank.
    Type: Grant
    Filed: September 7, 2001
    Date of Patent: October 8, 2002
    Assignee: Showa Corporation
    Inventors: Kunio Banba, Yoshimi Watanabe
  • Patent number: 6457849
    Abstract: A vehicle head lamp for irradiating a light from a light source, the vehicle head lamp includes: a main reflector for reflecting the light from the light source; a sub-reflector movable in a first position and a second position, wherein the sub-reflector forwardly reflects the light from the light source when the sub-reflector is in the first position, and the sub-reflector is inhibited from forwardly reflecting the light from the light source when the sub-reflector is in the second position; and a driving unit connecting to the sub-reflector to make the sub-reflector move between the first position and the second position.
    Type: Grant
    Filed: February 20, 2001
    Date of Patent: October 1, 2002
    Assignee: Koito Manufacturing Co., Ltd.
    Inventor: Michio Tsukamoto
  • Patent number: 6457519
    Abstract: A centralizer for laterally positioning an instrument in an opening larger in diameter than the diameter of an opening through which the centralizer can freely pass. The centralizer includes spring blades affixed at one end to an outer surface of the instrument and extending axially to a stop collar rotatably positioned on the outer surface of the instrument. A latch is operatively coupled to the stop collar and is adapted to enable rotation of the stop collar about the instrument upon release of the latch.
    Type: Grant
    Filed: February 20, 2001
    Date of Patent: October 1, 2002
    Assignee: Antelope Oil Tool and Manufacturing Company, Inc.
    Inventor: Jean P. Buytaert
  • Patent number: 6454450
    Abstract: A vehicular lamp includes a lamp body formed with a hole, and an annular wall surrounding a peripheral of said hole. The lamp body is formed with a boss and a hook in the vicinity of the annular wall to regulate the position of power supply cords in order not to deviate apart from the annular wall.
    Type: Grant
    Filed: July 12, 2000
    Date of Patent: September 24, 2002
    Assignee: Koito Manufacturing Co., Ltd.
    Inventors: Kazutami Oishi, Yu Shinomiya, Hideaki Nakazawa
  • Patent number: 6456107
    Abstract: A method for regulating resonance in a micro-chip has been developed. The circuit includes an on-chip de-coupled capacitor that is shunted across the supply and ground voltages, and a band-pass shunt regulator that is in parallel to the capacitor across the supply and ground voltages. The regulator will short circuit the supply and ground voltages at a pre-determined frequency to reduce the resonance effect on the micro-chip.
    Type: Grant
    Filed: January 4, 2001
    Date of Patent: September 24, 2002
    Assignee: Sun Microsystems, Inc.
    Inventors: Claude R. Gauthier, Tyler J. Thorp, Richard L. Wheeler, Brian Amick
  • Patent number: 6456139
    Abstract: A device for automatically varying resistance includes a comparator for comparing a control voltage to a reference voltage; a switch operatively coupled to the comparator; and a first resistor and second resistor operatively coupled in a series connection between a pull-up voltage and a signal line. The switch is operatively coupled in a parallel connection with the first resistor and, based on the comparison between the control voltage and the reference voltage, the switch selectively bypasses the first resistor. A method of automatically varying resistance includes comparing a control voltage and a reference voltage; pulling-up a signal line to a pull-up voltage through a first resistor and a second resistor operatively connected in series if the comparison has a first outcome; and pulling up the signal line to the pull-up voltage through only the second resistor if the comparison has a second outcome.
    Type: Grant
    Filed: October 20, 2000
    Date of Patent: September 24, 2002
    Assignee: Sun Microsystems, Inc.
    Inventors: Gerald R. Pelissier, David S. Hwang
  • Patent number: 6456636
    Abstract: An EL element and a laser luminescent element capable of emitting ultraviolet ray with high wave length purity. The ultraviolet electroluminescent element characterized in that: a thin film made from one of polymer and oligomer in which elements selected from Si, Ge, Sn, and Pb are directly bonded; the elements are selected from those that are the same with each other and those that are different from each other; the film is disposed between two electrodes; and at least one of the electrodes is transparent. The laser luminescent element characterized in that: a thin film made from one of polymer and oligomer in which elements selected from Si, Ge, Sn, and Pb are directly bonded is disposed between two electrodes; and the elements are selected from those that are the same with each other and those that are different from each other.
    Type: Grant
    Filed: November 16, 2000
    Date of Patent: September 24, 2002
    Assignee: The Institute of Physical & Chemical Research
    Inventors: Shinya Koshihara, Kenzo Ebihara, Takashi Miyazawa, Mitsuo Kira, Toshihiro Suzuki
  • Patent number: 6454942
    Abstract: A liquid separation membrane module includes a semipermeable membrane receiving a pressure of a feed liquid, and a channel material arranged so as to support the back side of the semipermeable membrane. The channel material is a tricot knitted fabric knitted by a tricot knitting machine with two reeds and has a ground stitch portion and a convex portion. The tricot knitted fabric includes a thermoplastic synthetic filament yarn with a core/sheath type conjugated fiber having a high melting point polymer as a core component and a low melting point polymer as a sheath component. Thermoplastic synthetic filament yarns for forming the ground stitch portion and the convex portion have a substantially same fineness, and the yarns in the tricot knitted fabric are bonded with one another by melt adhesion of the low melting point component to rigidity the entire knitted fabric.
    Type: Grant
    Filed: January 18, 2000
    Date of Patent: September 24, 2002
    Assignee: Nitto Denko Corporation
    Inventors: Takuji Shintani, Hiroki Ito, Masahiko Hirose, Masaaki Ando
  • Patent number: 6452518
    Abstract: Analog-to-digital (A-D) converting apparatus (100, 120, 130) for calibrating a time error includes: an analog signal input portion (10); a plurality of analog-to-digital converters (12); a sampling clock signal generator (14) which supplies either a synchronous sampling clock signal or an alternate sampling clock signal; an averaging processing unit (18b) which performs the averaging process on a digital signal output from the A-D converters, based on the synchronous sampling clock signal; and an interleave processing unit (118a) which interleaves a digital signal output from the sampling operated A-D converters, based on the alternate sampling clock signal. The A-D converting apparatus includes an error calculation unit (72) for calculating the time error, and an error calibration value calculating unit (74) and an error calibrating unit (70b) which performs calibration operation. Method of calibrating an error caused between a plurality of the A-D converters.
    Type: Grant
    Filed: March 24, 2000
    Date of Patent: September 17, 2002
    Assignee: Advantest Corporation
    Inventor: Masayuki Kawabata
  • Patent number: 6449704
    Abstract: A memory device testing apparatus transfers at high speed a fail signal from a failure analysis memory unit 100 to a memory failure remedy analysis unit 200. The failure analysis memory unit 100 has a data storage memory 110 and a compact memory 120. The data storage memory 110 is divided into at least two sub address spaces. The divided sub address spaces are assigned to the addresses in the compact memory 120. An address generation control unit reads data stored in the compact memory 120. An address generation unit 132 generates a memory address signal 143 based on a sub address signal 141 and a detail address signal 142. The detail address signal 142 is incremented by the address generation control unit 125. The data in the sub address space storing the fail signal is transferred to the memory failure remedy analysis unit 200. If the data read from the compact memory 120 does not contain failure information, the data stored in the corresponding sub address space is not transferred.
    Type: Grant
    Filed: June 28, 1999
    Date of Patent: September 10, 2002
    Assignee: Advantest Corporation
    Inventor: Katsuhiko Takano
  • Patent number: 6448063
    Abstract: An experimental apparatus for performing observations of and experimental operations on a sliced specimen of a biological tissue is disclosed. The apparatus provides a high freedom for experimental operations and maintains the physiological activity of the sliced specimen. The experimental apparatus includes an experimental vessel for holding saline solution, the vessel is comparatively shallow, open at top, and transparent at least on a bottom. The apparatus also includes a specimen holder holding member for holding a specimen holder with a membrane filter at the bottom, taken out of a cultivator, a solution introduction tube for feeding fresh saline solution into the experimental vessel, and a solution discharge tube for sucking saline solution from the experimental vessel.
    Type: Grant
    Filed: December 15, 2000
    Date of Patent: September 10, 2002
    Assignee: Riken
    Inventors: Takashi Tominaga, Michinori Ichikawa
  • Patent number: 6448829
    Abstract: A low hold time flip-flop that has a dynamic input stage and a static output stage is provided. The flip-flop uses a feedback stage to maintain a value on a dynamic node during an evaluation phase of the flip-flop so that an input to the flip-flop only has to be held for a relatively short period of time after the start of the evaluation phase.
    Type: Grant
    Filed: June 7, 2001
    Date of Patent: September 10, 2002
    Assignee: Sun Microsystems, Inc.
    Inventor: Ritesh Saraf
  • Patent number: 6448647
    Abstract: It is an object of the present invention to provide a BGA package substrate capable of forming a thin and light BGA package which causes no crack in solder balls during temperature cycling tests and which permits fine-pitch packaging. According to the present invention, a conductive pattern 3 is formed on a solder resist layer 2 made of polyimide and a cover film 4 is formed on the conductive pattern 3. The conductive pattern 3 includes a land 3a for connection to a mother board and a bonding pad 3b for connection to an IC. The solder resist layer 2 has an opening 5 to leave an overlap on the periphery of the land 3a, and an end of the opening 5 is tapered. A solder ball 6 is formed on the land 3a.
    Type: Grant
    Filed: June 4, 1998
    Date of Patent: September 10, 2002
    Assignee: Sony Chemicals Corporation
    Inventors: Hideyuki Kurita, Masahiro Fujimoto
  • Patent number: 6449754
    Abstract: A technique measuring accuracy of parasitic capacitance extraction defines the error in an extracted total net parasitic capacitance intended for timing analysis as a sum of the errors in the extracted values of the individual capacitance elements, with the error for each element being influenced by a weight factor. Similarly, the technique defines an error in the extracted value of a crosstalk factor for the net of interest as a difference between the errors in the extracted values of the individual capacitance elements, with the error in each element being influenced by a weight factor. For signal timing and crosstalk analyses, the weight factors allow a designer to focus calibration of the extraction tool on the capacitive element having the highest weight factor.
    Type: Grant
    Filed: March 24, 2000
    Date of Patent: September 10, 2002
    Assignee: Sun Microsystems, Inc.
    Inventors: Eileen H. You, Weize Xie, John F. MacDonald
  • Patent number: 6447309
    Abstract: An apparatus for suppressing power bus bouncing in a hot-swappable system has been developed. The apparatus includes a connection module with three interior pins for: the power return; the power supply; and the system ground. The system ground pin is shorter than the other two so that it makes contact with the power bus after the bouncing from the return and supply pins has subsided.
    Type: Grant
    Filed: December 12, 2000
    Date of Patent: September 10, 2002
    Assignee: Sun Microsystems, Inc.
    Inventors: Han Y. Ko, Robert C. Cyphers, Tomonori Hirai, Keith Y. Oka, Alan D. Martin
  • Patent number: 6445119
    Abstract: A discharge lamp which radiates visible light having the following lights combined: light having an emission peak in 400 to 490 nm wavelength range in a blue spectral region; light having an emission peak in a 500 to 550 nm wavelength range in a green spectral region; and light having an emission peak in 600 to 670 nm wavelength range in a red spectral region. The color point of the radiated light lies within a region common to the following regions: a region bounded by an ellipse with a color point (u, v)=(0.224, 0.330) as a center thereof, a major axis of 0.056, a minor axis of 0.024, and an angle from the u axis of 20 degrees in the CIE 1960 UCS diagram; a region bounded by an ellipse with a color point (u, v)=(0.224, 0.330) as a center thereof, a major axis of 0.078, a minor axis of 0.014, and an angle from the u axis of 30 degrees in the CIE 1960 UCS diagram; a region bounded by an ellipse with a color point (u, v)=(0.235, 0.335) as a center thereof, a major axis of 0.
    Type: Grant
    Filed: March 8, 1999
    Date of Patent: September 3, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshio Mori, Hiromi Tanaka, Kenji Mukai, Toru Higashi, Tetsuji Takeuchi, Haruo Shibata, Sueko Kanaya, Katsuaki Iwama
  • Patent number: D462695
    Type: Grant
    Filed: September 26, 2001
    Date of Patent: September 10, 2002
    Assignee: Canal+ Technologies
    Inventor: Emile Nguyen Van Huong
  • Patent number: D463443
    Type: Grant
    Filed: September 17, 2001
    Date of Patent: September 24, 2002
    Assignee: Canal+ Technologies
    Inventor: Emile Nguyen Van Huong