Patents Represented by Attorney Seed and Berry LLP
  • Patent number: 5973959
    Abstract: A reading circuit comprises a current mirror circuit connected, at a first and a second output node, to the drain terminals of an array cell and of a reference cell; a comparator whose inputs are connected to the output nodes of the current mirror circuit; a ramp generator having an enabling input connected to the output of the comparator and an output connected to the control terminal of the reference cell. Biasing the gate terminal of the array cell to a constant voltage, when the currents flowing in the array cell and in the reference cell are equal, the value assumed by the ramp voltage is proportional to the threshold value of the array cell; at that time the comparator is triggered and discontinues the ramp increase, supplying as output the desired threshold value.
    Type: Grant
    Filed: July 22, 1998
    Date of Patent: October 26, 1999
    Assignee: STMicroelectronics S.r.l.
    Inventors: Danilo Gerna, Roberto Canegallo, Ernestina Chioffi, Marco Pasotti, Pier Luigi Rolandi
  • Patent number: 5973949
    Abstract: An input structure for associative memories, including an array of elementary cells, a number of input lines, a number of output lines, a number of address lines, and a number of enable lines. Each elementary cell is formed by a D flip-flop having a data input coupled to one of the address lines and an enable input coupled to one of the enable lines, and by a switch coupled between an input line and an output line, and having a control input coupled to the output of a respective latch to selectively couple the respective input line and output line according to the data stored in the latch.
    Type: Grant
    Filed: September 30, 1997
    Date of Patent: October 26, 1999
    Assignee: STMicroelectronics S.r.l.
    Inventors: Alan Kramer, Roberto Canegallo, Mauro Chinosi, Giovanni Gozzini, Pier Luigi Rolandi, Marco Sabatini
  • Patent number: 5972674
    Abstract: Compositions and methods are provided for treating NF-.kappa.B-related conditions. In particular, the invention provides a stimulus-inducible I.kappa.B.alpha. kinase complex, and components and variants thereof. I.kappa.B.alpha. kinase complex may be used, for example, to identify antibodies and other agents that inhibit or activate signal transduction via the NF-.kappa.B cascade. I.kappa.B.alpha. kinase complex, components thereof and/or such agents may also be used for the treatment of diseases associated with NF-.kappa.B activation.
    Type: Grant
    Filed: August 26, 1996
    Date of Patent: October 26, 1999
    Assignee: Signal Pharmaceuticals, Inc.
    Inventors: Frank Mercurio, Hengyi Zhu, Miguel Barbosa
  • Patent number: 5973617
    Abstract: A control circuit adapted to be switched to a standby mode during periods without control requirement and to be repeatedly reset during the standby mode of operation for a short wake-up period each to a full mode of operation. The control circuit comprises a standby oscillator that is operative also in the standby mode and that is adjusted during wake-up periods.
    Type: Grant
    Filed: May 6, 1997
    Date of Patent: October 26, 1999
    Assignee: STMicroelectronics GmbH
    Inventors: Hans Reichmeyer, Francesco Colandrea
  • Patent number: 5972792
    Abstract: A method for chemical-mechanical planarization of a substrate on a fixed-abrasive polishing pad in which a planarizing solution is dispensed onto the fixed-abrasive polishing pad. The planarizing solution is preferably an abrasive-free planarizing solution that oxidizes a surface layer on the substrate without passing the surface layer into solution, and the fixed-abrasive pad has a substantially uniform distribution of abrasive particles fixedly bonded to a suspension medium. The surface layer of the substrate is then pressed against the fixed-abrasive pad in the presence of planarizing solution, and at least one of the fixed-abrasive pad or the substrate moves relative to the other to remove material from the surface of the substrate. In operation, the planarizing solution forms a rough, scabrous layer of non-soluble oxides on the surface layer that are readily removed by the abrasive surface of the polishing pad.
    Type: Grant
    Filed: October 18, 1996
    Date of Patent: October 26, 1999
    Assignee: Micron Technology, Inc.
    Inventor: Guy F. Hudson
  • Patent number: 5968477
    Abstract: Radiolabeled annexin and modified annexin conjugates useful for imaging vascular thrombi are described. Methods for making and using such radiolabeled annexin conjugates are also provided.
    Type: Grant
    Filed: July 26, 1996
    Date of Patent: October 19, 1999
    Assignees: NeoRx Corporation, University of WA
    Inventors: Sudhakar Kasina, John M. Reno, Alan R. Fritzberg, Jonathan Tait
  • Patent number: 5968927
    Abstract: This invention is directed to novel tricyclic ICE/ced-3 family inhibitor compounds. The invention is also directed to pharmaceutical compositions of such tricyclic compounds, plus the use of such compositions in the treatment of patients suffering inflammatory, autoimmune and neurodegenerative diseases, and for the prevention of ischemic injury.
    Type: Grant
    Filed: September 12, 1997
    Date of Patent: October 19, 1999
    Assignee: Idun Pharmaceuticals, Inc.
    Inventors: Donald S. Karanewsky, Steven D. Linton
  • Patent number: 5969983
    Abstract: A semiconductor structure includes a dielectric layer having first and second opposing sides. A conductive layer is adjacent to the first side of the dielectric layer and is coupled to a first terminal, and a conductive barrier layer is adjacent to the second side of the dielectric layer and is coupled to a second terminal. The conductive barrier layer may be formed from tungsten nitride, tungsten silicon nitride, titanium silicon nitride or other barrier materials.
    Type: Grant
    Filed: March 1, 1999
    Date of Patent: October 19, 1999
    Assignee: Micron Technology, Inc.
    Inventors: Randhir P. S. Thakur, Garry A. Mercaldi, Michael Nuttall
  • Patent number: 5970405
    Abstract: A system and method for the detection of fraudulent use of a wireless telephone system includes a fingerprint analyzer that identifies an unauthenticated wireless telephone as authorized or fraudulent based on a fingerprint of the unauthenticated wireless telephone. The system maintains a valid destination list specific for each authorized wireless telephone. Each valid destination list contains destinations considered to be valid for that particular authorized wireless telephone. When an unauthenticated wireless telephone transmits a call request containing a destination, the system classifies the call as valid when the destination is in the valid destination list for the authorized wireless telephone regardless of whether the fingerprint analyzer identifies the unauthenticated wireless telephone as fraudulent. The system may bypass or terminate the fingerprint analysis, or simply ignore the result of the fingerprint analysis by the fingerprint analyzer.
    Type: Grant
    Filed: February 28, 1997
    Date of Patent: October 19, 1999
    Assignee: Cellular Technical Services Co., Inc.
    Inventors: Dmitry Kaplan, David M. Stanhope, Randolph W. McKernan, Howard L. Wilburn, Evan R. Green
  • Patent number: 5969326
    Abstract: A method and apparatus employs a weighted order stored in a weight table for automatically discriminating optical symbols which may be encoded in any one of at least two symbologies. The weighted order may be dynamically updated to reflect the distribution of symbologies as the symbols are acquired and decoded.
    Type: Grant
    Filed: January 14, 1998
    Date of Patent: October 19, 1999
    Assignee: Intermec IP Corp.
    Inventor: Kenneth Yuji Ogami
  • Patent number: 5970468
    Abstract: A method and system for facilitating communications between technical support specialists in a call center environment. Under control of a first computer, the system displays on a display device a form for tracking time of a technical support specialist. The system then receives a request to communicate with a second technical support specialist and sends to an internet protocol address of the second computer request to communicate with the first technical support specialist. At the second computer system, the system displays on a second display device a form for tracking time of the second technical support specialist. In response to receiving a request sent by the first computer system, the second system displays on the second display device a window informing the second technical support specialist that the first technical support specialist has requested to communicate.
    Type: Grant
    Filed: November 5, 1997
    Date of Patent: October 19, 1999
    Assignee: Micron Electronics, Inc.
    Inventor: Jeffrey A. Bull
  • Patent number: 5969977
    Abstract: An electronic memory device organized into sections which are in turn divided into blocks formed of cells and their associated decoding and addressing circuits, the cells being connected in a predetermined circuit configuration and each block being included between two opposite contact regions which are interconnected by parallel continuous conduction lines referred to as the bit lines. In the present invention, at least one interruption is provided in each bit line near a contact region by inserting a controlled switch which functions as a block selector. Advantageously, the proposed solution allows each block to be isolated individually by enabling or disabling as appropriate the switches of the cascade connected blocks.
    Type: Grant
    Filed: December 29, 1997
    Date of Patent: October 19, 1999
    Assignee: STMicroelectronics S.r.l.
    Inventors: Emilio Camerlenghi, Paolo Cappelletti, Luca Pividori
  • Patent number: 5966862
    Abstract: The present invention provides a bird catching apparatus for deploying a catching net rapidly and surely, thereby catching birds surely. Each end of one side edge of the catching net is respectively connected to a pair of deploying arms of each deploying device via a pole member. Each deploying arm is pulled by a pair of extension springs of a deploying unit, and are locked by a locking unit. At the same time, the deploying arms are pulled upward by an auxiliary arm of an auxiliary urging unit. When the deploying arms locked by the locking unit are released, the deploying arms are surely rotated upward, thereby rotating along a vertical surface for over 180.degree.. The catching net is thus deployed.
    Type: Grant
    Filed: September 11, 1996
    Date of Patent: October 19, 1999
    Assignee: Hajime Ueno
    Inventor: Hajime Ueno
  • Patent number: 5968139
    Abstract: A computer system is described in which a table created in memory includes drive description data for one or more IDE devices included in the system. A command intercept circuit is described which intercepts device-identification commands and reroutes the device-identification operation to memory. The command intercept circuit includes an address decode circuit which asserts a first control signal upon decoding an address corresponding with the one or more IDE devices. A command decode circuit responds to the asserted first control signal to decode data and asserts a second control signal when the decoded data corresponds with a device-identification command. An address generator responds to the asserted second control signal to generate a memory address where the drive description data table is stored.
    Type: Grant
    Filed: October 30, 1997
    Date of Patent: October 19, 1999
    Assignee: Micron Electronics, Inc.
    Inventor: Dean A. Klein
  • Patent number: 5966110
    Abstract: An LED driver drives a plurality of light emitting diodes (LEDs) having first terminals connected to a common output stage and second terminals respectively receiving different, suitably rectified, phases of a sinusoidal signal. An output stage of the LED driver includes a first bipolar transistor coupled between a first supply terminal and the first terminals of the LED's. A first MOS transistor drives the base of the first bipolar transistor. The gate of the first MOS transistor is coupled to a first reference voltage. A second bipolar cascode transistor is connected in series with the first MOS transistor and biased by a second reference voltage such that the voltage across the first MOS transistor does not exceed a limit value.
    Type: Grant
    Filed: November 26, 1996
    Date of Patent: October 12, 1999
    Assignee: STMicroelectronics S.A.
    Inventor: Klaas Van Zalinge
  • Patent number: 5966686
    Abstract: Methods and computer systems for semantically analyzing natural language sentences. The natural language processing subsystems for morphological and syntactic analysis transform an input sentence into a syntax parse tree. Semantic analysis applies three sets of semantic rules to create a skeletal logical form graph from a syntax parse tree. Semantic analysis then applies two additional sets of semantic rules to provide semantically meaningful labels for the links of the logical form graph, to create additional logical form graph nodes for missing elements, and to unify redundant elements. The final logical form graph represents the complete semantic analysis of an input sentence.
    Type: Grant
    Filed: June 28, 1996
    Date of Patent: October 12, 1999
    Assignee: Microsoft Corporation
    Inventors: George Heidorn, Karen Jensen
  • Patent number: 5964031
    Abstract: A PCB support for supporting PCBs during surface mounting processing and other PCB assembly processes. In one embodiment, a PCB stand has a support structure attachable to an elevator table of a PCB processing machine and a platform connected to the support structure. The support structure may be a superstructure that can project away from the elevator table, and the platform may be a beam or other member that can support a significant portion of the surface area on the backside of the PCB. The superstructure and platform operate together to position the height of the platform with respect to the elevator table at an elevation at which the platform supports and interior region of the PCB assembly when the elevator table is in a processing position.
    Type: Grant
    Filed: September 9, 1997
    Date of Patent: October 12, 1999
    Assignee: MCMS, Inc.
    Inventors: Douglas K. Smith, Randal D. Lewis
  • Patent number: 5965142
    Abstract: Compounds and methods for diagnosing Leishmania tropica infection, or for screening for L. tropica infection, are disclosed. The disclosed compounds are polypeptides that contain one or more epitopes of an L. tropica protein, Lt-210. The compounds are useful in a variety of in vitro and in vivo immunoassays for detecting L. tropica infection. The polypeptides are further useful in vaccines and pharmaceutical compositions for preventing leishmaniasis in individuals exposed to L. tropica.
    Type: Grant
    Filed: August 4, 1995
    Date of Patent: October 12, 1999
    Assignee: Corixa Corporation
    Inventors: Davin C. Dillon, Steven G. Reed
  • Patent number: D415099
    Type: Grant
    Filed: June 15, 1998
    Date of Patent: October 12, 1999
    Assignee: Intermec IP Corporation
    Inventors: Matthew F. Willkens, Andrew E. Reynolds, Kevin C. Johnson
  • Patent number: D415595
    Type: Grant
    Filed: June 29, 1998
    Date of Patent: October 19, 1999
    Assignee: Wal-Med, Inc.
    Inventors: Nancy O'Farrell, Kami Olearain, Carlos Veliz