Patents Represented by Attorney Seed and Berry LLP
  • Patent number: 5978312
    Abstract: A transition detection circuit includes a low-to-high detector and a high-to-low detector. Each of the detectors includes a normally closed switch that directly transmits an input signal and a delay block that transmits the input signal to control input of the switch after a delay. The delayed input signal opens the switch to block further transmission of the signal and closes a second switch to supply a high voltage in place of the input signal. The transition detector thus provides a short pulse in response to signal transitions with very little delay. To balance a response of the low-to-high detector and the high-to-low detector, the output of the low-to-high detector, which is the slower detector, is applied to the faster input of an output NOR gate. The difference in response time of the NOR gate inputs offsets the difference in response time of the transition detectors.
    Type: Grant
    Filed: February 22, 1999
    Date of Patent: November 2, 1999
    Assignee: Micron Technology, Inc.
    Inventor: Troy A. Manning
  • Patent number: 5975603
    Abstract: A fire hydrant lifting harness includes a lifting triangle, a pair of connecting cables, and a pair of rigid paddles. The lifting triangle includes two bracing members, one each at two corners, forming eyelets therein. For each eyelet, a cable passes through it and the cable is wound around itself. The other end of each cable is attached to a respective lifting paddle in a similar manner. The paddle is made from a rigid material and includes a bend, between the two ends, so that the paddle does not contact the head of the fire hydrant. The end of the paddle opposite from where the cable connects includes an aperture designed to accommodate one of the ports from the fire hydrant. For lifting, the port cap is removed, the paddle is placed around the port and against the hydrant, and the port cap replaced. A lifting force then raises the fire hydrant lifting device which in turn raises the fire hydrant.
    Type: Grant
    Filed: November 17, 1997
    Date of Patent: November 2, 1999
    Assignee: Taurman Distributing & Manufacturing, Inc.
    Inventors: Sandra Novak-Taurman, Wayne Taurman
  • Patent number: 5976000
    Abstract: A hard polishing pad with a porous surface for use in chemical-mechanical planarization of semiconductor wafers. The polishing pad has a body with a planarizing surface upon which a slurry may be deposited, and a plurality of particles are suspended in the body. The body is made from a continuous phase matrix material, and the particles are made from a substantially incompressible material that is soluble in the slurry. As a wafer is planarized, the particles at the planarizing surface of the polishing pad dissolve in the slurry and create pores in the pad. Also, because the particles are substantially incompressible, they reinforce the pad to provide a hard, substantially incompressible pad.
    Type: Grant
    Filed: January 13, 1999
    Date of Patent: November 2, 1999
    Assignee: Micron Technology, Inc.
    Inventor: Guy F. Hudson
  • Patent number: 5976798
    Abstract: The present invention relates to methods of detecting genetic mutations in mitochondrial cytochrome oxidase c genes that segregate with Alzheimer's Disease and methods for determining the amount of heteroplasmy of mitochondrial nucleic acid. The invention provides methods for detecting such mutations, as a diagnostic for Alzheimer's Disease, either before or after the onset of clinical symptoms.
    Type: Grant
    Filed: February 28, 1997
    Date of Patent: November 2, 1999
    Assignee: Mitokor
    Inventors: William Davis Parker, Corinna Herrnstadt, Soumitra Ghosh, Eoin D. Fahy
  • Patent number: 5977586
    Abstract: A non-volatile integrated device having first and second dimensionally different polysilicon gate layers separated by an oxide layer for hot-carrier reliability. More specifically, the oxide and second polysilicon gate layer are selectively etched to form a second gate region over the first polysilicon gate layer that electrically contacts the first polysilicon gate in one direction and is isolated by the oxide in the other direction. Insulating sidewalls are formed over the first polysilicon gate layer regions that are not electrically contacted by the second gate layer to help isolate the second polysilicon gate and form an LDD structure within the substrate for the device.
    Type: Grant
    Filed: May 31, 1995
    Date of Patent: November 2, 1999
    Assignee: STMicroelectronics S.r.l.
    Inventors: Giuseppe Crisenza, Cesare Clementi
  • Patent number: 5974564
    Abstract: A computer system includes a memory controller that interfaces a memory requester with a memory device that may include defective memory cells. For each of plural memory blocks, defective bit sets having one or more defective memory cells are identified. A bit set error map is created and stored which identifies the defective bit sets of each of the memory blocks. In response to receiving from the memory requester a request for access to a requested storage location of the memory device, a determination is made from the error map whether the storage location is in a memory block that includes one or more defective bit sets. If the error map indicates that the requested storage location is in a memory block with one or more defective bit sets, then a determination is made from the error map which of the bit sets are defective. To execute the memory access request, the memory controller accesses the non-defective bit sets to which the defective bit sets have been mapped.
    Type: Grant
    Filed: July 31, 1997
    Date of Patent: October 26, 1999
    Assignee: Micron Electronics, Inc.
    Inventor: Joseph Jeddeloh
  • Patent number: 5972995
    Abstract: Compositions and methods for therapy of cystic fibrosis and other conditions are provided. The compositions comprise one or more flavones and/or isoflavones capable of stimulating chloride transport in epithelial tissues. Therapeutic methods involve the administration (e.g., orally or via inhalation) of such compositions to a patient afflicted with cystic fibrosis and/or another condition responsive to stimulation of chloride transport.
    Type: Grant
    Filed: October 16, 1997
    Date of Patent: October 26, 1999
    Assignee: Children's Hospital Medical Center of Northern California
    Inventors: Horst Bernhard Fischer, Beate Illek
  • Patent number: 5972889
    Abstract: A conjugate of a polypeptide reactive with a fibroblast growth factor receptor and a cytotoxic agent is used for inhibiting the proliferation of epithelial lens cells, especially following extracapsular cataract surgery.
    Type: Grant
    Filed: November 26, 1997
    Date of Patent: October 26, 1999
    Assignee: Pharmacia S.p.A.
    Inventor: Yves Courtois
  • Patent number: 5974410
    Abstract: A computer-based uniform data interface (UDI) system for accessing in a uniform manner data from a data source with an arbitrary organization. The UDI system provides a UDI application programming interface (API) with functions for creating and accessing data organized into containers that contain one or more folders. Each folder optionally contains sub-folders and scalars. The UDI system also provides a UDI registry for registering types of containers and folders supported by a data source, for enumerating the types of containers and folders supported by the data source, and for instantiating container and folder objects corresponding to the data of the data source.
    Type: Grant
    Filed: June 28, 1996
    Date of Patent: October 26, 1999
    Assignee: Microsoft Corporation
    Inventors: Bruce W. Copeland, Jonathan I. Shuval
  • Patent number: 5973975
    Abstract: A sense amplifier driver activates a plurality of sense amplifiers coupled to respective digit lines in each of a plurality of memory-cell arrays. The sense amplifiers each have first and second activation nodes. The sense amplifier driver includes a plurality of drive circuits each coupled to the first and second activation nodes of the sense amplifiers in at least one of the memory-cell arrays. The first activation nodes of the sense amplifiers in at least one of the memory-cell arrays are coupled to a plurality of drive circuits so that the plurality of drive circuits drive the first activation nodes of the sense amplifiers in at least one of the memory-cell arrays in parallel.
    Type: Grant
    Filed: July 29, 1998
    Date of Patent: October 26, 1999
    Assignee: Micron Technology, Inc.
    Inventor: George B. Raad
  • Patent number: 5971704
    Abstract: An improved device for adjusting the running clearance of a pump impeller is shown and described. In a preferred embodiment, an annular adjustment member is positioned adjacent to a pump impeller and the pump housing, the impeller being spaced from the adjustment member and housing by a predetermined distance. The adjustment member is selectively moved towards and away from the impeller, and lockable in any desired position. The adjustment member is moved in an axial direction by loosening a plurality of clamp nuts, and turning adjustment nuts until the annular adjustment member bottoms out on the impeller. The annular adjustment member is then backed off until an end surface of the adjustment member is spaced from the end surface of the impeller by the predetermined distance. The adjustment member is locked in the new location, thereby resetting the running clearance of the pump.
    Type: Grant
    Filed: April 23, 1997
    Date of Patent: October 26, 1999
    Assignee: Toyo Pumps North America Corporation
    Inventor: Urs J. Blattmann
  • Patent number: 5973380
    Abstract: An integrated semiconductor junction antifuse is formed from either adjacent regions of opposite doping types or spaced apart regions of similar doping type within a substrate. In its unblown state, the junction antifuse forms an open circuit that blocks current from flowing while in the blown state, the junction antifuse conducts current. The junction antifuse is blown by applying a breakdown voltage sufficient to overcome a semiconductor junction so that current flows across the reverse-biased semiconductor junction. As current flows across the reverse-biased junction, dopant migration forms a conductive path so that the junction antifuse no longer forms an open circuit.
    Type: Grant
    Filed: December 7, 1998
    Date of Patent: October 26, 1999
    Assignee: Micron Technology, Inc.
    Inventors: Douglas J. Cutter, Kurt D. Beigel
  • Patent number: 5973727
    Abstract: A video image viewing device includes first and second glass plates having a layer of liquid crystal therebetween. A plurality of laser diodes extending along a line near one edge of the first plate are selectively illuminated at an intensity corresponding to the amplitude of a video signal during each of a plurality of video lines. The light propagates through the first plate via total internal reflection not entering the liquid crystal layer until it reaches an area where the refractive index of the liquid crystal is selectively modified. The refractive index may be modified by selectively energizing each of a plurality of horizontal strip electrodes vertically spaced from each other. The electrodes are sequentially energized to frustrate the total internal refraction and thereby cause the light to be transmitted through the liquid crystal layer into the second plate at a location corresponding to the location of video line in a video frame of the video signal.
    Type: Grant
    Filed: May 13, 1997
    Date of Patent: October 26, 1999
    Assignee: New Light Industries, Ltd.
    Inventors: Stephen P. McGrew, P. David DeVries, Roger F. Wink, David H. Foster
  • Patent number: 5974577
    Abstract: An integrated circuit package having external pins includes a function circuit, such as an address buffer, receiving an input voltage through one of the pins. If the input voltage exceeds a maximum rated voltage, the function circuit can be damaged by voltage over-stress. To provide a definitive indication that the function circuit may have been over-stressed, a diode and a fuse are connected in series between the function circuit's pin and ground. When the input voltage nears the maximum rated voltage, the diode biases and applies a voltage to the fuise. The fuse is selected so that when the input voltage exceeds the maximum rated voltage, the applied voltage blows the fuse. At a later time, the function circuit can be tested for over-stress by applying a voltage to the function circuit's pin which is sufficient to forward bias the diode. If no current flows after a sufficient biasing voltage is applied to the pin, it is a definitive indication that the function circuit may have been over-stressed.
    Type: Grant
    Filed: October 14, 1997
    Date of Patent: October 26, 1999
    Assignee: Micron Technology, Inc.
    Inventor: Manny K. Ma
  • Patent number: 5971012
    Abstract: A valve comprises a valve body having an inlet and an outlet defining a flow passage through the valve body. A piston is mounted in a bore intersecting the flow passage and the piston divides the bore into first and second chambers. The piston remains substantially motionless during upstream pressure fluctuations after the desired fluid flow rate through the valve has been established. A reference pressure passage communicates with the inlet and the first chamber of the bore. Springs in the second chamber bias the piston against the fluid pressure from the first chamber. A sleeve on the piston is configured to variably sheath a cover over the outlet such that reciprocation of the piston during initiation of fluid flow through the valve varies the effective area of openings in the cover to achieve the desired differential pressure across the flow control throttle, thus setting the flow rate constant unless the throttle position is changed.
    Type: Grant
    Filed: March 31, 1998
    Date of Patent: October 26, 1999
    Inventor: Paul K. Skoglund
  • Patent number: 5974239
    Abstract: A PCI/ISA computer system architecture is disclosed in which the ISA legacy circuitry (such as the interrupt request controller, DMA controller, and timer counter unit) is integrated within the system controller coupling the processor and PCI buses. Accordingly, the ISA bridge coupling the PCI and ISA buses is simplified relative to prior art PCI-ISA bridges. A high speed communications channel between the system controller and the ISA bridge is established by first placing an address on the PCI bus which is recognizable only by the system controller and the ISA bridge. Data transfer then occurs within standard PCI protocols, but need only require a subset of the A/D lines. Backwards compatibility is maintained, while system performance is improved and system cost is reduced.
    Type: Grant
    Filed: June 11, 1997
    Date of Patent: October 26, 1999
    Assignee: Micron Electronics, Inc.
    Inventor: Dean A. Klein
  • Patent number: 5973645
    Abstract: A snap-on antenna and connector mounting assembly for a hand-held electronic device, such as a hand-held computer. The hand-held electronic device has a housing with a sidewall and a jack-receiving aperture therein, an antenna jack extending through the jack-receiving aperture, and a flexible bushing positioned in the jack-receiving aperture between the antenna jack and the sidewall. The bushing isolates the antenna jack from the sidewall, so the antenna jack is deflectable relative to the sidewall without being damaged. The snap-on antenna has a substantially rigid base having an interior area therein and having a housing-attachment portion with an aperture communicating with the interior area. A plug connector contained within the interior area has a jack-connecting portion positioned to removably receive the antenna jack such that the antenna can be snapped into and off of the hand-held electronic device between installed and removed positions, respectively.
    Type: Grant
    Filed: December 19, 1996
    Date of Patent: October 26, 1999
    Assignee: Intermec IP Corporation
    Inventors: Robert A. Zigler, Kevin Arnal
  • Patent number: 5972612
    Abstract: A method of analysing nucleic acid sequences comprises measuring by surface sensitive detection technique the binding interaction between a first nucleic acid sequence and a second nucleic acid sequence, one of the first and second nucleic acid sequences being immobilized to a solid phase surface, to determine the affinity or an affinity related parameter for the binding reaction as indicative of the extent of complementary between the first and second nucleic acid sequences. The method is characterized in that the measurement of the binding interaction is performed at annealing conditions adjusted such that the dissociation rate constant for the binding interaction corresponding to full complementarity between the first and second nucleic acid sequences is greater than about 10.sup.- per second, thereby permitting equilibrium for the interaction to be rapidly attained.
    Type: Grant
    Filed: May 15, 1998
    Date of Patent: October 26, 1999
    Assignee: Biacore AB
    Inventors: Magnus Malmqvist, Bjorn Persson
  • Patent number: D415608
    Type: Grant
    Filed: August 18, 1997
    Date of Patent: October 26, 1999
    Assignee: Nordstrom, Inc.
    Inventor: Pamela A. Gelsomini
  • Patent number: D416032
    Type: Grant
    Filed: June 27, 1996
    Date of Patent: November 2, 1999
    Inventor: Rajeev K. Bakshi