Patents Represented by Attorney Sherr & Vaughn, PLLC
  • Patent number: 8138044
    Abstract: A semiconductor flash memory includes a tunnel oxide film formed over a semiconductor substrate, a first spacer composed of polysilicon formed over the semiconductor substrate including the tunnel oxide film, a second spacer composed of an insulating material formed at sidewalls of the first spacer, a dielectric film formed at the uppermost surface of the first spacer and the second spacer, a control gate formed at the uppermost surface of the dielectric film, and a third spacer composed of an insulating material formed at and contacting sidewalls of the second spacer, the dielectric film and the control gate. A first source/drain region formed may be formed in the semiconductor substrate and self-aligned with the first spacer and a second source/drain region may be formed in the semiconductor substrate and self-aligned with the second spacer.
    Type: Grant
    Filed: December 27, 2009
    Date of Patent: March 20, 2012
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Hyun-Tae Kim
  • Patent number: 8134248
    Abstract: Disclosed herein is an aerogenerator having a rotation support unit for facilitating rotation of a rotational body. The aerogenerator includes a support pillar, a rotational body, vanes, a rotating force transmission unit, a generating unit and a rotation support unit. The support pillar has a hollow space therein and has a support extension on the upper end thereof. The rotational body is provided on the upper end of the support pillar so as to be rotatable using the rotation support unit. The vanes are provided on opposite ends of the rotational body. The rotating force transmission unit transmits rotating force of the vanes to the generating unit. In the present invention, the rotation support unit comprises a rotating plate which is provided between the rotational body and the support pillar, and first rollers which are provided in the rotating plate and are in contact with the rotational body and the support extension.
    Type: Grant
    Filed: November 20, 2008
    Date of Patent: March 13, 2012
    Assignee: Dominic Investment, Inc.
    Inventors: Chris Wilson, John Nelson, Michael Baker
  • Patent number: 8133790
    Abstract: A semiconductor device and a method of manufacturing a semiconductor device. A method may include forming a first well by injecting first conduction type impurity ions on and/or over a semiconductor substrate, forming an extended drain region overlapped with a region of said first well by injecting second conduction type impurities on and/or over a semiconductor substrate, and/or forming a first conduction type second well on and/or over a semiconductor substrate under an extended drain region to overlap with another region of a first well by injecting second conduction type impurities on and/or over a semiconductor substrate. A method may include forming a gate over a first well overlapped with an extended drain region, and/or forming a drain region by injecting second conduction type impurities on and/or over an extended drain region at one side of a gate.
    Type: Grant
    Filed: December 21, 2009
    Date of Patent: March 13, 2012
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Jong-Min Kim
  • Patent number: 8129942
    Abstract: A system, method and apparatus for contact-less charging of battery operated devices is presented. There is a host charger with a power converter and resonant tank circuit and a portable device where the battery is located, with a battery charging control IC. The method obviates the need for a voltage controller in each of both the host and the portable stages, thus decreasing complexity and increasing efficiency. The charging of the battery in the portable device is controlled by a charging controller therein, which is in continual electric communication with the host, whose output power the control IC dynamically monitors and controls. Two embodiments for the charging circuitry in the portable device are presented. In one embodiment component count is minimized but battery charging is not optimized when the battery voltage is very low. In the other embodiment charging efficiency is maximized regardless of the output voltage of the battery, but additional components are utilized.
    Type: Grant
    Filed: July 10, 2006
    Date of Patent: March 6, 2012
    Assignee: LS Cable & System Ltd.
    Inventors: Dong-Young Park, Sung-Wook Moon, Sung-Wook Choi, Gwang-Hee Gwon, Sub Han, Jung-Bum Kim
  • Patent number: 8130011
    Abstract: A power integration circuit includes: a first transistor having a control electrode connected to a first voltage source to be supplied with a control signal therefrom, the first transistor being connected between a switch and a ground. A sense resistor has one end connected to the ground. A second transistor has a control electrode connected to the first voltage source to be applied with a control signal therefrom, with the second transistor being connected between the switch and the other end of the sense resistor. The power integration circuit further includes: a comparator for comparing the sense voltage with the reference voltage and delivering a difference between the sense voltage and the reference voltage to a logic circuit.
    Type: Grant
    Filed: November 30, 2009
    Date of Patent: March 6, 2012
    Assignee: Dongbu HiTek Co., Ltd.
    Inventors: Sung-Min Park, Seok-Hoon Bang
  • Patent number: 8125026
    Abstract: A gate of a trench type MOSFET device and a method of forming a gate. A gate of a trench type MOSFET device may include a gate oxide film formed on and/or over a trench type gate poly such that parasitic capacitance may be produced in a gate poly. An electric field may be substantially uniformly formed in a MESA region surrounding a gate poly. An overcurrent may be substantially prevented from flowing into a MOS channel around a gate. A gate oxide film may be substantially prevented from being destroyed and/or leakage may be substantially prevented. Reliability of a device may be maximized.
    Type: Grant
    Filed: November 13, 2009
    Date of Patent: February 28, 2012
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Ji-Houn Jung
  • Patent number: 8122673
    Abstract: A portable skylight replacement safety assembly that includes a first and second support frames releasably connected to each other and having a plurality of support handles and support members which extend substantially perpendicularly from the first support frame for supporting the first support frame on and/or over the skylight on a working surface at a predetermined distance.
    Type: Grant
    Filed: October 27, 2008
    Date of Patent: February 28, 2012
    Inventors: J. Nigel Ellis, John Whitty
  • Patent number: 8124438
    Abstract: A CMOS image sensor and a method of fabricating the same. The CMOS image sensor may minimize disappearance of electrons generated by light without transmission of electrons to a transfer gate. A method of manufacturing a CMOS image sensor may include forming a trench over an isolation region of a semiconductor substrate to define an active region including a photodiode region and a transistor region. The method may include forming first conductivity-type ion implanted regions over a trench side wall of a photodiode region and over a region adjacent to the transistor region. The method may include forming second conductivity-type ion implanted regions between a first conductivity-type ion implanted region and a trench, and between a lower part of a transistor region and a first conductivity-type ion implanted region. The method may include forming an isolation layer, forming a gate electrode and a spacer, and/or forming a photodiode.
    Type: Grant
    Filed: September 24, 2009
    Date of Patent: February 28, 2012
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Ji-Hwan Park
  • Patent number: 8119433
    Abstract: An image sensor includes an insulating interlayer including a metal line on a semiconductor substrate, a photodiode pattern provided on the insulating interlayer to be connected to the metal line, the photodiode pattern separated per unit pixel by a gap area, a device isolation insulating layer provided on the insulating interlayer including the photodiode pattern and the gap area, a contact hole provided to the device isolation insulating layer to expose the photodiode pattern and a neighbor photodiode pattern, and a contact plug provided to the contact hole to be connected to a plurality of the photodiode patterns.
    Type: Grant
    Filed: December 26, 2008
    Date of Patent: February 21, 2012
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Keun-Hyuk Lim
  • Patent number: 8122315
    Abstract: Provided is a low-density parity-check (LDPC) decoding apparatus and method using a type-classified index. The apparatus includes: a memory allocating unit for multiplying reception data by an estimated channel value and storing a multiplied value in a memory including a plurality of memory block; an index storing unit for storing a Read Only Memory (ROM) index, an address index and a permutation index for the stored data; a check node updating unit for bring the stored data in parallel based on the ROM index, the address index, and the permutation index and updating a check node; and a bit node updating unit for updating a bit node based on the data stored in the memory and check node information updated in the check node updating unit.
    Type: Grant
    Filed: November 30, 2006
    Date of Patent: February 21, 2012
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Eun-A Choi, Dae-Ig Chang, Deock-Gil Oh
  • Patent number: 8120080
    Abstract: An image sensor includes a trench formed in a semiconductor substrate, a first reflection part formed in the trench and having an inclined, curved surface, a second reflection part formed on the first reflection part such that a remaining space of the trench is filled with the second reflection part, and a vertical type photodiode formed on a region of the substrate between trenches. A method for forming the image sensor includes forming a trench in a semiconductor substrate, forming a first reflection part having an inclined, curved surface in the trench, forming a second reflection part on the first reflection part such that a remaining space of the trench is filled with the second reflection part, and forming a vertical type photodiode on a region of the substrate between trenches.
    Type: Grant
    Filed: October 7, 2009
    Date of Patent: February 21, 2012
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Jeong-Su Park
  • Patent number: 8119444
    Abstract: An image sensor and a method of manufacturing an image sensor. An image sensor may include a semiconductor substrate which may include a readout circuitry. An image sensor may include an interlayer dielectric over a semiconductor substrate, and/or a first metal pattern over an interlayer dielectric. An interconnection may penetrate an interlayer dielectric and/or may be connected to a readout circuitry. A first metal pattern may be formed over an interlayer dielectric, and/or may be connected to an interconnection. A second metal pattern may be formed over a first metal pattern. A photodiode pattern may be formed over a second metal pattern.
    Type: Grant
    Filed: December 8, 2009
    Date of Patent: February 21, 2012
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Min-Hyung Lee
  • Patent number: 8114749
    Abstract: A device for protecting a semiconductor device from electrostatic discharge may include a high voltage first conductivity type well formed in a semiconductor substrate. A first stack region may have a first conductivity type drift region, and a first conductivity type impurity region stacked in succession in the high voltage first conductivity type well. A second stack region may have a second conductivity type drift region, and a second conductivity type impurity region stacked in succession in the high voltage first conductivity type well. A device isolating film formed between the first stack region and the second stack region for isolating the first stack region from the second stack region.
    Type: Grant
    Filed: December 4, 2009
    Date of Patent: February 14, 2012
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Joon-Tae Jang
  • Patent number: 8115550
    Abstract: A transmitter for supplying a large current upon phase change of an output voltage is disclosed.
    Type: Grant
    Filed: December 21, 2009
    Date of Patent: February 14, 2012
    Assignee: Dongbu HiTek Co., Ltd.
    Inventors: Dae-Joong Jang, Wook-Hee Park, Young-Bin Yoon
  • Patent number: 8110170
    Abstract: Provided are a conductive polymer-carbon nanotube composite including a carbon nanotube and a conductive polymer filled therein, and a method of manufacturing the same. The conductive polymer-carbon nanotube composite where a conductive polymer is filled in a carbon nanotube is manufactured by introducing a monomer of the conductive polymer into the carbon nanotube using a supercritical fluid technique and polymerizing the monomer. The conductive polymer-carbon nanotube composite is a novel nano-structure material which can overcome limitations that conventional materials may have, and thus can be applied to various applications such as sensors, electrode materials, nanoelectronic materials, etc.
    Type: Grant
    Filed: September 21, 2007
    Date of Patent: February 7, 2012
    Assignee: SNU R&DB Foundation
    Inventors: Yung-Woo Park, Johannes Steinmetz
  • Patent number: 8111773
    Abstract: A transmission method for a multiple antenna system including a first device having M (>1) transmitting antennas and a second device having N (>1) receiving antennas is disclosed. The method includes determining whether there is a multiple-input multiple-output (MIMO) transmission scheme satisfying a condition that it consumes less energy than a single-input single-output (SISO) transmission scheme to transmit a frame at a given transmission power, among one or more MIMO transmission schemes available to the first device and the second device, the one or more MIMO transmission schemes being determined by the numbers of activated transmitting and receiving antennas, and MIMO code; determining a transmission mode as a MIMO mode when there is the at least one MIMO transmission scheme satisfying the condition, and otherwise determining the transmission mode as a SISO mode; and performing frame transmission from the first device to the second device in the determined transmission mode.
    Type: Grant
    Filed: October 16, 2008
    Date of Patent: February 7, 2012
    Assignee: Soongsil University research Consortium techno-Park
    Inventors: Sun-Heui Ryoo, Sae-Woong Bahk, Young-Han Kim
  • Patent number: 8109786
    Abstract: A connector for a coaxial cable physically and electrically connects a coaxial cable with various kinds of electric members. The coaxial cable includes a hollow inner conductor and a corrugated outer conductor surrounding the inner conductor. A carrier terminal inserted into the inner conductor of the coaxial cable has a diameter elastically adjusted to an inner diameter of the inner conductor.
    Type: Grant
    Filed: January 13, 2010
    Date of Patent: February 7, 2012
    Assignee: LS Cable & System Ltd.
    Inventors: Hyoung-Koog Lee, Bong-Kwon Cho, Sang-Hyun Song, Young-Il Cho, Kwang-Su Nam, Youn-Jung Kim
  • Patent number: 8104901
    Abstract: Provided are an image projection system and method, the image projection system including: a light source for providing illumination light; an illumination optics for receiving and illuminating the illumination light; a Spatial Light Modulator (SLM) having 2 rows of modulation devices formed to be offset from each other, each of the modulation devices modulating the light illuminated from the illumination optics; a frame scanner for scanning the modulated light from the SLM onto a screen to thereby generate a two-dimensional (2D) image corresponding to one frame on the screen; and a projection optics for projecting and focusing the modulated light transmitted from the frame scanner onto the screen.
    Type: Grant
    Filed: July 10, 2007
    Date of Patent: January 31, 2012
    Inventor: Sung-Hoon Kwon
  • Patent number: 8105910
    Abstract: A silicide forming method for a semiconductor device. A silicide forming method may include forming a gate electrode by depositing a gate oxide film and/or polysilicon over a silicon substrate and patterning. A silicide forming method may include forming a nitride film spacer over sidewalls of a gate electrode and simultaneously performing source/drain implant and amophization implant over a silicon substrate. A silicide forming method may include depositing an insulating film after performing source/drain and amophization implants. A silicide forming method may include partially and/or entirely exposing a source/drain and/or gate electrode disposed under an insulating film by etching an insulating film. A silicide forming method may include applying a metal film over a silicon substrate and forming silicide over regions etched by performing heat treatment over a source/drain and/or gate electrode.
    Type: Grant
    Filed: September 24, 2009
    Date of Patent: January 31, 2012
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Hee-Jae Shin
  • Patent number: D655205
    Type: Grant
    Filed: February 14, 2011
    Date of Patent: March 6, 2012
    Assignee: Taesung Precision Co., Ltd
    Inventor: Sung Woo Kang