Patents Represented by Attorney, Agent or Law Firm Skjerven, Morrill, MacPherson Franklin and Friel
  • Patent number: 6126798
    Abstract: An anode includes an anode cup, a membrane and ion source material, the anode cup and membrane forming an enclosure in which the ion source material is located. The anode cup includes a base section having a central aperture and the membrane also has a central aperture. A jet is passed through the central apertures of the base section of the anode cup and through the membrane allowing plating solution to be directed at the center of a wafer being electroplated.
    Type: Grant
    Filed: November 13, 1997
    Date of Patent: October 3, 2000
    Assignees: Novellus Systems, Inc., International Business Machines Corp.
    Inventors: Jonathan David Reid, Robert J. Contolini, John Owen Dukovic
  • Patent number: 6127700
    Abstract: An insulated-gate field-effect transistor utilizes local threshold-adjust doping to control the voltage at which the transistor turns on. The local threshold-adjust doping is present along part, but not all, of the lateral extent of the channel. In the transistor structure, a channel zone laterally separates a pair of source/drain zones. The channel zone is formed with a main channel portion and a more heavily doped threshold channel portion that contains the local threshold-adjust doping. Gate dielectric material vertically separates the channel zone from an overlying gate electrode. The transistor is a long device in that the gate electrode is longer, preferably at least 50% longer, than the gate electrode of a minimum-sized transistor whose gate length is approximately the minimum feature size. The long-gate transistor is suitable for use in analog and high-voltage digital portions of a VLSI circuit.
    Type: Grant
    Filed: September 12, 1995
    Date of Patent: October 3, 2000
    Assignee: National Semiconductor Corporation
    Inventor: Constantin Bulucea
  • Patent number: 6124637
    Abstract: A grid array assembly method and apparatus uses a flex circuitry substrate and includes providing a series of conforming flex circuitry substrates, the flex circuitry substrates include bonding pads and metallization on a first surface and, holes in the substrate which define a contact pad array on the opposite surface. The substrates are tested and acceptable, then mounted on a carrier strip with longitudinally aligned apertures. The carrier strip is typically a metal such as copper. The strip with mounted substrates is then passed to a station where an IC die is mounted on the substrate first surfaces wire bonds are placed from the die to the bonding pads, and the assembly is encapsulated by auto-molding to form a package body. Subsequently, interconnecting bumps are placed on the contact pads and the assembly is removed from the strip.
    Type: Grant
    Filed: September 25, 1998
    Date of Patent: September 26, 2000
    Assignee: Amkor Technology, Inc.
    Inventors: Bruce J. Freyman, Robert F. Darveaux
  • Patent number: 6124044
    Abstract: Methods are provided for protecting exterior surfaces of automobiles and other products, or components of products, against abrasion, abrasive dust, water, acid rain, etc. The methods involve applying to a surface a protective coating composition comprising an emulsion selected from the group consisting of a vinyl-acrylic copolymer emulsion and a vinyl acetate-ethylene emulsion. The emulsion is dried to form a water-resistant protective coating that can be removed from the underlying surface by peeling when no longer desired.
    Type: Grant
    Filed: October 27, 1995
    Date of Patent: September 26, 2000
    Assignee: Cal-West Equipment Company, Inc.
    Inventor: Ronald Swidler
  • Patent number: 6124179
    Abstract: A method of semiconductor fabrication includes the steps of forming a dielectric layer on a first surface of a semiconductor wafer having a plurality of laterally distributed semiconductor devices selectively interconnected on the first surface and bonding a support substrate to the first surface of the semiconductor wafer on the dielectric layer to form a composite structure. A portion of the semiconductor wafer from a second surface which is opposite the first surface is removed and the second surface of the semiconductor wafer is processed. Processing of the second surface optionally includes the formation of isolation trenches electrically isolating the laterally distributed semiconductor devices.
    Type: Grant
    Filed: January 30, 1998
    Date of Patent: September 26, 2000
    Inventor: Fred W. Adamic, Jr.
  • Patent number: 6124679
    Abstract: In some embodiments, a light bulb for an electrodeless discharge lamp has a protuberance such that the cold spot of the bulb is located in the protuberance. The protuberance is spaced from the induction coil of the lamp so as to be easily accessible. Hence the cold spot temperature is easy to measure and control. In some embodiments, heat sinks are provided to cool the light bulb. An active control element including a Peltier element is provided to control the cold spot temperature.
    Type: Grant
    Filed: August 18, 1998
    Date of Patent: September 26, 2000
    Assignee: Cadence Design Systems, Inc.
    Inventor: Nickolas G. Vrionis
  • Patent number: 6124421
    Abstract: Dielectric compositions encompassing one or more poly(arylene ether) polymers are provided. The dielectric compositions have the repetitive structural unit: ##STR1## where n=0 to 1; m=0 to 1-n; and Y.sub.1, Y.sub.2, Ar.sub.1 and Ar.sub.2 are each a divalent arylene radical, Y.sub.1 and Y.sub.2 derived from biphenol compounds, Ar.sub.1 derived from difluoroarylethynes and Ar.sub.2 derived from difluoroaryl compounds. Where both Y.sub.1 and Y.sub.2 are derived from fluorene bisphenol, n=0.1 to 1. Such poly(arylene ether) polymers are employed with a variety of microelectronic devices, for example, integrated circuits and multichip modules.
    Type: Grant
    Filed: December 12, 1997
    Date of Patent: September 26, 2000
    Assignee: AlliedSignal Inc.
    Inventors: Kreisler S. Y. Lau, Tian-An Chen, Boris A. Korolev, Emma Brouk, Paul E. Schilling, Heike W. Thompson
  • Patent number: 6122442
    Abstract: A structure and a format for providing a video signal encoder under the MPEG standard are provided. In one embodiment, the video signal interface is provided with a decimator for providing input filtering for the incoming signals. In one embodiment, the central processing unit (CPU) and multiple coprocessors implements DCT and IDCT and other signal processing functions, generating variable length codes, and provides motion estimation and memory management. The instruction set of the central processing unit provides numerous features in support for such features as alpha filtering, eliminating redundancies in video signals derived from motion pictures and scene analysis. In one embodiment, a matcher evaluates 16 absolute differences to evaluate a "patch" of eight motion vectors at a time.
    Type: Grant
    Filed: August 28, 1995
    Date of Patent: September 19, 2000
    Assignee: C-Cube Microsystems, Inc.
    Inventors: Stephen C. Purcell, Didier J. Le Gall
  • Patent number: 6122284
    Abstract: In the preferred embodiment, the outputs of a plurality of analog signal generators are connected to a single wire (the analog bus). Each analog signal generator is addressable by a unique code provided to its respective address input terminals. A host controller selectively addresses only one of the analog signal generators such that an output of only one of the analog signal generators is applied to the analog bus at a time. In this manner, a single wire may be used to transmit a plurality of analog signals to a receiver. In one embodiment, the receiver is a MUX having an output connected to an ADC.
    Type: Grant
    Filed: July 7, 1997
    Date of Patent: September 19, 2000
    Assignee: Telcom Semiconductor, Inc.
    Inventors: Ali Tasdighi, Joseph J. Judkins, III, Chuong Nguyen, Donald E. Alfano
  • Patent number: 6119731
    Abstract: A method and apparatus for manufacturing a hollow plastic product is provided. In accordance with one aspect, into a mold half having a tubular groove portion and a projecting groove portion which projects outwardly from the tubular groove section is supplied a parison into the tubular groove portion and a clump of molding material into the projecting groove portion, and when blow molding is carried out by introducing a pressurized gas into the parison, the clump becomes integrated with the parison thereby providing a plastic product of unitary structure. In accordance with another aspect of the present invention, a parison extrusion nozzle is provided with at least two passages each of which is connected, preferably through a valve, to a corresponding dispensing unit for dispensing a desired molding material. A control unit is provided as connected to each of the dispensing units to control the supply of molding material so that there is obtained a parison having regions of different molding materials.
    Type: Grant
    Filed: September 2, 1998
    Date of Patent: September 19, 2000
    Assignee: Excell Corporation
    Inventors: Tatsuya Nakagawa, Yasuo Ezaki
  • Patent number: 6122302
    Abstract: A laser transmitter used in an optical communication system provides automatic compensation/stabilization of CNR (carrier to noise ratio) and OMI (optical modulation index) in conditions that would have caused these parameters to change if the compensation circuitry was not employed. The compensation circuitry is an open loop that operates in conjunction with a conventional APC (automatic power control) loop. When certain parameters change (i.e., temperature, laser aging, intentional change in optical power) they will affect the laser DC current (either directly or because of the existence of the APC loop) and as a result the CNR/OMI will change. The compensation circuitry senses the change in the laser DC current and changes the modulating current to the laser as required to minimize changes in CNR/OMI.
    Type: Grant
    Filed: December 10, 1997
    Date of Patent: September 19, 2000
    Assignee: Harmonic Inc.
    Inventor: Alon Dean
  • Patent number: 6120674
    Abstract: An electrochemical procedure is employed to selectively remove certain material from a structure without significantly electrochemically attacking other material of the same chemical type as the removed material. The material to be removed constitutes part or all of an electrically non-insulating region (52C). The material which is of the same chemical type as the removed material but which is not to be significantly electrochemically attacked during the removal procedure constitutes part or all of another electrically non-insulating region (52A) electrically decoupled from the first-mentioned non-insulating region. The electrochemical removal procedure is performed with an organically based electrolytic solution containing organic solvent and acid.
    Type: Grant
    Filed: June 30, 1997
    Date of Patent: September 19, 2000
    Assignee: Candescent Technologies Corporation
    Inventors: John D. Porter, Gabriela S. Chakarova
  • Patent number: 6121854
    Abstract: A power divider includes an input port, a first output port, a second output port, a first transformer coupled between the input port and the first output port, and a second transformer coupled between the input port and the second output port. The first and second transformers each incorporates a low pass filter. The power divider further includes a ground plate disposed adjacent to the first and second transformers. The ground plate is capacitively coupled to the low pass filters of the first and second transformers for enhancing the low pass filtering characteristics of the power divider. The power divider provides low pass filtering capability while achieving a significant size reduction over conventional power dividers.
    Type: Grant
    Filed: April 19, 1999
    Date of Patent: September 19, 2000
    Assignee: Digital Microwave Corporation
    Inventors: Robert K. Griffith, Roland Matian
  • Patent number: 6121571
    Abstract: The present invention relates to ignition circuitry for a plasma generator. A discharge is created by application of a high frequency or high voltage dc ignition pulse between an electrode and a first nozzle. Following ignition, the discharge is redirected to a second nozzle for the purpose of moving the plasma flow from the ignition zone into the zone of application to the workpiece. The present invention is directed to plasma ignition circuitry for improving this performance. Positive thermal coefficient ("PTC") resistance is shown to be useful in reliably and reproducibly switching the arc. Alternative embodiments of the present invention relate to switching the plasma from a first nozzle to a second nozzle then sequentially to additional nozzles downstream in the flow of plasma gas in which PTC resistance is used to reliably and reproducibly effect the switching.
    Type: Grant
    Filed: December 16, 1999
    Date of Patent: September 19, 2000
    Inventors: Oleg Siniaguine, Patrick Halahan
  • Patent number: 6122721
    Abstract: A reservation station with format conversion logic enables the implementation of a superscalar computer processing system which incorporates both a floating point functional unit and non-floating point functional units. By converting operand data in a floating point reservation station from external formats to an internal floating point format, a system incorporating such a floating point reservation station enables the representation of operand data in uniform external formats outside floating point arithmetic units (e.g., in a reorder buffer, on operand and result busses, and within non-floating functional units) while also enabling the use of a specialized internal representation (internal floating point format) within floating point arithmetic units.
    Type: Grant
    Filed: March 1, 1999
    Date of Patent: September 19, 2000
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Michael D. Goddard, Kelvin D. Goveas, Norman Bujanos
  • Patent number: 6121107
    Abstract: A method for manufacturing a capacitor includes the steps of a) forming a first sacrificial layer over the etching stop layer; b) partially removing the first sacrificial layer, the etching stop layer, and the dielectric layer to form a contact window, c) forming a first conducting layer over the first sacrificial layer and in the contact window, d) forming a second sacrificial layer over the first conducting layer, e) partially removing the second sacrificial layer, the first conducting layer, and the first sacrificial layer to expose a portion of the first sacrificial layer, f) forming a second conducting layer alongside the second sacrificial layer, the first conducting layer, and the portion of the first sacrificial layer, and g) removing the first and second sacrificial layers to expose the etching stop layer, wherein the remained first conducting layer and the second conducting layer construct a capacitor plate with a generally crosssectionally modified H-shaped structure.
    Type: Grant
    Filed: October 15, 1998
    Date of Patent: September 19, 2000
    Assignee: Mosel Vitelic Inc.
    Inventor: Ah Jih Chang
  • Patent number: 6118439
    Abstract: A voltage supply circuit for an LCD driver employs two voltage dividers. A low current voltage divider includes resistive elements having a high resistance, thus providing a bias voltage with a low current. A high current voltage divider includes resistive elements having low resistances, thus providing a bias voltage with a high current. The high current voltage divider provides bias voltage levels with high current at the beginning of each time phase change. Thus, the liquid crystal display receives a high current when updating the bias voltage levels on the LCD, thereby producing a fast settling time. When the bias voltage levels are held constant, however, only the low current voltage divider provides the bias voltage levels to reduce power consumption. A halt mode prevents the liquid crystal display and driver from consuming any power by disconnecting both voltage dividers from the voltage source when in sleep mode.
    Type: Grant
    Filed: February 10, 1998
    Date of Patent: September 12, 2000
    Assignee: National Semiconductor Corporation
    Inventors: Franklin S. Ho, William E. Miller, Ying Quan Zhong, Richard E. Crippen
  • Patent number: 6119212
    Abstract: A method for decreasing the size of a root partition on a computer system operating under control of a UNIX type operating system without reinstalling the operating system. The computer system includes a first storage device. The first storage device includes the root partition which has a first size. The root partition includes a root file system. The method includes backing up the root file system to a backup file system, booting the computer system to a maintenance mode, deactivating the root partition, activating the root partition at a second size smaller than the first size, and restoring the root file system from the backup file system.
    Type: Grant
    Filed: April 23, 1997
    Date of Patent: September 12, 2000
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Danny Brice Gross, Michael Douglas O'Donnell, Gene Regis Toomey
  • Patent number: 6117804
    Abstract: A process of making a mineral powder usable for manufacturing functional fiber includes pulverizing mineral ingredients including germanium of 60 weight percent, biostrome of 20 weight percent, jade of 10 weight percent, anorthite of 5 weight percent and minerals of 5 weight percent to about 100 mesh and charging the mineral ingredients into an internal furnace of copper having a wall thickness of 2-5 mm; placing feldspar pulverized to about 325 mesh between an inner surface of an electric heating plate and an outer surface of the internal furnace; heating the mineral ingredients and feldspar for seven days at about 1000.degree. C. by means of the electric heating plate; pulverizing the mineral ingredients having had thermal deformation from the internal furnace again to more than about 325 mesh; placing the pulverized mineral ingredients into the internal furnace again; charging the internal furnace with the burnt feldspar; again heating the mineral ingredients for three days at 1000.degree. C.
    Type: Grant
    Filed: April 29, 1997
    Date of Patent: September 12, 2000
    Assignee: Han IL Mulsan Co., Ltd.
    Inventor: Eung-Hwa Cho
  • Patent number: D431140
    Type: Grant
    Filed: January 10, 2000
    Date of Patent: September 26, 2000
    Inventor: Kuo-Yung Kuo