Patents Represented by Attorney, Agent or Law Firm Skjerven Morrill MacPherson LLP
  • Patent number: 6385711
    Abstract: A method, computer system and apparatus describe how a data transmission rate of incoming and outgoing data are correlated to the size of a data storage area of a medium by formatting the medium with the data storage area into a plurality of sectors according to the data transfer rate of the data. The medium is correlated to a data transmission rate of data by providing a controller to format the medium into a sector size according to a packet size associated with the data transfer rate of the data. The method includes providing a controller with a capability of determining a read/write transmission size, the read/write transmission size correlated to the data transmission rate and the sector size. The controller also has the capability of determining a read/write transmission size according to the formula: Rtrans=(RHD, Rdata)max.
    Type: Grant
    Filed: April 26, 1999
    Date of Patent: May 7, 2002
    Assignee: Dell Products, L.P.
    Inventor: Tom Colligan
  • Patent number: 6384520
    Abstract: A cathode structure for use in field emission display (FED) devices includes four layers. A first layer consists of conducting lines supported on an insulating substrate. A second layer consists of thin non-conducting lines crossing the conducting lines. A third layer consists of a thick layer of non-conducting material with holes centered between the thin non-conducting lines of the second layer and extending over a portion of the thin non-conducting lines. A fourth layer consists of conducting lines containing holes of the same dimension as and aligned with the holes in the third layer exposing portions of the conducting lines of the first layer and of the non-conducting lines of the second layer. Emissive material is deposited on the exposed portions of the conducting lines of the first layer to produce a cathode for an FED device. The four-layer cathode structure improves emission characteristics such as current density and uniformity for planar edge emitters and surface emitters.
    Type: Grant
    Filed: November 24, 1999
    Date of Patent: May 7, 2002
    Assignees: Sony Corporation, Sony Electronics, Inc.
    Inventor: Benjamin E. Russ
  • Patent number: 6384586
    Abstract: A voltage reference generating circuit for providing voltage references substantially less than the typical 1300 mV, with a controllable thermal coefficient. By forcing equal-valued currents through two semiconductor junctions having disparate junction areas, a voltage differential is developed, as is a current proportional to the voltage differential. The voltage differential, and a current proportional to the voltage differential, have positive thermal coefficients. A third semiconductor junction is biased from a third current source and bridged by a resistor pair so as to synthesize a Thevenin-equivalent voltage equivalent series resistance. The equivalent voltage has a negative thermal coefficient. By forcing a current that is equal to the proportional current through the equivalent resistance, a reference voltage, equal to the sum of the Thevenin-equivalent voltage plus the voltage drop across the Thevenin-equivalent resistance, is created.
    Type: Grant
    Filed: December 8, 2000
    Date of Patent: May 7, 2002
    Assignee: NEC Electronics, Inc.
    Inventor: Mitsutoshi Sugawara
  • Patent number: 6385748
    Abstract: A method and circuit for allowing direct access logic testing in integrated circuits. In one embodiment, an interface between integrated circuit core logic and integrated circuit user-defined logic is exposed, and the integrated circuit core logic and the integrated circuit user-defined logic is tested via the exposed interface. In another embodiment, an integrated circuit has logic selection circuitry connected with core logic and user-defined logic. The logic selection circuitry is used to selectively test the core logic and user-defined logic.
    Type: Grant
    Filed: March 30, 1999
    Date of Patent: May 7, 2002
    Assignee: NEC Electronics, Inc.
    Inventors: Ping Chen, Wern-Yan Koe
  • Patent number: 6384910
    Abstract: A curved mirrored surface is used to collect radiation scattered by a sample surface and originating from a normal illumination beam and an oblique illumination beam. The collected radiation is focused to a detector. Scattered radiation originating from the normal and oblique illumination beams may be distinguished by employing radiation at two different wavelengths, by intentionally introducing an offset between the spots illuminated by the two beams or by switching the normal and oblique illumination beams on and off alternately. Beam position error caused by change in sample height may be corrected by detecting specular reflection of an oblique illumination beam and changing the direction of illumination in response thereto. Butterfly-shaped spatial filters may be used in conjunction with curved mirror radiation collectors to restrict detection to certain azimuthal angles.
    Type: Grant
    Filed: December 21, 2000
    Date of Patent: May 7, 2002
    Assignee: KLA-Tencor Corporation
    Inventors: Mehdi Vaez-Iravani, Stanley Stokowski, Guoheng Zhao
  • Patent number: 6379073
    Abstract: A positionable arm composed of multiple member segments connected by an adjustable joint which may be fixedly positioned and repeatedly repositioned. The first member includes an end portion defining a first connector opening and an inner surface defining a chamber. A slideable piston provided in the first member includes a first end and a second end, the first end being adjacent the chamber and creating a seal along the inner surface of the first member. A rotatable connector is received in the first member between the second end of said piston and the end portion of the first member, and a second member is attached to the rotatable connector. To position the arm, a pressurized fluid source supplies compressed air to the chamber, which presses the piston against the rotatable connector, fixedly clamping the connector between the piston and the end portion of the first chamber.
    Type: Grant
    Filed: April 3, 2000
    Date of Patent: April 30, 2002
    Assignee: WaferMasters Incorporated
    Inventors: Woo Sik Yoo, Hiromitsu Kuribayashi
  • Patent number: 6380880
    Abstract: A digital image sensor includes a sensor array of digital pixels which output digital signals as pixel data. Each of the digital pixels includes a photodetector producing an analog signal indicative of the amount of light impinging on the sensor array and a charge transfer amplifier coupled to receive the analog signal and generate an amplified pixel voltage signal. The digital image sensor further includes analog-to-digital conversion (ADC) circuits located within the sensor array. Each of the ADC circuits is connected to one or more charge transfer amplifiers of the digital pixels for converting the amplified pixel voltage signal of each digital pixel to a digitized pixel voltage signal. The charge transfer amplifier operates to increase the sensitivity of the digital image sensor. The charge transfer amplifier can be implemented as a transfer gate with a floating diffusion as a measuring capacitor.
    Type: Grant
    Filed: March 30, 2001
    Date of Patent: April 30, 2002
    Assignee: Pixim, Incorporated
    Inventor: William R. Bidermann
  • Patent number: 6381340
    Abstract: Disclosed is a method for calculating relative phase between channels of a multi-sensor tracking device. The relative phases may be used to calibrate the multi-tracking sensor device to perform more accurately. The method involves recording a plurality of first signals generated by a first channel of the multi-sensor tracking device. The plurality of first signals are generated during a movement of the multi-sensor tracking device. Typically, the multi-sensor tracking device includes several channels, each one of which includes at least one sensor for sensing movement with respect to a corresponding axis. Concurrent to recording of plurality of first signals, a plurality of second signals generated by a second channel of the multi-sensor tracking device, is recorded. The plurality of second signals are generated during the movement of the multi-sensor tracking device.
    Type: Grant
    Filed: June 9, 1999
    Date of Patent: April 30, 2002
    Assignee: DigiLens, Inc.
    Inventor: John J. Storey
  • Patent number: 6381051
    Abstract: A distributed matrix switch comprises a number of collimators each comprising a ferrule and a GRIN lens. A partially reflective coating is provided at the GRIN lens surface to pass a portion of an incoming light beam and to reflect the remainder. If the reflected portion is conveyed by means of an optical path to another collimators of similar construction, selected percentages of an incoming beam may be distributed along two or more optical paths. A receiving channel is then moved to different positions for receiving the portion of the light that is passed by one of the collimators to accomplish switching.
    Type: Grant
    Filed: September 3, 1998
    Date of Patent: April 30, 2002
    Assignee: Dicon Fiberoptics, Inc.
    Inventors: David Polinsky, Roe Hemenway, Ho-Shang Lee
  • Patent number: 6381730
    Abstract: A novel parasitic extraction system includes an interconnect primitive library that has a parameterized inductance function for at least one conducting layer of the integrated circuit. A parasitic extractor analyzes structures within a selected distance of a selected conductor within the integrated circuit and determines parasitic inductance values for the selected conductor using the parameterized inductance function of the interconnect primitive library. Using this parasitic extraction system, parasitic impedances, including inductance, may be extracted for an integrated circuit layout, thus allowing more accurate modeling and timing analysis of the integrated circuit layout to be obtained.
    Type: Grant
    Filed: July 9, 1999
    Date of Patent: April 30, 2002
    Assignee: Sequence Design, Inc.
    Inventors: Keh-Jeng Chang, Li-Fu Chang, Robert G. Mathews, Martin G. Walker
  • Patent number: 6379210
    Abstract: A cathode structure suitable for a flat panel display is provided with coated emitters. The emitters are formed with material, typically nickel, capable of growing to a high aspect ratio. These emitters are then coated with carbon containing material for improving the chemical robustness and reducing the work function. One coating process is a DC plasma deposition process in which acetylene is pumped through a DC plasma reactor to create a DC plasma for coating the cathode structure. An alternative coating process is to electrically deposit raw carbon-based material onto the surface of the emitters, and subsequently reduce the raw carbon-based material to the carbon containing material. Work function of coated emitters is typically reduced by about 0.8 to 1.0 eV.
    Type: Grant
    Filed: November 29, 2000
    Date of Patent: April 30, 2002
    Assignees: Candescent Technologies Coporation, Candescent Intellectual Property Services, Inc., Advanced Technology Materials, Inc.
    Inventors: Xueping Xu, George R. Brandes, Christopher J. Spindt, Colin D. Stanners, John M. Macaulay
  • Patent number: 6381684
    Abstract: A quad data rate RAM (100) in accordance with the invention is a burst synchronous RAM with separate data buses (Data-In, Data-Out) for read and write data. Data can be transferred on both buses and on both the rising and the falling edge of the clock (CLK). Operating at the maximum throughput, four data items are transferred per clock cycle. In one embodiment, data is written to or read from the RAM in bursts of four data items. The RAM includes four independent internal RAM blocks (44-47). in a write burst, (i) a write address, (ii) control signal(s), and (iii) four write data items are sequentially presented to the respective four internal RAM blocks at the respective four clock edges of two consecutive clock cycles. A read burst is carried out similar to a write burst except that there is a one clock cycle latency between the four read data items and the burst address.
    Type: Grant
    Filed: April 26, 1999
    Date of Patent: April 30, 2002
    Assignee: Integrated Device Technology, Inc.
    Inventors: Stanley A. Hronik, Mark W. Baumann
  • Patent number: 6381561
    Abstract: A system and method that utilizes information relating to vehicle damage information including damaged vehicle area information, crush depth of the damaged areas information, and vehicle component-by-component damage information to estimate the relative velocities of vehicles involved in a collision. The change in velocity is estimated using a plurality of methods, and a determination is made as to which method provided a result that is likely to be more accurate, based on the damage information, and the types of vehicles involved. The results from each method may also be weighted and combined to provide a multi-method estimate of the closing velocity. The methods include using crash test data from one or more sources, estimating closing velocity based on the principals of conservation of momentum, and estimating closing velocity based on deformation energy resulting from the collision.
    Type: Grant
    Filed: February 2, 1999
    Date of Patent: April 30, 2002
    Assignee: Injury Sciences LLC
    Inventors: John B. Bomar, Jr., David J. Pancratz, Darrin A. Smith, Scott D. Kidd
  • Patent number: 6381662
    Abstract: A peripheral card having a Personal Computer (“PC”) card form factor and removably coupled externally to a host system is further partitioned into a mother card portion and a daughter card portion. The daughter card is removably coupled to the mother card. In the preferred embodiment, a low cost flash “floppy” is accomplished with the daughter card containing only flash EEPROM chips and being controlled by a memory controller residing on the mother card. Other aspects of the invention includes a comprehensive controller on the mother card able to control a predefined set of peripherals on daughter cards connectable to the mother card; relocation of some host resident hardware to the mother card to allow for a minimal host system; a mother card that can accommodate multiple daughter cards; daughter cards that also operates directly with hosts having embedded controllers; daughter cards carrying encoded data and information for decoding it.
    Type: Grant
    Filed: June 21, 2001
    Date of Patent: April 30, 2002
    Assignee: SanDisk Corporation
    Inventors: Eliyahou Harari, Daniel C. Guterman, Robert F. Wallace
  • Patent number: 6381688
    Abstract: A host adapter integrated circuit that contains data transfer modules has a serial port that uses a single serial port pin to communicate with a slave serial port input-output integrated circuit that interfaces to various resources that are included in a support circuit. The serial port forms a packet from each byte of information to be transferred from a module to the slave device by adding a start bit before the byte, followed by a parity bit at the end of the byte and followed by a stop bit. After transmitting the packet, the serial port waits for an acknowledge packet from the slave serial port input-output integrated circuit, for example for two clock cycles after transmission of the packet. For synchronous operation, a common oscillator drives the clock signal on the slave serial port input-output integrated circuit and host adapter integrated circuit.
    Type: Grant
    Filed: May 25, 2000
    Date of Patent: April 30, 2002
    Assignee: Adaptec, Incorporated
    Inventors: Stillman F. Gates, Christopher Burns
  • Patent number: 6381043
    Abstract: A device for quickly and precisely determining a scan start point and improving scanning quality for an image scanner is disclosed. The image scanner includes a photo-processing device and a scanning platform for placing thereon a document to be scanned. The scanning platform is printed with a background region and two color blocks. The two color blocks are separately enclosed by the background region and are of different color from the color of the background region. The first color block has a first specified point therein being a predetermined shift to the scan start point along a specific direction. The second block has a second specified point corresponding to the first specified point in position.
    Type: Grant
    Filed: March 24, 1999
    Date of Patent: April 30, 2002
    Assignee: Mustek Systems Inc.
    Inventors: Jenn-Tsair Tsai, Bill Chen
  • Patent number: 6381683
    Abstract: A method and system providing a memory controller having a destination-sensitive memory request reordering device. The destination-sensitive memory request reordering device includes a centralized state machine operably connected to one or more memory devices and one or more reorder and bank select engines. The centralized state machine is structured such that control information can be received from at least one of the one or more reorder and bank select engines over the one or more control lines. The centralized state machine is structured such that memory status information can be received from at least one of the one or more reorder and bank select engines over the one or more memory status lines, or such that memory status information can be determined by tracking past memory related activity. Additionally, the centralized state machine is structured to accept memory access requests having associated origin information.
    Type: Grant
    Filed: December 9, 1998
    Date of Patent: April 30, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Geoffrey S. Strongin, Qadeer A. Qureshi
  • Patent number: 6380055
    Abstract: A diffusion-retarding barrier region is incorporated into the gate electrode to reduce the downward diffusion of dopant toward the gate dielectric. The barrier region is a nitrogen-containing diffusion retarding barrier region formed between two separately formed layers of polysilicon. The upper layer of polysilicon is doped more heavily than the lower layer of polysilicon, and the barrier region serves to keep most of the dopant within the upper layer of polysilicon, and yet may allow some of the dopant to diffuse into the lower layer of polysilicon. The barrier region may be formed, for example, by annealing the first polysilicon layer in an nitrogen-containing ambient to form a nitrided layer at the top surface of the first polysilicon layer. The barrier region may alternatively be formed by depositing a nitrogen-containing layer, such as a silicon nitride or titanium nitride layer, on the top surface of the first polysilicon layer.
    Type: Grant
    Filed: October 22, 1998
    Date of Patent: April 30, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Mark I. Gardner, Robert Dawson, H. Jim Fulford, Jr., Frederick N. Hause, Mark W. Michael, Bradley T. Moore, Derick J. Wristers
  • Patent number: 6381009
    Abstract: An instrument and methods are used to determine film layer thicknesses, optical constant spectra, and elemental concentrations of a sample substrate overlaid with a single or multiple films. The instrument measures the sample substrate's absolute reflectance and ellipsometric parameters over a first set of wavelengths to determine film layer thicknesses and optical constants of the film layers over the first set of wavelengths. The instrument also measures the sample substrate's absolute reflectance or transmittance over a second set of wavelengths. Based on these measurements and analysis, the instrument determines at least one element's concentration in at least one film layer of the sample substrate.
    Type: Grant
    Filed: June 29, 1999
    Date of Patent: April 30, 2002
    Assignee: Nanometrics Incorporated
    Inventor: William A. McGahan
  • Patent number: 6381603
    Abstract: A system and method for accessing local information in a database. The database is organized with merchandise information including identifier of information provider, identifier information, position information, and description information. The position information is position coordinates of a Global Position System that provides an accurate and fast location search capability of the database. The user of an end-user computer system is able to search the database by sending a query to a remote server computer system. The query includes searching geographic area and searching criteria. After receiving the query, the server computer system 10 then queries the database and receives information from the database query. The server computer 10 returns the search result to the user's computer system. The returned search result includes the identifier of the information provider, identifier of the information, description of information that matches the searching criteria, and position coordinates.
    Type: Grant
    Filed: February 22, 1999
    Date of Patent: April 30, 2002
    Assignee: Position IQ, Inc.
    Inventors: Jawe Chan, Ting-Mao Chang