Abstract: A programmable capacitor array including a plurality of user-selectable, numerically weighted capacitors, each of which includes at least one fixed capacitor and one manufacturer-controlled trim capacitor, advantageously provides a variety of selectable capacitance values for a programmable analog integrated circuit. When coupled to a memory, for example a static memory, switches can be controlled that determine whether a particular fixed capacitor (user-selectable) or trim capacitor (manufacturer-selectable) is electrically coupled into the circuit. User access to those portions of memory controlling switches associated with the trim capacitors can be restricted via an I/O interface and security command. Such programmable capacitor arrays allow efficient implementation of user-programmable filter circuits where the user can conveniently program or reprogram a variety of filter parameters.

Abstract: A method and apparatus for separating a signal uses a low pass filtering in a first direction to produce a signal with a low component and a alias component and then uses a filtering in a second direction to produce a component of a separated signal. The filter has applications in television signal decoding and has other applications.

Abstract: A driver capable of launching signals into a transmission line and of terminating signals at a receiver end of the transmission line includes within the driver a circuit for controlling the output impedance and a circuit for controlling the output slew rate. Accordingly, a desired output impedance can be advantageously established and maintained over a wide range of variations in operating conditions, manufacturing processes and output voltage levels. Such a driver also advantageously limits any crowbar current, thereby reducing the overall power consumption of the driver with little, if any, degradation of driver performance. The driver includes a pull up circuit coupled to receive at least one of a plurality of control codes. The pull up circuit includes pull up output circuit and an impedance control buffer circuit, a parallel pull up circuit, the parallel pull up circuit and the pull up output circuit being controllable to adjust the impedance of the pull up circuit.

Abstract: A 3-D graphics system combines a software programmed setup processor, a 3-D pipeline, and a software programmed back end processor. The setup processor performs “setup” on polygons for the 3-D pipeline. The 3-D pipeline rasterizes the polygons to create pixels. The back end processor performs back end processing, such as Z-buffering and alpha blending on the pixels. In one embodiment, the throughput of the 3-D graphics system is increased by clusterizing the pixels before back end processing. Specifically, a clusterizer combines pixels into clusters that can be processed by the back end processors without data coherency problems. Furthermore, the pixels are selected for a cluster to minimize memory latency and access times. In some embodiments, clusters are filled with fill addresses by a cluster filler. The filled addresses generated by the cluster filler, do not cause potential hazards in the back end processor.

Abstract: A speech recognition system utilizes multiple quantizers to process frequency parameters and mean compensated frequency parameters derived from an input signal. The quantizers may be matrix and vector quantizer pairs, and such quantizer pairs may also function as front ends to a second stage speech classifiers such as hidden Markov models (HMMs) and/or utilizes neural network postprocessing to, for example, improve speech recognition performance. Mean compensating the frequency parameters can remove noise frequency components that remain approximately constant during the duration of the input signal. HMM initial state and state transition probabilities derived from common quantizer types and the same input signal may be consolidated to improve recognition system performance and efficiency. Matrix quantization exploits the “evolution” of the speech short-term spectral envelopes as well as frequency domain information, and vector quantization (VQ) primarily operates on frequency domain information.

Abstract: An amorphous material containing silicon, carbon, hydrogen and nitrogen, provides a barrier/etch stop layer for use with low dielectric constant insulating layers and copper interconnects. The amorphous material is prepared by plasma assisted chemical vapor deposition (CVD) of alklysilanes together with nitrogen and ammonia. Material that at the same time has a dielectric constant less than 4.5, an electrical breakdown field about 5 MV/cm, and a leakage current less than or on the order of 1 nA/cm2 at a field strength of 1 Mv/cm has been obtained. The amorphous material meets the requirements for use as a barrier/etch stop layer in a standard damascene fabrication process.

Abstract: A digital calibration system for an analog-to-digital converter system includes a computational system receiving digital bits from an analog-to-digital converter representing selection of elements of the digital-to-analog converter in response to an analog input. The computational engine produces a digital output representative of the analog input during conversion operation, and digital values for adjustment of an adjustable analog source during calibration. Further, a digital system comprises a radix-less-than-two non-configurable digital-to-analog converter, a comparator system connected to the converter, and a computational system configured for SAR calibration and conversion.

Abstract: In microelectronics (semiconductor) processing, pitting and voiding of aluminum and aluminum alloys by deionized (DI) water is prevented. The present method and apparatus degasifies the DI water to remove the dissolved oxygen gas. The oxygen gas concentration of the DI water is thus reduced from the saturation levels typically present to vastly less than saturation. It has been found that oxygen gas serves as the oxidizing agent in an electro-chemical reaction that includes the aluminum metal as the anode. The degasified DI water can be used at high temperatures and for long exposure times to rinse wafers without problematic aluminum etching. The present method is applicable to any semiconductor wafer fabrication or integrated circuit assembly process that uses DI water in contact with aluminum metallization.

Abstract: A plasma sputtering system that may be used to deposit a film on a substrate such as an optical disk is disclosed. In one embodiment, the sputtering system includes a main vacuum chamber. A plurality of sputtering chambers and a load lock chamber are connected to the main vacuum chamber. An assembly of a horizontal unprocessed substrate, an inner mask, and an outer mask are pressed onto a substrate transport tray that is positioned in the load lock. The tray supports the substrate and the masks throughout the processing of the substrate. A vertical lift lowers the tray from the load lock onto a carousel. The carousel transports the tray, substrate and masks to the sputtering chambers and then back to the load lock for unloading. Other lifts raise the tray, processed substrate, and masks from the carousel to the sputtering chambers. The tray is selectively pressed against the lower access aperture of the load lock and sputtering chambers so as to isolated them from the main chamber.

Abstract: A programmable analogue device including an array of cells. Each cell is controllable for performing a predetermined set of analogue functions. The cells are selectively interconnected for programming selected analogue circuits. Each cell includes an array of subcells, an output circuit coupled to each of the subcells for delivering an analogue output as determined by the analogue function of an activated subcell, and a function control circuit for activating a particular subcell in dependence upon a function select input. Each subcell performs one of the analogue functions among the predetermined set, and includes a differential pair of transistors defining an operational amplifier with the input bias circuit. Each subcell is activated using a series switch in the subcell which couples the subcell to an input bias circuit; the series switch in each subcell is in turn coupled to and controllable by the function control circuit.

Abstract: The resolution of a charged particle beam, such as a focused ion beam (FIB), is optimized by providing an energy filter in the ion beam stream. The energy filter permits ions having a desired energy range to pass while dispersing and filtering out any ions outside the desired energy range. By reducing the energy spread of the ion beam, the chromatic aberration of the ion beam is reduced. Consequently, the current density of the ion beam is increased. The energy filter may be, e.g., a Wien type filter that is optimized as an energy filter as opposed to a mass filter. For example, to achieve useful dispersion the energy filter may use a quadrupole structure between two magnetic pole pieces thereby producing a combined quadrupole electric field and dipole electric field within a magnetic field.

Abstract: A pump beam is modulated at a first frequency and a modulated pump beam is used to periodically heat the surface of a semiconductor wafer at a location, thereby generating a disturbance at such location. Two probe beams are provided which are coherent with each other having different frequencies or phase. One probe beam is directed towards the location where the disturbance is generated and the other probe beam is directed towards the sample surface at a location away from the disturbance so that it is substantially unaffected by the disturbance but is subject to substantially the same environmental factors as the location where the disturbance is generated. Reflections of the two probe beams are combined and interfere at a detector, The detector output is analyzed to provide the normalized amplitude of the sidebands for determining the physical characteristics or composition of the wafer, including the dose of any ion implants.

Abstract: A small package is provided for a flash EEPROM memory. The small package uses terminals which are part of a bottom conductive layer of a circuit board. In this manner, the final package can be quite thin. The circuit board can be connected to the integrated circuits and passive devices and can be encapsulated in plastic or glued to a plastic cover. In this manner, a thin and relatively inexpensive package can be formed. Additionally, the circuit board can have testing connections which can be removed before forming the final package.

Abstract: A computer gaming system and method of operation thereof are provided that both drastically reduce the cost of gaming stations and allow contemporaneous access to multiple game programs from a single gaming station. The computer gaming system of the present invention allows for transparent modifications and upgrades to the gaming programs by executing gaming programs on a server/host computer connected to a plurality of client/terminal computers via communication pathways. Each client/terminal computer comprises a client/terminal program that allows input and output streams of the gaming program executed on the server/host computer to be separated and redirected to the client/terminal computers. Since the gaming programs are executed entirely on the server/host computer, with only wagering input and display output operations being executed on the client/terminal computers, the cost of the hardware and software required for each client/terminal computer is greatly reduced.

Abstract: A method for fabricating a semiconductor device reduces soft errors, thereby enhancing reliability of the semiconductor device. In the method, a benzo cyclo butene (BCB) layer having a low water intake rate and an excellent blocking effect against alpha particles is formed between an alpha particle source such as a solder ball and sensitive integrated circuit devices such as a memory cell.

Abstract: Light from an image displayed on a display screen 10 is transmitted to an observer's eye 11 by way of a dynamic optical element 12 (such as a spatial light modulator or an electrically switchable holographic composite) which acts as a lens. The characteristics of the dynamic optical element 12 can be altered so that it acts sequentially to direct light of different colors to the observer's eye. In one optional embodiment emitters 17 on the display screen 10 emit infra-red radiation which is projected by the dynamic lens 12 as a broad wash onto the eye 11. Infra-red radiation reflected back from the eye 11 is focussed by the dynamic lens 12 onto detectors 18 also provided on the display screen 10. The detectors 18 are thus able to sense the direction of eye gaze, and the dynamic lens 12 is controlled in dependence on this to create an area of high resolution in an area of interest centered on the direction of gaze, which is moved to follow the eye gaze as its direction alters.

Abstract: Incoming geometry data are buffered in one or more buffers. The data are written to the buffers in an order which is not necessarily the order in which a processor or processors that construct images from the data need the data for fast processing. The data are provided to the processors in the order needed for fast processing. In some embodiments, fast processing involves starting critical path computations early. Examples of critical path computations are lighting computations which take more time than position computations. At least one processor has a pipelined instruction execution unit. The processor executes critical path computation instructions as long as a critical path instruction can be started without causing a pipeline stall. When no critical path instructions can be started without causing a stall, the processor starts a non-critical path instruction.

Abstract: The present invention provides a method and apparatus for executing a boundary check instruction that provides accelerated bound checking. The instruction can be used to determine whether an array address represents a null pointer, and whether an array index is less than zero or greater than the size of the array. Three extensions of a boundary check instruction are provided, with each performing a different combination of three boundary check comparisons. One comparison compares a first operand, which may contain the base address of an array, to zero. Another comparison evaluates the value of a second operand, which may contain an index offset, to determine if it is less than zero. The other comparison evaluates whether the value of the second operand is greater than or equal to a third operand. The third operand may indicate the size of an array. A trap is generated if any of the comparisons evaluates to true.

Abstract: A line locator having the capability of determining the horizontal position with respect to a line is described. The line locator includes a left sensor and a right sensor of any orientation. The left sensor and the right sensor are coupled to a convolution amplifier that amplifies the sum of the output signals from the left sensor and the right sensor. The detection circuitry includes automatic gain control amplification where the automatic gain control signal is obtained digitally from a digital controller. In addition, the detection circuitry includes phase detection circuitry where the phase reference signal is obtained from an external transmitter that is coupled to the line. In addition, the AGC signal and the phase reference signal may both be obtained by processing output signals from magnetic field detectors in the line locator.