Abstract: A Booth multiplier for multiplying a first number with a second number to produce a product has an array of adder cells arranged in a plurality of rows of adder cells and is provided with input circuitry that reduces the power consumption of the multiplier. This input circuitry includes a plurality of Booth recoding logic cells that provide the control signals to multiplexers in the adder cells in the array. The Booth recoding logic cells receive different subsets of bits of the second number and generate the Booth recoded control signals as a function of the received subset of bits. Each Booth recoding logic cell includes balanced logic circuitry for generating all of the Booth recoded control signals from that Booth recoding logic cell at the same time. The balanced logic circuitry minimizes temporary short-circuit paths in the multiplexers in the adder cells. The input circuitry also includes a split bus that provides the first number to the array.

Abstract: A host adapter integrated circuit that contains data transfer modules has a serial port that uses a single serial port pin to communicate with a slave serial port input-output integrated circuit that interfaces to various resources that are included in a support circuit. The serial port forms a packet from each byte of information to be transferred from a module to the slave device by adding a start bit before the byte, followed by a parity bit at the end of the byte and followed by a stop bit. After transmitting the packet, the serial port waits for an acknowledge packet from the slave serial port input-output integrated circuit, for example for two clock cycles after transmission of the packet. For synchronous operation, a common oscillator drives the clock signal on the slave serial port input-output integrated circuit and host adapter integrated circuit.

Abstract: A processor system includes an on-chip, split-transaction bus with independent address/control and data buses. Arbitration and bus acquisition protocols are performed on the address/control bus. An arbiter arbitrates I/O requests and regulates concurrent ownership of the split-transaction bus by assigning a virtual channel to each bus request. Data bus access is granted to a virtual channel on a priority basis, s so as to utilize to a maximum extent the available bandwidth of the data bus. In one embodiment, the data bus is preempted by another virtual channel when current virtual channel using the data bus becomes idle due to, for example, latencies in the data stream. Rearbitration, however, is avoided when the interrupted data transfer resumes, owing to state information regarding the data transfer stored in the master and slave modules of each virtual channel.

Abstract: A memory device which utilizes a plurality of memory modules coupled in parallel to a master I/O module through a bus. Each memory module has independent address and command decoders to enable independent operation. Thus each memory module is activated by commands on the bus only when a memory access operation is performed within the particular memory module. Each memory module has a programmable identification register which stores a communication address of the module. The communication address for each module can be changed during operation of the memory device by a command from the bus. The memory device includes redundant memory modules to replace defective memory modules. Replacement can be carried out through commands on the bus.

Abstract: A single stage amplifier system that produces an accurate linear output signal during low power demands and a pulse modulated output signal during high power demands is disclosed. A control circuit provides a linear signal and a pulsed signal to an output stage in response to a select signal provided by an external circuit. The single output stage includes two transistors in a push-pull arrangement that can be driven in their saturation regions when a pulsed signal is provided by the control circuit or driven within their linear region when a linear signal is provided. The single stage amplifier system can be used in either a half bridge amplifier system or an H-bridge amplifier system.

Abstract: Provided is a vehicle seat assembly which can prevent a submarine phenomenon in a reliable manner, and which is simple in structure so as to allow a high level of flexibility in layout. A slip preventing member for preventing the vehicle occupant from slipping forward under the seat belt in case of an impact is supported by a fixed part of a seat so as to be pivotable between a retracted position and a raised position, and an actuator is interposed between a fixed part of said seat and a part of said slip preventing member. To retain the slip preventing member at its raised position even after the power of the power unit is all used up, the assembly further includes a lock mechanism for retaining said slip preventing member at said raised position.

Abstract: An embodiment of the present invention provides a pickup tool in accordance with the present invention includes multiple contact parts, which contact a passivation layer of a semiconductor chip so that the contact parts are far from chip pads and fuses when holding the semiconductor chip. Furthermore, a die bonding apparatus has one or two pickup tools, an aligning stage, and a bond stage or a bond head.

Abstract: A cable storing apparatus including a device for storing communications cable such as fiber optic cable. The device includes a plurality of cable guide structures located on a panel. The cable guide structures define a plurality of cable storage pathways positioned in an outward progression from a hub. The cable can be individually stored in each cable storage pathway. In one example the cable guide structures include discontinuous wall structures with radial cable entry gaps for allowing cable to enter the cable storage pathways. The cable guide structures may also include posts located in the radial cable entry gaps for defining portions of the cable storage pathways and portions of the cable entry pathways leading towards the cable storage pathways. In one example, the cable storage pathways encircle the hub. The cable storage device can be implemented with an add-on structure utilized for shipment and installation of a fiber optic carrier.

Abstract: An in-system programmable (ISP) system can be programmed by remote access from a host programming system. The remote access can be accomplished over a wired data network, a wireless data network, a radio channel, or any combination of the above. In the ISP system, an ISP controller receives control and programming data through the access interface to program ISP devices in accordance with ISP programming conventions. The ISP controller can be provided by an integrated circuit having a microprocessor core.

Abstract: Identification of within-wafer and wafer-to-wafer variations in yield induced by processing steps in a multi-step manufacturing process. Methods are implemented along with wafer position tracking for process control of the manufacturing process. Wafers are systematically rotated according to their position in a batch before entering a processing step. Wafer position tracking analysis of rotated wafers advantageously reveals a static pattern on each wafer regardless of position in a batch. Alternatively, data reduction methods provide a compact representation of site-specific yield data. The data reduction methods use multidimensional scaling to determine distance factor scores and angle factor scores. The distance factor scores track changes in pattern on the wafers. Wafers similar in pattern regardless of rotation angle have similar distance factor scores. The angle factor scores track rotation of patterns on wafers.

Abstract: A shelf assembly and system, which reduces the potential for accidental disruption of service or damage to neighboring transmission elements in a telecommunications network. The present invention operates to guide the transmission elements or fiber cables to and/or from a mounting position, and in or out from either side of electrical and/or optical telecommunications equipment. Fiber cables coupled at the mounting positions can be directed through reversible and removable fiber channels. Each fiber channel has a smooth surface and a radius of curvature, which provides an appropriate bend radius for guiding, routing, or bending the fiber cables into a fiber trough.

Abstract: A disc serving as a spatial radiation modulator has dispersed radiation filters thereon. Each filter has a transmittance or reflectance modulation function of the form sin2(m&thgr;+p&pgr;/4), where m is a positive integer and p has one of the four values 0, 1, 2, 3. A radiation beam including selected wavelength components is diffracted into an elongated image dispersed according to wavelength. Different wavelength components are focused onto different filters on the modulator and are encoded by correspond filters. Since the modulation functions of the filters are orthogonal to one another, it is possible to extract the amplitude of each wavelength component after it has been encoded or modulated by corresponding filter from the total detected signal during one measurement.

Abstract: An excisional biopsy needle assembly for use in combination with a stereotactic platform for excising tissue from the interior of the body. The biopsy needle includes a rotatable flexible blade that is capable of transforming between a contracted configuration for piercing into the interior of the body and an expanded configuration in which the flexible blade is expanded relative to the shaft of the needle for excising tissue. The needle assembly may be mounted in a stereotactic needle for a breast biopsy procedure that digitally directs the needle tip into a lesion with the flexible blades in a contracted configuration, then expands the flexible blades to the expanded configuration and rotates the blades thus excising tissue in a region having a cross sectional dimension that is large in relation to the cross section of the needle shaft. The excised tissue is extracted from the needle tip through an aspiration channel.

Abstract: A technique, which substantially reduces the number of power-stage and control circuit components in an isolated DC/DC converter with parallel current-doubler rectifier stages, includes on the primary side transformers with serially connected primary windings each having a corresponding secondary winding coupled to one of the voltage-doubler stages. In one embodiment, the primary and secondary windings and filter inductors of the current-doubler rectifier stages are provided on an integrated magnetic core. The filter inductors in each current-doubler rectifier stage can be provided as coupled inductors. In one embodiment, an X-shaped magnetic core is provided to achieve coupled or uncoupled filter inductors.

Abstract: A computer system and method of operation thereof are provided that allow interactive navigation and exploration of spatial environments, both real and virtual. The computer system employs a data architecture comprising a network of nodes connected by branches. Each node in the network represents an intersection in the real environment that allows a user of the computer system to select which path to follow. Likewise, each branch in the network represents a path connecting physical intersections in the real environment. The network is constructed directly from a map of the target environment. Navigation data such as image frame sequences, intersections between paths, and other related information are associated with the elements of the network. This establishes a direct relationship between locations in the environment and the data which represent them.

Abstract: A semiconductor device includes a plurality of memory blocks with each memory block including a normal memory section and a redundant memory section. Redundancy circuits replace some defective wordlines in a normal memory section included in a memory block with redundant wordlines in a redundant memory section included in the memory block and replace any remaining defective wordlines with redundant wordlines in a redundant memory section included in another memory block. Therefore, in the semiconductor device, it is possible to repair defective wordlines even if the number of defective wordlines in a normal memory section is larger than the number of redundant wordlines in the corresponding redundant memory section.

Abstract: The present invention relates to a method of forming a self-aligned silicide (salicide) by siliciding a gate area prior to siliciding a source and drain area and/or spacer formation. The method improves transistor speed by lowering the leakage current in the source and drain areas and lowering the polysilicon sheet resistance of the gate. As a result of one embodiment of the present method, a silicide is formed over the gate area that is advantageously thicker than silicide formations over the source and drain areas.

Abstract: The present invention is directed to an apparatus and method to clamp and terminate signals along a communication bus; the clamping and termination are performed dynamically whenever a signal exceeds a set peak value or falls below a set low value. Variations include a clamping and termination circuit made of metal oxide semiconductor (MOS) devices where one MOS device clamps for over-voltage and another MOS device clamps for under-voltage. Biasing circuits to the gates of the MOS devices assure that proper bias voltage is applied so that the MOS devices only clamp and terminate when a signal is received and that signal falls off the set high or low values, this assures dynamic clamping and termination and avoids unnecessary additional voltage from a driving device.

Abstract: A socket for mounting memory module boards on a printed circuit board (PCB) includes a first socket, a second socket and a third socket. The first socket includes a first socket body that receives a first memory module board, a first clip that connects to a tab of the first memory module board, and a first signal line connected to the first clip and extending outside of the first socket body. The second socket is in an area adjacent to the first socket and includes a second socket body that receives the first and a second memory module boards on opposite sides of the second socket body, two sets of upper socket pins disposed within the second socket body, and two sets of lower socket pins disposed to be opposite to the upper socket pins.