Integrated circuit tester
Description
FIG. 1 is a top plan view of an integrated circuit tester showing our new design;
FIG. 2 is a front elevational view;
FIG. 3 is a rear elevational view;
FIG. 4 is a right side elevational view, the hinged keyboard shown extended;
FIG. 5 is a left side elevational view, the hinged keyboard shown extended;
FIG. 6 is a bottom plan view;
FIG. 7 is another right side elevational view, the hinged keyboard shown in the closed position;
FIG. 8 is another left side elevational view, the hinged keyboard shown in the closed position; and,
FIG. 9 is a top, front and right side perspective view thereof.
Referenced Cited
U.S. Patent Documents
| D255116 | May 27, 1980 | MacDonald et al. |
| D289292 | April 14, 1987 | Ansell et al. |
| D299910 | February 21, 1989 | Doman et al. |
| 4517512 | May 14, 1985 | Petrich et al. |
| 4528504 | July 9, 1985 | Thornton, Jr. et al. |
| 4532423 | July 30, 1985 | Tojo et al. |
| 4616178 | October 7, 1986 | Thornton, Jr. et al. |
| 4669053 | May 26, 1987 | Krenz |
| 4703858 | November 3, 1987 | Ueberreiter et al. |
| 4829241 | May 9, 1989 | Maelzer |
Patent History
Patent number: D308645
Type: Grant
Filed: Feb 26, 1987
Date of Patent: Jun 19, 1990
Assignee: John Fluke Mfg. Co., Inc. (Everett, WA)
Inventors: Cheryl A. Hughes (Seattle, WA), Edmond C. Eng (Lynnwood, WA)
Primary Examiner: Bruce W. Dunkins
Assistant Examiner: Antoine D. Davis
Attorneys: Mikio Ishimaru, Stephen A. Becker
Application Number: 7/19,603
Type: Grant
Filed: Feb 26, 1987
Date of Patent: Jun 19, 1990
Assignee: John Fluke Mfg. Co., Inc. (Everett, WA)
Inventors: Cheryl A. Hughes (Seattle, WA), Edmond C. Eng (Lynnwood, WA)
Primary Examiner: Bruce W. Dunkins
Assistant Examiner: Antoine D. Davis
Attorneys: Mikio Ishimaru, Stephen A. Becker
Application Number: 7/19,603
Classifications
Current U.S. Class:
Electrical Property (D10/75);
D14/100;
D14/106