Abstract: A printed circuit is provided with a synthetic resin capping layer that exhibits a continuous variation of mechanical properties in a direction at right angles to its surface. The printed circuit can be in a mobile telephone or other portable device, and the capping layer of the printed circuit can optionally constitute the housing of the device.

Abstract: Line driver for a LIN-bus. The line driver has a current source output transistor (T1) for pulling down the LIN-bus wire (LB) to ground (GND). The LIN-bus wire (LB) is connected to a positive supply voltage (VBAT) through a pull-up resistor (R1). The output transistor (T1) provides a ramp shaped output current under control of a ramp generator (RG). The ramp shaped output current in combination with the pull-up resistor (R1) asserts a ramp shaped output voltage on the LIN-bus wire (LB). According to the LIN-bus specifications the resistance of the pull-up resistor may vary between 500 Ohm and 1 kOhm. When the resistance is 1 kOhm, the output voltage is clamped to signal ground (GND) and a delay occurs between the edge in the data signal (TXD) and the corresponding rising ramp in the output voltage.

Abstract: A synchronous dc—dc converter converts an input dc voltage to an output dc voltage. A control FET (6) and a sync FET (8) are connected in series between input dc voltage terminals (2,4). An alternating control signal input from a control circuit (18) controls the control and sync FETs (6,8) to be switched on alternately. At least one driver (30, 32) is provided to drive the FETs (6,8). In response to a change in the alternating control signal of a predetermined polarity, the driver (32) switches off the sync FET (8), and then the driver (30) waits for the trigger signal before switching on the control FET (6).

Abstract: The invention relates to an electronic filter circuit comprising a controllable transconductance circuit wherein a feedback loop is added to a substantially linear transconductance amplifier G, between two electronic leads having an input portion before the feedback loop and an output portion thereafter.

Abstract: In a data processing arrangement that includes multiple processing circuits, a group of storage elements provides temporary storage of data intended for the processing circuits. An element selection circuit enables a single storage element to be selected from a plurality of storage elements in order to supply the content of the selected storage element to an input of a processing circuit. A group selection circuit enables a group of storage elements to be selected from a plurality of separate groups of storage elements in order to supply the contents of all the storage elements forming part of the selected group to an input of another processing circuit. Such an arrangement affords a flexible and efficient use of all the storage elements. As a result, a comparatively small number of storage elements are necessary, which leads to cost reduction. The relevant arrangement may be employed in, for example, a digital signal processor capable of (finite impulse response) FIR filtering.

Abstract: Compact trench-gate semiconductor devices, for example a cellular power MOSFET with sub-micron pitch (Yc), are manufactured with self-aligned techniques that use sidewall spacers (52) in different ways. Thereby, the source region (13) and a contact window (18a) for a source electrode (33) can be self-aligned to a narrow trench (20) containing the trench-gate (11). Thereby, the channel-accommodating region (15) can also be provided after forming the trench-gate (11), and with very good control of its doping concentration (Na; p) adjacent to the trench (20). To achieve this control, its dopant is provided after removing the spacers (52) from the mask (51) so as to form a doping window (51b), which may also be used for the source dopant, adjacent to the trench-gate (11). A high energy dopant implant (61) or other doping process provides this channel dopant adjacent to the trench (20) and extending laterally below the mask (51,51n).

Abstract: The present invention relates a frequency synthesizer comprising in a phase-locked loop: a phase-frequency comparator (16) connected to a reference frequency source (20), at least a voltage-controlled oscillator (12) and a fractional frequency divider (14) suitable for producing a mean dividing ratio having an integral component and a fractional component. According to the invention, the oscillator comprises a plurality of oscillator stages which have different center frequencies, and the synthesizer further includes means for selecting an oscillator stage as a function of the integral component of the mean dividing ratio. Application to portable telephones.

Abstract: A receiver for radio or television signals provided with a high-frequency circuit having a discrete semiconductor component which includes a planar variable capacitance diode and an integrated series resistor formed on a common semiconductor or substrate. The receiver has lower parasitic capacitance and improved data reception, resulting in an increase of the Q factor of the variable capacitance diode and an increase in the circuit performance. The overall circuit loss is also reduced.

Abstract: A lateral insulated gate bipolar PMOS device includes a semiconductor substrate, a buried insulating layer and a lateral PMOS transistor device in an SOI layer on the buried insulating layer having a source region of p-type conductivity. A lateral drift region of n-type conductivity is provided adjacent the body region, and a drain region of the p-type conductivity is provided laterally spaced from the body region by the drift region. An n-type conductivity drain region is formed of a shallow n-type contact surface region inserted into a p-inversion buffer. A gate electrode is provided over a part of the body region in which a channel region is formed during operation and extending over a part of the lateral drift region adjacent the body region, with the gate electrode being insulated from the body region and drift region by an insulation region.

Abstract: The object of the invention is the shielding of a magnetic memory against high external magnetic fields. The magnetic memory (1) comprises an array of magnetic memory elements (2), each memory element (3) including at least one layer of magnetic material (4). The operation of the magnetic memory elements (3) is based on a magnetoresistance effect. The memory (1) is protected against high external magnetic fields by a shielding layer (14), which has been split into regions (5) covering the memory elements (3). The magnetic memory (1) is not erased by high external magnetic fields because of a strong attenuation of the external magnetic field by the regions (5) of the shielding layer (14).

Abstract: A shorting element, preferably a resonant inductor-capacitor circuit, is inserted in parallel with a sense transistor, which itself is in parallel with a power transistor. The use of the shorting element in combination with the sense transistor, provides a technique to have a monotonic power detection. The shorting element eliminates extraneous currents caused by inherent collector-base and collector-substrate diodes of sense transistor, and also eliminates the extraneous collector voltage swing of the sense transistor caused by mutual coupling between inductors connected to the power and sense transistors.

Abstract: A data carrier (4) for the contactless communication of communication information (KD) with a transmitting/receiving station (1) includes receiving circuit (7) for receiving an HF signal (HF) containing the communication information (KD) from the transmitting/receiving station (1), and processing circuit (10) for processing the received communication information (KD), and supply voltage generating circuit (13) for rectifying the received HF signal (HF) and for energizing the processing circuit (10) with a supply voltage (UV), and reset circuit (14) for resetting, when the supply voltage (UV) decreases below a reset voltage value (UR), the processing performed by the processing circuit (10), the reset circuit (14) now being adapted to interrupt the processing of the communication information (KD) by the processing circuit (10) at least partially when the supply voltage (UV) decreases below an interruption voltage value (UU), the interruption voltage value (UU) being greater than the reset voltage value (UR).

Abstract: A detector and a camera system for electromagnetic radiation being integrated in a solid state substrate are disclosed. Said substrate comprises a first region of a first conductivity and a second region of a second conductivity, said first region being adjacent to said second region, and said first and second region forming a detection junction, at least part of said junction being substantially orthogonal with respect to the plane of the surface of the substrate above said detection junction. The camera system comprises a configuration of pixels in an imaging sensor being integrated in a solid state substrate, essentially each of the pixels comprising a region of a first conductivity type being at least partly surrounded by a region of a second conductivity type, thereby forming a junction region, and wherein the region of the first conductivity type includes at least one contact area.

Abstract: An integrated circuit (100) comprising an analogue circuit (30) and optionally a digital circuit (50) couples substrate noise present on the integrated circuit ground rail (114) onto a supply rail (116) of the analogue circuit. The voltage difference between the supply rail and ground is therefore substantially independent of the noise, thereby reducing or eliminating the impact of the noise on signals in the analogue circuit.

Abstract: In a method of compensating an image signal (10) having a field frequency of substantially N times a mains frequency, in which N≧2, for AC light source induced fluctuations, the image signal (10) and an average signal representing an average image signal content over a given time period are arithmetically processed (14,16-20,8) to obtain a corrected signal (9), in which at least N−1 differences between at least N−1 respective phases of the corrected signal (9) on the one hand, and a selected phase (ph2) other than the N−1 phases of the corrected signal (9), or an average over N fields of the image signal (10), on the other hand, are integrated (14,16), and in which at least N−1 integrated differences are processed (20) to obtain a correction factor for the image signal (10).

Abstract: A data carrier (1) includes an IC module (3), having a substrate (4), and a conductor configuration (5) connected to the substrate (4), and an IC (2) connected to the substrate (4), and connecting leads (10, 11) between the conductor configuration (5) and the IC (2), and a cover (12) of an electrically insulating material, which cover (12) shrouds the IC (2) and the connecting leads (10, 11) and the portions (13, 14, 15) of the conductor configuration (5) The data carrier (1) is equipped with a protection mechanism (20) that provides protection against damage to at least a part of the IC module (3) when the IC module (3) is bent or twisted, which protection mechanism (20) forms a part of the IC module (3), consists of a ductile material, and is formed by a layer-shaped, preferably net-like, cap which is encased in the cover (12) up to the substrate means (4).

Abstract: The invention describes a tunable filter arrangement with at least two resonators which are coupled to one another and of which at least one is connected to a capacitor with tunable capacitance. The electrical properties of the resonator, and thus the overall filter characteristic, can be changed through a change in the capacitance of the capacitor. Furthermore, a transmitter, a receiver, a mobile telephone device, and a wireless data transmission system comprising such a filter arrangement are disclosed, as is a tunable bulk acoustic wave resonator.

Abstract: A modular optimizer, for use in determining a configuration of a production line with one or more component placement machines, is configured to handle precedence constraints. The precedence constraints may be of the form A B MT, which specifies that part A must be placed on a designated assembly board before part B if either part is to be placed by a machine type MT. A given set of precedence constraints includes at least a first class of constraints that apply to only one component placement machine type and a second class of constraints that apply to more than one component placement machine type. Assignment of constraints to the different classes is based on decisions of a part splitter module of the modular optimizer regarding which parts are assigned to which machine types. Each of the constraints in the first class of constraints associated with a given machine type are handled in a corresponding machine module of the modular optimizer.

Abstract: A novel gate driver apparatus in which an energy recovery circuitry is incorporated in a square-wave gate driver. The energy recovery circuitry has a first loop circuit for discharging the energy from the gate capacitor to an inductor when the gate driver is turned off, and a second loop circuit for discharging the energy from the inductor to the power supply. Thus, the energy of the gate capacitor is transferred to the power source when the gate driver is turned off, and the gate driver apparatus still maintains its operating flexibility as the square-wave driver and is independent of switching frequency.

Abstract: A line driver for driving a two-wire communication bus (8, 9) consisting of a chain of inverters (I1, . . . , I6). Each inverter may consist of a series arrangement of a PMOS (M1) and an NMOS (M2) transistor. The output terminals (1b, 3b, 5b) of the odd-numbered inverters (I1, I3, I5) are connected to the first wire (8) of the bus through respective first resistors (R1, R3, R5) and the output terminals (2b, 4b, 6b) of the even-numbered inverters (I2, I4, I6) are connected to the second wire (9) of the bus through respective second resistors (R2, R4, R6). Owing to the propagation delay of the inverters and the additive effect of the resistors the voltages on the bus wires change only in successive small steps. This results in a small common mode voltage on the bus wires and, consequently, a low electromagnetic emission.