Abstract: Multi-phase clocks are used to encode and decode signals that are phase-modulated. The input signal is phase-compared with a feedback clock. Phase differences increment or decrement an up/down counter. The count value from the up/down counter is applied to a phase rotator, which selects one clock phase from a bank of multi-phase clocks. The multi-phase clocks have the same frequency, but are offset in phase from each other. An output divider divides the selected multi-phase clock to generate a phase-modulated output. A feedback divider divides a fixed-phase clock from the multi-phase clocks to generate the feedback clock. An analog or a digital front-end may be used to convert analog inputs to digital signals to increment or decrement the counter, or to encode multiple digital bits as phase assignments. For a de-modulator, a digital-to-analog converter (DAC) or a digital decoder produces the final output from the count of the up/down counter.

Abstract: Phase-change memory (PCM) cells store data using alloy resistors in high-resistance amorphous and low-resistance crystalline states. The time of the memory cell's set-current pulse can be 100 ns, much longer than read or reset times. The write time thus depends on the write data. The very long write-1 time may require wait states. To eliminate wait states for sequential accesses, the PCM cells are divided into 16 banks. Each bank has its own bank write latch that stores data locally at the bank while the bank is being written. Data lines to the banks are freed up to transfer data to other banks once the data is written into the local bank write latch, allowing the long set-current pulse to be applied locally to slowly grow crystals in the alloy resistors. External host data are buffered and applied to the data lines by an array data mux.

Abstract: An object in a video sequence is tracked by object masks generated for frames in the sequence. Macroblocks are motion compensated to predict the new object mask. Large differences between the next frame and the current frame detect suspect regions that may be obscured in the next frame. The motion vectors in the object are clustered using a K-means algorithm. The cluster centroid motion vectors are compared to an average motion vector of each suspect region. When the motion differences are small, the suspect region is considered part of the object and removed from the object mask as an occlusion. Large differences between the prior frame and the current frame detect suspected newly-uncovered regions. The average motion vector of each suspect region is compared to cluster centroid motion vectors. When the motion differences are small, the suspect region is added to the object mask as a disocclusion.

Abstract: An extender card is plugged into a memory module socket on a personal computer (PC) motherboard. The extender card has a test socket that receives a memory module under test. The extender card has an intercepting EEPROM chip that receives device-select lines from the motherboard. One of the device-select lines from the motherboard to a module EEPROM chip on the memory module is blocked by the extender card and altered so that the intercepting EEPROM chip is read by the motherboard rather than the module EEPROM chip. A memory configuration is read from the intercepting EEPROM chip. The memory module is tested by the motherboard using the configuration from the intercepting EEPROM chip on the extender card. The module EEPROM chip is then programmed with the configuration by altering the intercepted device-select address to select the module EEPROM chip and not the intercepting EEPROM chip.

Abstract: Two heat chambers are placed side-by-side. Heated air is blown upward through a first chamber and downward through a second heat chamber. An upper heating unit has a blower and heater that heat air exiting the first chamber and blows the heated air into the top of the second chamber. A lower heating unit has a blower and heater that heat air exiting the second chamber and blows the heated air into the top of the first chamber. Air is circulated in a loop through the two heat chambers by the two heating units. Inefficiencies from return pipes are eliminated by using the second chamber. The heated air is blown past memory modules under test in a heat chamber that has an insulated backplane. Pattern-generator cards outside the heat chamber exercise the memory modules and are cooled while memory modules in the heat chamber are heated.

Abstract: A Peripheral Component Interconnect (PCI) bridge between two buses prefetches read data into a cache. The number of cache lines to prefetch is predicted by a prefetch counter. One prefetch counter is kept for each type of memory-read command: basic memory-read (MR), memory-read-line (MRL) that reads a cache line, and memory-read-multiple (MRM) that reads multiple cache lines. For each type of read command, counters are kept of the number of completed commands, bus-disconnects (indicating under-fetch), and master-discard of data (indicating over-fetch). After a predetermined number of execution of each type of command, the command's prefetch counter is incremented if under-fetching occurred, or decremented if over-fetching occurred, as indicated by the disconnect and discard counters for that type of read command. The command's other counters are reset. Prefetching is optimized for each type of read command. MRM can prefetch more data than MRL or MR.

Abstract: A feature phone has two processors that share a key pad for user input. The key pad is attached to a base-band processor and sends an interrupt to a user-hardware-interrupt UHI driver running on the base-band processor when the user presses a key. When a hot switch indicates that the local base-band processor has the focus, a key-press event is sent to the local kernel to be sent to programs on the base-band processor. When the hot switch indicates that a remote applications processor has the focus, a message for the event is written through a shared-memory interface to a shared memory on the applications processor. A shared mailbox is written with the message length, triggering a mailbox-interrupt to the applications processor. A virtual UHI driver running on the applications processor reads the event message from the shared memory and passes key-press information to programs on the applications processor.

Abstract: A Universal-Serial-Bus (USB) single-chip flash device contains a USB flash microcontroller and flash mass storage blocks containing flash memory arrays that are block-addressable rather than randomly-addressable. USB packets from a host USB bus are read by a serial engine on the USB flash microcontroller. Various routines that execute on a CPU in the USB flash microcontroller are activated in response to commands in the USB packets. A flash-memory controller in the USB flash microcontroller transfers data from the serial engine to the flash mass storage blocks for storage. Rather than boot from an internal ROM coupled to the CPU, a boot loader is transferred by DMA from the first page of the flash mass storage block to an internal RAM. The flash memory is automatically read from the first page at power-on. The CPU then executes the boot loader from the internal RAM to load the control program.

Abstract: An object in a video sequence of frames is tracked by object masks generated for frames in the sequence. Macroblocks are motion compensated. Blocks matching entirely within a prior-frame object mask are used to generate an average object motion. When the average motion is below a motion threshold, frames are skipped at larger intervals, but more frequent frames are processed when high motion occurs. When the macroblock best matches a prior-frame block that has the object's boundary passing through the block, the macroblock is uncertain and is sub-divided into smaller sub-blocks that are again motion compensated. Sub-blocks matching blocks within the object mask in the base frame are added to the new object mask for the current frame while sub-blocks matching a block containing the object boundary are uncertain and can again be sub-divided to further refine the object boundary. Frame skipping and adaptive-size blocks on the object boundary reduce computational load.

Abstract: A surface-mount package for an oscillator crystal blank is made from a metal sheet substrate. Half-etched cavities are formed on one side of the sheet. The half-etched cavities are filled in with an insulator. The center of the insulator is drilled until metal is reached, leaving insulator on the sidewalls of the resulting drilled via. The bottom of the drilled via is plated with a contact metal such as nickel-gold, and then the entire drilled via is filled in with metal such as copper to form via-metal. An external metal surface-mount pad is formed on the surface of each via-metal. The metal sheet is flipped over, and a larger inner cavity etched through until the contact metal over the via-metal is reached. Conductive epoxy is placed on the contact metal, and electrodes on the crystal blank are attached to conductive epoxy.

Abstract: A dual-mode Universal-Serial-Bus (USB) switch can operate in a normal hub mode to buffer transactions from a host to multiple USB flash storage blocks that are USB endpoints. When operating in a single-endpoint mode, the dual-mode USB switch intercepts packets from the host and responds to the host as a single USB endpoint. The USB switch aggregates all downstream USB flash storage blocks and reports a single pool of memory to the host as a single virtual USB memory. Adjacent transactions can be overlapped by packet re-ordering. A token packet that starts a following transaction is re-ordered to be sent to the USB flash storage blocks before the data and handshake packets that end a first transaction, allowing the second transaction to begin accessing the flash memory earlier. Data can be mirrored or striped across several USB flash storage blocks and parity can be added for error recovery.

Abstract: A low-power memory module has an active termination circuit at each end of critical signal traces. The dynamic termination circuit has a low-value resistor that is connected to a termination voltage by a transmission gate that is turned on by a switch signal. The switch signal is activated when the memory module is selected by a chip-select signal, and when a time window is open. The time window is generated from the clock to synchronous DRAMs on the memory module. The time window can be one-quarter of the clock period by ANDing the clock and a delayed clock that is delayed by one-quarter of a cycle. A static terminating resistor in parallel with the low-value resistor provides a much smaller terminating current that is not switched on and off. Traces can be impedance-matched at junctions to branches that each has a dynamic termination circuit at the far end.

Abstract: An extended Secure-Digital (SD) card has a second interface that uses some of the SD-interface lines. The SD card's mechanical and electrical card-interface is used, but 2 or 4 signals in the SD interface are multiplexed for use by the second interface. The second interface can have a single differential pair of serial-data lines to perform Universal-Serial-Bus (USB) transfers, or two pairs of differential data lines for Serial-Advanced-Technology-Attachment (SATA), Peripheral Component Interconnect Express (PCIE), or IEEE 1394 transfers. A card-detection routine on a host can initially use the SD interface to detect extended capabilities and command the card to switch to using the second interface. The extended SD card can communicate with legacy SD hosts using just the SD interface, and extended SD hosts can read legacy SD cards using just the SD interface, or extended SD cards using the second interface. MultiMediaCard and Memory Stick are alternatives.

Abstract: A die with embedded memory is packaged together in a same dual-chip package with an EEPROM die. Defects in the embedded memory can be repaired using redundant rows or columns. A built-in self-test (BIST) controller locates defects and a repair image is generated. The repair image is stored in non-volatile memory in the EEPROM die. At power-up, the repair image is copied from the EEPROM die to a volatile repair RAM in the embedded memory die. The redundant rows or columns are mapped to replace defective rows/columns using the repair image in the volatile repair RAM. Although the embedded-memory die has only volatile memory and no fuses, its embedded memory can be repaired using the repair map from the non-volatile EEPROM die. Since the EEPROM die is in the same dual-chip package as the embedded memory die, the repair map is always available.

Abstract: A frequency-multiplying circuit generates a multiple of the fundamental frequency of a crystal that oscillates. A first differential multiplier is coupled to the crystal nodes and generates a frequency-doubled output. The frequency-doubled output is applied to an op amp that buffers the output and compares it to a reference to generate a pair of differential buffered signals. The differential buffered signals are applied to a second differential multiplier that generates a final quadrupled-frequency output. The differential multipliers can each have a pair of differential transistors that receive signals that oscillate out-of-phase to each other by 180 degrees. The drains of the differential transistors connect together at a summing node to sum the transistor currents, producing the frequency-doubled output. A crystal driver circuit using cross-coupled and direct-coupled transistors may also be attached to the crystal nodes.

Abstract: A flash-memory-drive card has a Universal-Serial-Bus (USB) connector. The card has a printed-circuit board (PCB) that fits into a perimeter frame that surrounds the edges of the PCB. Metal or plastic upper and lower covers are snapped onto the frame to encapsulate the PCB. The USB connector can be a Full USB connector plug that extends from the perimeter frame and has a centerline approximately matching the PCB centerline for a balanced design, or can be a slim or reduced-height USB connector plug that has a frame closure bar that fits inside closure fittings on the perimeter frame. The USB connector can also be made from a frame extension that has four frame slots through the frame. The PCB has four PCB fingers that are inserted through the frame slots during assembly so that the PCB fingers fit within depressions in the frame extension to form the USB connector plug.

Abstract: A charge pump for a phase-locked loop (PLL) has accurate matching of charge and discharge currents applied to the PLL's loop filter. A variable current-sink transistor has its gate-to-source voltage adjusted to match a source current from a fixed current source. An intermediate node in-between series transistors between the current source and sink is sampled by a sampling transistor that connects the intermediate node to a sampling capacitor. The sampling capacitor's voltage is the gate-to-source voltage of the variable current-sink transistor. The variable current-sink transistor has its gate and drain coupled together through the sampling transistor during calibration periods when the charge pump is otherwise idle. When the source current exactly matches the sink current, the gate-to-source voltage stored on the sampling capacitor reaches steady state. Up and down currents are balanced in driver transistors that match the series transistors.

Abstract: A memory module socket requires a reduced insertion force because a notch engager on a levered handle engages a notch on the memory module and applies downward pressure. The notch engager is forced downward as the levered handle pivots about an axis, causing the downward force to be applied to the notch on a memory module, forcing the memory module into a memory module socket on an extender card that plugs into a memory module socket on a personal computer motherboard. An ejector arm is pushed downward by the levered handle during removal. An ejector foot inside the memory module socket is pivoted upward around an ejector pivot when the ejector arm is pushed downward. The upward pivoting ejector foot pushes upward on the inserted edge of the memory module, forcing the memory module out of the memory module socket. Both ejection and insertion forces can be reduced.

Abstract: An MPEG decoder verifies a previous video packet by calculating the sum-of-the-absolute differences (SAD) for macroblock boundaries. When a macroblock counter goes off count, the macroblocks can be placed in the wrong relative locations in a frame. Image shapes are sliced when macroblock misplacement occurs, creating many new bisecting edges along macroblock boundaries. These image discontinuities along macroblock boundaries have a large SAD for pixels on either side of the macroblock boundary. The SAD is generated along the left and upper edges of a current macroblock, and a maximum SAD of all macroblocks in the previous video packet is generated. When the maximum SAD is above a threshold, the macroblock counter is likely to be in error, and the macroblock counter is reloaded with the header macroblock number from the next packet header. When the SAD is below threshold, a mis-matching header macroblock number is ignored.

Abstract: A memory module has a two-plate heat sink attached by rivets. A front plate contacts the flat surfaces of memory chips on a front surface of the module printed-circuit board (PCB) substrate, while another back plate contacts chips on the back surface of the substrate. The plates contact the substrate along the top edge opposite the connector edge, and along the upper half of the substrate's side edges. Holes in the substrate allow for rivets or other fasteners to pass through to firmly attach the plates to the substrate, prevent wobble. Four top-edge slots are cut in the plates near the top edge, between the rivets along the top edge. The top-edge slots allow air to flow underneath the plates, in small gaps between memory chips, and between the plate and the substrate. The added air flow underneath the plates helps cool the heat-sink plates, reduce hot spots and failures.