Abstract: An apparatus and method for determining whether to perform a full band scan by using motion sensor data comprising determining if a user equipment has been stationary since the full band scan was last performed; determining if the user equipment has skipped full band scans more times than a skipped threshold; and if the user equipment has skipped full band scans more times than the skipped threshold, performing a full band scan, or if the user equipment has not skipped full band scans more times than the skipped threshold, performing a partial band scan or performing no scan.

Abstract: A semiconductor device includes: a first reference voltage generator for generating a first reference voltage; a first band gap circuit for dividing a voltage at a second reference voltage output node to produce a first and a second band gap voltages having a property relative to temperature variations; a first comparator for receiving the first reference voltage as a bias input and comparing the first band gap voltage with the second band gap voltage; and a first driver for pull-up driving the second reference voltage output node in response to an output signal of the first comparator.

Abstract: Provided are a semiconductor surface protecting method and surface protecting sheet employing a material having adequate conformability for irregularities on semiconductor wafer circuit sides and sufficient rigidity as a support during grinding, and which does not become fluid with repeated temperature increases. Also provided is a surface protecting sheet for protection of the circuit side in the step of back side grinding of a semiconductor wafer, the surface protecting sheet having a polymeric film material with a surface protecting layer thereon that may become fluid upon heating and which hardens upon exposure to radiation or upon heating.

Abstract: A multi-chip package according to an aspect of this disclosure includes a plurality of multi-chips. Each of the multi-chips includes a lead configured to receive an external power supply voltage, and a pad circuit configured to reset an internal node to the level of a ground voltage and to generate chip address information by controlling the potential of the internal node based on the state of a connection between the pad circuit and the lead.

Abstract: Targeted application of anti-fouling mechanisms in a heat exchange system produces higher rates of energy recovery. The anti-fouling mechanisms with high mitigation rates can be deployed at only the hottest portions of a pre-heat train that experience the highest rates of fouling and heat loss. In application, bundles of corrosion resistant smoothed tubes are deployed in the late pre-heat train to significantly reduce the formation of harder deposits. Vibration can be used as an adjunct approach in conjunction with the corrosion resistant, smooth tubes, or deployed alone on existing bundles. The use of high performing, more durable exchangers in select locations justifies the increased cost of these components.

Abstract: A signal delay circuit including a clock transfer control circuit configured to transmit or block a clock signal, and a pulse signal generation circuit configured to delay a first pulse signal in response to the transmitted clock signal to generate a second pulse signal which has a longer active period than the first pulse signal.

Abstract: A WCDMA enabled user equipment device configured to have functions collectively or selectively idle to conserve power. A discontinuous receiver is used to detect and read network messages and report the messages to the computer within the WCDMA enabled user equipment device. The computer then activates functions previously powered down to receive incoming messages for the user of the device. The discontinuous receiver is also used when the device is active to read network messages, freeing a modem of the device to operate on user messaging; and therefore, enhancing user related performance.

Abstract: A semiconductor device and a method for fabricating the same. A plurality of gate patterns are formed over a first-conductivity type silicon layer of a silicon-on-insulator semiconductor substrate including a buried insulation layer, so as to be separated from each other. A plurality of silicon bodies are formed under the gate patterns, by removing a portion of the first-conductivity type silicon layer exposed between the gate patterns. A plurality of polysilicon spacers are formed over a sidewall of the silicon bodies, and each contains a second-conductivity type dopant. A contact plug is electrically connected to at least one of the polysilicon spacers.

Abstract: A delay locked loop includes a closed loop circuit configured to generate preliminary delay information, a control unit configured to update the preliminary delay information into delay information in response to a control signal, and a first delay unit configured to delay an input clock signal by a first delay value determined by the delay information and generate an output clock signal.

Abstract: A non-volatile memory device includes a pair of columnar cell channels vertically extending from a substrate, a doped pipe channel arranged to couple lower ends of the pair of columnar cell channels, insulation layers over the substrate in which the doped pipe channel is buried, memory layers arranged to surround side surfaces of the columnar cell channels, and control gate electrodes arranged to surround the memory layers.

Abstract: A semiconductor memory device includes a memory string coupled between a common source line and a bit line, a page buffer configured to supply a first precharge voltage to the bit line and to latch data corresponding to a threshold voltage level of a memory cell of the memory string, wherein the data is detected according to a shift in a voltage of the bit line, in a precharge operation, a precharge circuit configured to supply a second precharge voltage to the common source line in the precharge operation, and a voltage supply circuit configured to generate operating voltages for turning on the memory string in the precharge operation. While the first precharge voltage is supplied from the page buffer to the bit line, the second precharge voltage is supplied to the bit line through the memory string.

Abstract: A computer-implemented method of creating a simulation engine for simulating a circuit design can include receiving a source code contribution from a high level modeling system and receiving a simulation model specified in an interpretive language that specifies the circuit design. The source code contribution can be compiled together with the simulation model using a Just-In-Time compiler. A simulation engine, specified in native machine code, can be output as a single, integrated software component formed from the source code contribution and the simulation model.

Abstract: A cobalt-nickel alloy composition is described, containing about 20% to about 28% cobalt; about 37% to about 46% nickel; at least about 6% chromium; aluminum; and at least one refractory metal. The total weight of cobalt, aluminum, and refractory metal in the composition is less than about 50% of the total weight of the composition. Moreover, the alloy composition comprises both a (Co, Ni)-gamma phase and an L12-structured (gamma prime) phase. Various components made from the cobalt-nickel alloy composition are also described. Examples include high-temperature machinery and devices, e.g., components of gas turbine engines.

Abstract: A semiconductor integrated circuit includes: a semiconductor chip; a through-chip via passing through a conductive pattern disposed in the semiconductor chip and cutting the conductive pattern; and an insulation pattern disposed on an outer circumference surface of the through-chip via to insulate the conductive pattern from the through-chip via.

Abstract: A nonvolatile memory device and a method of programming the device includes storing first data in first main and sub-registers and storing second data in second main and sub-registers, performing first program and verification operations on first memory cells based on the first data stored in the first main register, storing a result of the first verification operation in the first main register, performing a second program operation on second memory cells based on the second data stored in the second main register, changing the result of the first verification operation, stored in the first main register, into the first data stored in the first sub-register, performing an additional verification operation on the first memory cells on which the first verification operation has been completed, storing a result of the additional verification operation in the first main register, and performing a second verification operation on the second memory cells.

Abstract: A nonvolatile memory device comprises a memory cell array including a number of bit lines commonly coupled to a source line and each coupled to a number of memory cells, a delay unit configured to delay a sense signal in response to a voltage level of the source line and to output a delayed sense signal, and a page buffer unit configured to sense voltage levels of the bit lines in response to the delayed sense signal.

Abstract: A computer-implemented method for scan sharing across multiple cores in a business intelligence (BI) query. The method includes receiving a plurality of BI queries, storing a block of data in a first cache, scanning the block of data in the first cache against a first batch of queries on a first processor core, and scanning the block of data against a second batch of queries on a second processor core. The first cache is associated with a first processor core. The block of data includes a subset of data stored in an in-memory database (IMDB). The first batch of queries includes two or more of the BI queries. The second batch of queries includes one or more of the BI queries that are not included in the first batch of queries.

Abstract: In a communication system providing broadcast services in which files for broadcast are accessible by the users. Contents of the broadcast files and the file attributes required to process the broadcast files are separately sent. As arranged, receiving the file attributes ahead of the content files allow more efficient download and processing of the broadcast files.