Abstract: A semiconductor memory device comprises planes each configured to comprise flag cells storing data about program methods of memory cells of the plane, page buffer units configured to sense the data of the flag cells, a flag cell data detection circuit configured to make a determination of program methods of the planes on the basis of a result, obtained by comparing the sensed data of the flag cells of the planes, and the sensed data of the flag cells, and a microcontroller configured to control the page buffer units, wherein the page buffer units read least significant bit (LSB) data of the planes or both the least significant bit (LSB) data and most significant bit (MSB) data on the basis of the determination of the flag cell data detection circuit.

Abstract: A non-volatile memory device includes a pair of columnar cell channels vertically extending from a substrate, a doped pipe channel arranged to couple lower ends of the pair of columnar cell channels, insulation layers over the substrate in which the doped pipe channel is buried, memory layers arranged to surround side surfaces of the columnar cell channels, and control gate electrodes arranged to surround the memory layers.

Abstract: A connection system for connecting external devices to specified locations on a marine seismic streamer. Inner collars having raised bosses are clamped to the cable at specified locations along its length. Each inner collar forms a circular race encircling the cable. An external device is attached to a pair of cuffs in the form of C-shaped cylindrical rings each with a circular inner surface. A gap in the ring interrupts the inner surface. The width of the gap is greater than the diameter of the bosses so that the cuffs may be slid onto the collars when the gaps are aligned with the bosses. The bosses are circumferentially offset when the cable is in its normal operating state to lock the cuff and the external device to the collars. The cuffs and the external device can be installed on or removed from the cable by twisting the cable to align the bosses and sliding the cuffs onto or off of the collars. When installed, the cuffs ride on the races to allow the cable to rotate inside the cuffs.

Abstract: A semiconductor device and a method for fabricating the same. A plurality of gate patterns are formed over a first-conductivity type silicon layer of a silicon-on-insulator semiconductor substrate including a buried insulation layer, so as to be separated from each other. A plurality of silicon bodies are formed under the gate patterns, by removing a portion of the first-conductivity type silicon layer exposed between the gate patterns. A plurality of polysilicon spacers are formed over a sidewall of the silicon bodies, and each contains a second-conductivity type dopant. A contact plug is electrically connected to at least one of the polysilicon spacers.

Abstract: A magneto-resistance element is provided. The magneto-resistance element includes an underlying layer including a main metal selected from electrically conductive metals and an auxiliary metal selected from transition metals, a first magnetic layer stacked on the underlying layer, an insulation layer stacked on the first magnetic layer, and a second magnetic layer stacked on the insulation layer.

Abstract: An alkaline liquid hand dish washing detergent composition to provide superior stain removal and superior stability during storage and use.

Abstract: In a semiconductor memory device which performs a repair method of replacing a repair target word line and one adjacent word line at the same time by a repair operation through an efficient decoding operation for selecting a repair target address, a test operation of enabling only a word line corresponding to a cell coupled to a bit line or a bit line bar is stably performed.

Abstract: Saline waters are made suitable for use in large quantities in petroleum refining operations by evaporative desalination of a water source having a dissolved salt content of at least 30,000 ppmw with the heat liberated during the steam condensation used as low quality heat for petroleum refining operations. Sea water is most suitable for evaporative purification processes.

Abstract: A resistive memory device includes: a bottom electrode formed over a substrate; and an insulation layer having a hole structure formed over the substrate structure. Herein, the hole structure exposes the bottom electrode, has sidewalls of positive slope, and has a bottom width equal to or smaller than a width of the bottom electrode; a resistive layer formed over the hole structure; and an upper electrode formed over the resistive layer.

Abstract: Provided herein are novel sirtuin-modulating compounds of Structural Formula (Ia) and methods of use thereof. The sirtuin-modulating compounds may be used for increasing the lifespan of a cell, and treating and/or preventing a wide variety of diseases and disorders including, for example, diseases or disorders related to aging or stress, diabetes, obesity, neurodegenerative diseases, cardiovascular disease, blood clotting disorders, inflammation, cancer, and/or flushing as well as diseases or disorders that would benefit from increased mitochondrial activity. Also provided are compositions comprising a sirtuin-modulating compound in combination with another therapeutic agent.

Abstract: A semiconductor memory device includes a plurality of memory cell mats each comprising a plurality of normal memory cell arrays; and a redundancy memory cell array configured to replace a defective memory cell with a plurality of redundancy memory cells corresponding to a redundancy word line when the redundancy word line corresponding to one or more redundancy memory cell arrays is activated in response to an address corresponding to the defective memory cell among the plurality of normal memory cell arrays.

Abstract: A semiconductor memory device includes a plurality of word lines vertically formed on a surface of a semiconductor substrate, where each pair of the plurality of word lines form a set of word lines, a bit line formed parallel to the surface of the semiconductor substrate and disposed in plurality stacked between the word lines of each pair constituting the one set of word lines, and unit memory cells disposed between respective ones of the bit lines and an adjacent one of the pair of word lines of said one of the word line sets.

Abstract: The access terminal is configured to wirelessly send to a data system a request that the data system assign an access terminal identifier (ATI) to the access terminal. The access terminal delays transmission of the request until after a user of the access terminal has employed the access terminal to request a packet data service from the data system. In some instances, the data system is an Evolution, Data Only (EV-DO) system and the access terminal identifier (ATI) is a Unicast Access Terminal Identifier (UATI) generated by the Evolution, Data Only (EV-DO) system.

Abstract: A method for fabricating a semiconductor device includes forming an isolation layer which defines an active region in a substrate, forming recess patterns in the active region and the isolation layer, baking a surface of the recess pattern by conducting an annealing process and forming a gate dielectric layer over a surface of the recess pattern by conducting an oxidation process.

Abstract: A delay locked loop (DLL) of a semiconductor integrated circuit includes a first delay line configured to variably delay a source clock signal and output a locked clock signal, a phase comparator configured to compare the phase of the source clock signal with the phase of a feedback clock signal, a second delay line configured to variably delay the locked clock signal, a first delay controller configured to control the first delay time of the first delay line, a second delay controller configured to control the minimum delay time of the second delay line, and an operation mode controller configured to control the first and second delay controllers in response to an output signal of the phase comparator, and switch operation modes of the first and second delay controllers depending on locking state of the delay lines.

Abstract: An improved system and method for rating subscribers based on wireless subscriber specific credentials. A wireless network operator, or a content/application provider assigns to a subscriber a unique username. For purposes of providing rating or feedback information, the assigned username acts uniquely to identify the subscriber, whose actual identity therefore remains anonymous. The subscriber uses his or her mobile phone to access a mobile telephony network. Evaluators may offer feedback or ratings of the subscriber using the internet.

Abstract: An internal voltage generating circuit includes a divided voltage generator configured to generate a divided voltage by dividing a feedback internal voltage level at a division ratio corresponding to an operation mode control signal, a voltage detector configured to detect a level of the divided voltage based on a reference voltage level, an internal voltage generator configured to receive a supply voltage as power source and generate the internal voltage in response to an output signal of the voltage detector, and an under-driving unit configured to under-drive an internal voltage terminal to a supply voltage in an under-driving operation region that is determined in response to the operation mode control signal.

Abstract: A device or system for operating one or more electrochemical cells, such as a rechargeable fuel cell, is provided. A plurality of subsystems include a humidity level control subsystem, a reagent gas delivery subsystem, and a gas scrubbing subsystem. A method for operating the device or system is also provided.

Abstract: A semiconductor device includes: a semiconductor substrate configured to include a plurality of trenches therein; a plurality of buried bit lines each configured to fill a portion of each trench; a plurality of active pillars each formed in an upper portion of each buried bit line; a plurality of vertical gates each configured to surround each active pillar; and a plurality of word lines configured to couple neighboring vertical gates with each other.

Abstract: A broadband blazed array has a plurality of elements. The elements are arranged side-by-side in a non-parallel spaced apart fashion with center-to-center spacing between adjacent elements being identical along cross-sections of the array that are aligned with the array's endfire directions.