Abstract: An integrated circuit includes an array of memory cells that are selected by rows and read by columns. The columns are first precharged by an internal signal to then read the memory cells. The read is responsive to an edge of a clock signal and the read is of an unknown delay. A multiplexer output provides the internal signal. The multiplexer includes a plurality of inputs electrically connected to delay lines of different delay sizes that receive the edge of the clock signal. A multiplexer control circuit selects a delay line to provide the internal signal as soon as possible after the unknown delay.

Abstract: A method of manufacturing a capacitor includes the steps of depositing a first metal level and etching it to leave in place a region corresponding to a first plate of a capacitor and an area of contact with an upper level; depositing an insulating layer; forming a first opening above the first capacitor plate; depositing a thin insulating layer; forming a second opening above the contact area; depositing a second metal level; removing by physico-chemical etching the second metal layer outside regions where it fills up the openings; and depositing a third metal level and leaving in place portions thereof.

Abstract: A voltage regulator with a current limiter includes a voltage regulating circuit including an amplifier circuit and a feedback circuit. The amplifier circuit includes a ballast or pass resistor and the feedback circuit supplies a first feedback voltage to the amplifier circuit, which is compared to a reference voltage. The voltage regulator further includes a current limiter circuit including a current limiter transistor in series with the ballast transistor and an output of the voltage regulator and a feedback circuit supplying a second feedback voltage to a controller for controlling the current limiter transistor. The controller causes the current limiter transistor to operate between saturation and blocking conditions depending on whether the second feedback voltage, which is representative of the output of the voltage regulator, is above or below a predetermined threshold voltage.

Abstract: A modular power supply system includes DC—DC converters connected n parallel and functioning in a PWM mode. The modular power supply system controls current sharing among the DC—DC converters using a single wire current sharing control bus that drives in parallel the inputs of all the DC—DC converters. The output of each DC—DC converter is applied to a logic OR circuit. Each converter has an identical logic circuit between its output and the single wire current sharing control bus.

Abstract: The fuzzy filtering of a noise signal comprising a plurality of signal samples [s(t,k)] is carried out using as variables the variation of the signal in the considered window and the distance of the samples from a sample to be reconstructed, to distinguish the typical variations of the original signal from those due to the noise and to identify the signal fronts. The method comprises the steps of defining a current signal sample [s(t)] from among the plurality of signal samples, calculating a plurality of difference samples [D(t,k)] as the difference in absolute value between the current signal sample and each signal sample and defining distance values (k) between the current signal sample and each signal sample.

Abstract: A manufacturing process is carried out starting from an SOI type wafer including a top silicon layer and a bottom silicon layer separated from each other by a buried silicon dioxide layer. In the top layer, a LOCOS type sacrificial region is formed and then removed, so as to form a cavity that extends in depth as far as the buried oxide layer. Subsequently, the cavity is filled with epitaxial or polycrystalline silicon, so as to form a power region extending between the top surface and the bottom surface of the wafer; then lateral insulation regions are formed that insulate the power region from the circuitry region.

Abstract: A method for regulating the duty cycle of an input clock signal includes producing a second clock signal using a first adjustable delay circuit for varying the duty cycle. The second clock signal is applied to first and second circuits for respectively increasing and decreasing the duty cycle of the second clock signal. The method further includes monitoring if the first circuitry increases the duty cycle or if the second circuitry reducing the duty cycle saturates first. The duty cycle introduced by the first adjustable delay circuit is modified until saturation of the first and second circuits occur at substantially the same time.

Abstract: A MOS technology power device comprises a semiconductor substrate, a semiconductor layer of a first conductivity type superimposed over the semiconductor substrate, an insulated gate layer covering the semiconductor layer, a plurality of substantially rectilinear elongated openings parallel to each other in the insulated gate layer, a respective plurality of elongated body stripes of a second conductivity type formed in the semiconductor layer under the elongated openings, source regions of the first conductivity type included in the body stripes and a metal layer covering the insulated gate layer and contacting the body stripes and the source regions through the elongated openings.

Abstract: A method for the identification of electronic cards within an investigation zone includes an identification number uniquely assigned to each electronic card. The method reconstructs the identification numbers according to a tree-like iterative algorithm. The algorithm includes the steps of sending an interrogation message intended for certain electronic cards present, and steps for sending a response message by the electronic cards. The response message includes a variable number whose value depends on the identification number of the electronic card. The interpretation of the existence and of the position at which a collision occurs between the bits of the variable numbers received enables the gradual reconstruction, possibly by blocks of bits, of the as yet unidentified bits of an identification number of an electronic card present.

Abstract: The monitoring of multiple supply voltages of an integrated circuit is done using a single external capacitor connected to a pin of the integrated circuit. Part of the multiple supply voltages are externally generated and part are internally generated. The internally generated supply voltages may include different voltages with different signs. A logic signal indicating that all the supply voltages have reached pre-established values before enabling functioning of the integrated circuit is generated after an initial soft start phase of the turn-on process.

Abstract: A memory read amplifier circuit includes at least one memory cell to be read and a bit line connected thereto, a first pre-charge amplifier circuit connected to the bit line. A first cascode circuit is connected between a supply voltage and the memory cell for providing a first current to the memory cell. The memory read amplifier circuit also includes at least one reference memory cell and a reference bit line connected thereto, and a second pre-charge amplifier circuit connected to the reference bit line. A second cascode circuit is connected between the supply voltage and the reference memory cell for providing a second current to the reference memory cell. A differential comparator circuit having a first input is connected to the control terminal of the first cascode circuit for receiving a first voltage based upon the first current, and a second input connected to the control terminal of the second cascode circuit for receiving a second voltage based upon the second current.

Abstract: The invention relates to a driver circuit for P-channel MOS switches including a power transistor having a control terminal and first and second conduction terminals, a controlled current generator connected to the control terminal for turning on the power transistor, a control circuit for controlling the turning on of the current generator, and a protection circuit coupled to the control terminal. The driver circuit may also include a second current generator connected to the control terminal of the power transistor which is in turn driven by the control circuit to control the transistor turn-off. Advantageously, the control circuit may also receive a control signal from the protection circuit at the end of the latter's action.

Abstract: A flame and fume stopping device for a suction duct that removes gaseous mixtures from a room includes a normally-empty inverted siphon in the suction duct. A water tank is connected to the inverted siphon by a gravity discharge pipe, and holds a volume of water sufficient for flooding the inverted siphon. The water tank is at a level higher than the inverted siphon. The gravity discharge pipe includes a solenoid valve for discharging the water into the siphon. A sensor for determining the temperature of the gaseous mixture passing through the suction duct generates an electrical command signal that triggers the opening of the solenoid valve when a certain temperature threshold is exceeded.

Abstract: The memory requirement of MPEG decoders and SQTV/IQTV systems may be reduced by recompressing the MPEG decoded data stream before storing pixels in an external RAM. An efficient compression method for recompressing video picture data based on the tree-search vector quantization (TSVQ) is made more effective by optimizing the way the quantizer is chosen for quantizing the differences among adjacent pel vectors. This method is based on premultiplying a read-only table using quantized complexity measures relative to the centroids of the tree-like scheme used in the TSVQ processing. A plurality of precalculated tables of quantization of the prediction error of a physical parameter of blocks of digital data are produced. For each one of the regions in which a block is divided, the calculated and quantized complexity measure provides an address that selects the most appropriate precalculated table for quantizing the prediction error.

Abstract: A circuit to establish an accurate instantaneous position of a DC motor rotor includes an input terminal to receive a rotor position signal. A first counter circuit counts to a value between two successive rotor position signals at a slow clock rate, and stores this count value in a register. Then a second counter begins counting from zero at a system clock rate, which is faster than the slow clock rate. The first counter circuit and the second counter circuit are evaluated by a comparator, and when the counters equal one another, the instantaneous position signal is generated. Alternately, the second counter can be a down-counter that is initially loaded with the count value, and the instantaneous position signal is generated when the second counter reaches zero.

Abstract: The present invention relates to oscillator circuits for providing periodic signals. The oscillator circuit includes a crystal element having a high Q value and good stability. A high-gain amplifier is used with the crystal element to produce an oscillating signal. The oscillator is further configured to include an input protection circuit for reducing the effects of undesirably high input voltage levels, and a coupling capacitor to reduce leakage between the amplifier and the input protection circuit. A high output signal level is provided to a Schmidtt trigger amplifier through configuring the output to be taken from the input of the high-gain amplifier.

Abstract: A circuit having an anti-interference filter constituted by an inductor in series with one of the supply terminals of the car radio and by a capacitor in parallel with the supply terminals, and a diode connected in series with the inductor for protection against reversal of the polarity of the battery. The connection circuit may include an electronic switch between the node of the connection of the inductor to the diode and the other supply terminal, and a circuit for controlling the switching of the electronic switch. A voltage raiser that utilizes the components of the filter for its operation is thus produced.

Abstract: A process for etching a dielectric layer, including the steps of forming, over the dielectric layer, a layer of polysilicon, forming over the layer of polysilicon a photoresist mask layer, etching the layer of polysilicon using the photoresist mask layer as an etching mask for selectively removing the layer of polysilicon, removing the photoresist mask layer from over the layer of polysilicon, etching the dielectric layer using the layer of polysilicon as a mask. Subsequently, the layer of polysilicon is converted into a layer of a transition metal silicide, and the layer of transition metal silicide is etched for selectively removing the latter from over the dielectric layer.

Abstract: Circuit for erasing and rewriting blocks of memory cells and particularly of analog flash cells, including at least one row decoding circuit including at least two adder blocks, suitable to generate a row address signal, at least two decoder blocks, suitable to generate respective pluralities of signals identifying a respective sector of memory to be enabled, at least two shifter blocks, suitable to generate an address signal of another row to be enabled, at least two OR logic blocks, suitable to generate respective signals serving the purpose to simultaneously enable at least two rows of the memory matrix.

Abstract: The period for which advertisements are displayed on display screens is monitored by coupling the displaying time with the time of a telephone call from a public telephone booth near the display panel. Preferably, the call made from this booth is paid with a pre-payment memory card. This memory card also has a memorizing zone in which it is possible to record an advertisement which is precisely the advertisement to be displayed.