Abstract: When communicating analogue signals over a data link an analogue signal is digitized at a transmitter into code words which are transmitted. This sequence is reversed at a receiver. At the receiver an estimate is made of the analogue signal value corresponding to each received code word taking into account the conditional probabilities that particular code words were transmitted for the particular received code word. These probabilities are calculated taking into account at least one prevailing condition such as recent history, soft decision information and channel state.

Abstract: In a series-regulation transistor (T.sub.1), which is driven by a drive circuit (10), for generating a constant voltage across a load (R.sub.L) the occurrence of comparatively large substrate currents in the case of saturation of the series-regulation transistor (T.sub.1) is precluded by a limiting circuit comprising a resistor (R.sub.1) arranged in the base line of the series-regulation transistor (T.sub.1) and a second transistor (T.sub.2) whose base-emitter junction is arranged across the resistor (R.sub.1) and the base-collector junction of the series-regulation transistor (T.sub.1). The collector of the second transistor is connected to a control input (12) of the drive circuit.

Abstract: A differential amplifier circuit for regenerating complementary analog signals of low amplitude includes a differential pair of field effect transistors whose common sources are connected to a first supply voltage V.sub.SS via a load, a pair of loads which are connected to the drain of each transistor of the differential pair and to a second supply voltage, respectively, and a level regenerating circuit having a pair of diodes for deriving the signals from the drain of each transistor of the differential pair. The signals transported by the diodes are applied to the lower transistor of a pair of push-pull stages whose upper transistor directly receives the signal derived from the drain of the other transistor of the differential pair, while the source of the lower transistors of the push-pull stages is connected to ground and the drain of the upper transistor of these stages is connected to the second supply voltage V.sub.

Abstract: The invention relates to a logic MOS gate of the domino type, having a precharging transistor, a validation transistor and logic transistors. To prevent unwanted discharging of a precharged high level, which may be induced by at least one input data being stabilized too slowly, that is to say not before a clock signal has risen to the high level, a p-MOS sub-network is arranged in parallel with the source-drain path of the precharging transistor and receives at least the input data which was too slowly stabilized in such a manner as to establish a conductor path which reestablishes the precharged high level.

Abstract: A current-mirror arrangement comprising a first and a second transistor (3, 4). The base and the collector of the first PNP transistor (3) and the base of the second PNP transistor are all coupled to a junction point (1) to receive an input current (Ye). The output current (Ya) is available at the collector of the second PNP transistor (4). The arrangement comprises a compensation circuit (2) which supplies a compensation current to the junction point (1) which is substantially equal to the sum of the base currents of the first and second transistors.

Abstract: A compact-disc digital audio player is described in which a user can store preferred selections on selected discs in a memory. The player can identify the disc from the subcode on the disc and can read the corresponding preferred selection out of the memory to play this preferred selection.

Abstract: An electronic information display system which is organized as a reference information display system. The system comprises a reference source in the form of a compact disc CD ROM, which constitutes a mass read-only memory for the system. The disc contains text, graphics and/or sound data portions for a plurality of items of information. The disc also contains a list of these items together with addresses for their respective data portions. The system is processor-controlled such that the list and addresses are read from the disc into a programme memory. Using scrolling and/or selection techniques, the list can then be displayed a part at a time until a required item is found. Selection of this item will result in its data portions being transferred from the CD ROM to the programme memory where they can be accessed for use (i.e. visual or audible).

Abstract: On the basis of n-bit words presented, the described channel encoder generates DC-free and run length limited m-bit (m>n) code words having (1+D).sup.-1 or (1+D.sup.1).sup.-1 precoder properties. The m-bit code words are formed each time by appending (m-n) bits to the n-bit words presented. For the determination of the (m-n) bits to be added, the amplitude density function as well as the distribution of the run length and the digital sum variation of the code words is calculated.

Abstract: An electrical plug comprising a base having connection pins secured therein, end portions of such connection pins projecting from the front of the base and opposite end portions thereof extending through the base and being respectively connected to respective connection terminals to which respective conductors of a connection cable are also connected. The material and shape of the base are such that it bends in response to a pulling force of a magnitude less than the tensile strength of the cable, exerted in a direction approximately transverse to the connection pins between the cable and the projecting end portions of the connection pins. Further, the connection pins are so secured in the base that the force required to extract any connection pin is greater than the tensile strength of the cable. Consequently, pulling of the cable can never result in a loose connection pin being left behind in a wall socket in which the plug has been inserted.

Abstract: An energy converter of the type utilizing a series-resonant bridge circuit (1) containing at least two thyristors (6A, 7A, 6B, 7B) with diodes (8A, 9A, 8B, 9B) antiparallel connected thereto, a high-frequency output transformer (12), and an energy buffer (2). A control circuit (3) is incorporated for generating trigger pulses for the appropriate thyristors in response to the energy of the buffer (2). The energy converter further comprises a switching circuit (24) connected in at least one of the supply lines of the supply source to the series-resonant circuit for ensuring that the diode, antiparallel connected to the last-conducting thyristor, starts to draw current immediately after this thyristor is blocked. The control circuit (3) furthermore generates signals indicative of the presence of current flowing through the diodes, which signals control the supply of the trigger pulses to the thyristors.

Abstract: Apparatus for controlling the transmission power of a transmitting station over a digital radio communication channel, based on information relating to the level of the signal received at a receiving station and information relating to the quality of such received signal relative to a predetermined error rate. The signal level information and signal quality information is derived by respective threshold measurement devices in the receiving station, and is transmitted back to the transmitting station over a return channel. The transmitting station comprises means for effecting combined processing of such information to derive a control signal which controls means for increasing or decreasing the transmitting power over a dynamic adjustment range. In a first part of such dynamic range such control is based only on the information relating to received signal level, and over a second part of such range such control is additionally based on the quality of the received signal.

Abstract: A high voltage semiconductor device includes a two-dimensional array of polygonal regions in a higher resistivity body portion of the opposite conductivity type. The p-n junction between these regions and the body portion may be, for example, a drain junction of a D-MOS transistor or a collector junction of a bipolar transistor and is reverse-biased in at least a high voltage mode of operation. In order to relieve the high electric field at the corners of the polygonal regions, a plurality of further regions is distributed in each area of the body portion between facing corners of three or more of the polygonal regions. These further regions of the same conductivity type as the polygonal regions are located on at least one line from each of these corners in a symmetrical arrangement of the further regions within each area.

Abstract: A sonobuoy has several components slidably mounted in an elongated tube. The components are longitudinally stacked one above the other at the lower end of the tube when the sonobuoy is in a pre-deployed state and are caused to slide longitudinally upwardly in the tube during sonobuoy deployment to provide a predetermined longitudinal spacing between the components when the sonobuoy is deployed. The components typically include an electronics canister, acoustic wave phase controls and one or more active electroacoustic transducers. The components are attached to a plurality of flexible support cables. The cables are attached at their respective upper ends to the bottom of the canister and are attached at their respective lower ends to the bottom of the tube. The cables are collapsed during the pre-deployed state and tautly extended during the deployed state. Axial guide strips are affixed to the inner surface of the tube.

Abstract: In integrated circuits the delay of the signal transitions has to lie within specified limits. This delay is partly determined by variations in the manufacturing process (process scatter). To compensate for the effect of this scatter a load capacitance is connected via a switching element to a node which is to be influenced in the integrated circuit. The switching element receives a reference voltage which is dependent on the manufacturing process and is generated by reference source, so that the node capacitance 26 is connected to the node for a longer or shorter time, depending on the process scatter.

Abstract: A device for determining the charge status of a battery (4) when it is discharged by a load (R.sub.L) and/or when it is charged by a power-supply circuit (1) in which a value representing the nominal charging time and discharging time respectively is stored in first (10) and second adjusting means (11) respectively and is applied to computing means (12). In response to clock pulses applied to the computing means by a clock means (13), the computing means calculate the charge status of the battery by expressing the elapsed discharging or charging time as a fraction of the adjusted discharging time and charging time respectively. The computed charge status is indicated by indicator means (14). During discharging and charging an actual charge status is detected by first (7) and second (16) detection means.

Abstract: A method coil bobbin (1) with a first flange (3) and a second flange (5) between which a winding space is formed in which a first coil (9) is wound. Around the first coil and electrically insulated foil (13) is fitted, on which one or more second coils (15, 17) are wound. An essentially U-shaped spacer (23) made of an electrically insulating material is placed, before the winding of the second coil (15, 17), around the insulating foil (13) such that its members (27) extend axially into the winding space. Each of the members (27) is provided near the first flange (3) with a first radial projection (29) and near the second flange (5) with a second radial projection (31). These projections define a minimum possible distance between the second coil (15, 17) and the first and second flanges. Each member (27) of the spacer is perferably also provided with at least a third radial projection (33) which separates two successive second coils (15 and 17) from each other in the axial direction.

Abstract: A separation structure for selecting the propagation mode of the light waves in a light wave guide, the latter being constituted by a strip (100) of a semiconductor material having a first refractive index formed on a semiconductor substrate (10) of a material having a second refractive index lower than the first index and such that the light is confined in the strip forming the guide. The structure is arranged in the path of the light beam in such a manner that it de-limits in the guide on the one hand at least one region (G.sub.1), in which the propagation of the light wave is monomode, and on the other hand a region (G.sub.11), in which the propagation is bimode. According to the invention the said separation structure is formed by an abrupt variation of the dimension of the guide perpendicular to the substrate, the flat surface of the substrate being chosen as reference for the measurement of this dimension in such a manner that, by defining e.sub.

Abstract: The invention relates to an irradiation device which is employed in particular in an arrangement for cladding a filamentary body 5, and to a method of cladding such a filamentary body 5, which irradiation device comprises a light source 1 and at least one optical conductor 4 which is provided with a light-entrance window at a first end and a light-exit window at a second end, the light-entrance window being directed to the light source.A cylinder lens 6 is positioned between each light-exit window and the location of the object to be irradiated during operation of the device.Preferably, the first end of the optical conductor 4 is sealed into the wall of a lamp envelope and the cylinder lenses are provided in the wall of a mainly cylindrical body 7 through which a filamentary body 5 which is to be clad can be led.

Abstract: The remote control unit has a selection mechanism for selecting any one of a number of categories of equipment to be controlled. The commands available for keyboard input in any given category are automatically displayed to the user upon selection of the category. Switches are provided for user selection of the model number of any one of a number of manufacturers of the equipment within the category to be controlled. Operation of the switches allows program controlled read-outs of formats stored in memory. An infra-red LED is then energized in accordance with the format to transmit the signal to the unit to be controlled.

Abstract: An interface circuit for translating digital signals signifying colors in any of various color formats into analog signals for controlling respective primary colors of a display monitor operating in a standard R, G, B primary color format. The circuit adds a control bit to each digital signal identifying the color format of the signal, and each of the colors signified by respective digital signals are identified by digital words corresponding thereto stored in a digital memory. The bits of each stored word control respective levels of analog signal attenuation in analog summing networks for converting each of such words into respective R, G, B analog signals for the video monitor. Changing the value of the control bit changes the word read-out from the memory in accordance with the particular color format of the received digital signals.