Abstract: A digital filter having K coefficients h(k) processes code words x(n-k), represented in the binary codes, of an input signal bit-parallel and uses filter coefficients h(k) represented in the CSD code. Substituting in the filter equation ##EQU1## the representation of the coefficients in the CSD code and the representation of the input code words in the binary code, the problem of converting a linear combination of powers of two, having arbitrary integral coefficients, into a binary number will occur repeatedly. Carrying out this conversion by means of cascades of Wallace Trees terminated by adders for two binary numbers results in a digital filter that is suitable for sampling rates up to 20 MHz and that can also be realized without any difficulty when an excess of 25 coefficients is needed for adhering to the required filter characteristic.

Abstract: Apparatus and method of determining the spectral distribution of the nuclear magnetization in a limited volume, in which the nuclear magnetization is excited in three mutually perpendicular layers by means of three successive high-frequency pulses. The stimulated echo signal generated at the area of intersection of the three layers is subjected to a Fourier transformation. The spin resonance signals additionally generated by the three high-frequency pulses are suppressed in that magnetic gradient fields are activated during the three intervals between the high-frequency pulses and between the last high-frequency pulse and the stimulated echo signal.

Abstract: Arrangement for receiving numerical data transmitted in the form of multiplexed packets in the video channel of a television transmission system, particularly comprising a circuit for recognizing data whose output signal (V) is used to authorize the transfer of the data signal (D) from a demodulator to a demultiplexer by means of an switching circuit (16a). The circuit (160) for recognizing the data comprises a D flip-flop (31) receiving the data signal (D), an exclusive-OR gate (33) whose inputs receive the data signal (D) and the output signal (D') of the D flip-flop (31) and which supplies from its output a signal (DX) applied to the input of a synchronous control module (32) which stores a given sequence of successive states of its input (36) during the opening period of a time window generated by a window generator (34) and which supplies the recognition signal (V) for authorizing the transfer when the said sequence of successive states is essentially a sequence of high states.

Abstract: A computer system having a central machine, work stations and a background memory, wherein the central machine has an active state, a standby state, a battery power supply state and a rest state, a heart memory maintains the actual time and contains information indicating at what time of what days the active state should prevail. When the mains power supply fails the central machine goes over to the battery power supply state. When the latter is failing, the battery indicator is set in an "error" state. When the mains power supply reappears, it is inspected whether then the active state has to be maintained and under the control of an "error" position an initial program load operation is carried out. If admissible the central machine goes over to the standby state.

Abstract: A switched mode DC power supply circuit for a telecommunication line, including a switched converter for charging an output capacitor from a DC source. The converter is controlled by a periodic control signal having a variable duty cycle so as to maintain a selected direct voltage level across the output capacitor. However, due to common mode currents on the telecommunications line, the capacitor may become charged above the selected voltage level even when the duty cycle of the control signal is reduced to zero. Such excess charge is returned to the DC source, without heat dissipation, by providing a further switched converter for coupling the capacitor to the DC source and which is controlled by a second periodic control voltage which is activated when the duty cycle of the first control voltage has been reduced to zero.

Abstract: A surface coil used as a measuring coil in a magnetic resonance apparatus is divided into at least two coil portions having opposite directions of winding and enclosing two identical surface areas. An induction current generated in a coil portion by a transmission field is then always compensated for by a current generated in the other coil portion. When one or more of such butterfly coils are used no circuits to block interfering signals need be built into the electronic measuring circuit and the transmission field is not disturbed by the measuring coil.

Abstract: A circuit arrangement for monitoring a binary signal having at least one level shift within a characteristic waiting time, such circuit including two flip-flops which receive control pulses at intervals at least as long as the characteristic waiting time. In order to enable the two flip-flops to employ the same clock pulses, a gate circuit is assigned to each of them, the output of which is connected to the data input of the assigned flip-flop. If a control pulse is present, the first gate circuit ensures that the first flip-flop can switch to its set state, while the second gate ensures that the state of the second flip-flop is switched to the inverse of the state of the first flip-flop. If a control pulse is not present, the first flip-flop can only be switched to its reset state when the binary signal to be monitored has the binary value 1, while the second flip-flop cannot switch from its existing state.

Abstract: In a data processing device which consists of a plurality of parallel-operating modules, each of the four modules is provided with its own clock circuit. Synchronization is realized at the level of the cycle of the high frequency oscillation. This is realized in that each of the clock circuits includes a two-out-of-three majority decision device which is fed by the output clock signals of the other three clock circuits. The majority decision may have a simple logic structure and is connected to the actual clock function generator in order to reduce, using a readjustment circuit, the deviation between the clock function signal and the majority signal by a factor substantially smaller than one for each transition of the majority signal.

Abstract: The described circuit arrangement for converting a data signal having a constant bit rate and code words of different length into an output signal consisting of code words of constant length but with a variable bit rate while using a buffer memory comprises a first encoder which recognizes code words of the data signal and converts them into code words of equal length, said code words being written in the buffer memory, read out from this memory by a second encoder and being converted into code words of the output signal. The construction of the first encoder is characterized in that a first EPROM and a comparator are connected to the parallel outputs of a shift register through which the data signal with its bit clock is shifted. The output data of the first EPROM and of the comparator are transferred to an intermediate memory and simultaneously applied to the address inputs of a second EPROM.

Abstract: A radiology patient support system includes a single vertical pillar of rigid closed box construction in which the side walls form a continuous closed cross section which rigidly supports two vertically arranged longitudinal tracks with their lateral directions at a right angle. A vertically displaceable carriage also of rigid box construction, is provided with bearing rollers which respectively engage the tracks and effectively locate the carriage horizontally relative to the pillar. A patent support table top is mounted on the carriage.

Abstract: In a mesh telecommunication network in which a hierarchic synchronization method is used for synchronizing the clock pulses of exchanges in such network, a class identification is assigned to the clock pulses of each echange corresponding to a hierarchical order of all the exchanges in the network. To maintain synchronization regardless of changes in the network configuration or failure of interconnecting lines, a synchronization identification is additionally assigned to each exchange. Each exchange transmits its class and synchronization identifications to the exchanges connected thereto, and all the identification received at any exchange are compared to determine the exchange connected thereto having the highest class identification and the highest synchronization identification in such class. The sychronizing clock pulses of such highest order exchange are then used for synchronization. Each exchange may also add to its identifications a mark to distinguish different operating conditions of the network.

Abstract: An arrangement for full-duplex data transmission over a two-wire circuit (1) comprises a transmit channel (2) connected to a baseband data transmitter (6) and including a smearing filter (18), a receive channel (3) connected to a baseband data receiver (9) and including a complementary smearing filter (19), a hybrid junction (4), an echo canceller (14) with an adaptive filter (15) and an adjusting circuit (16), and a combining circuit (17) inserted in the receive channel (3).

Abstract: A bistable electronically controlled transducer having an armature reciprocable between first and second positions is disclosed including either a stressed spring or compresed air within a closed chamber in the transducer for causing the armature to move, and a permanent magnet latching arrangement for holding the armature in either one of the positions. An electromagnetic repulsion motor overpowers the effect of the permanent magnet latching arrangement releasing the armature to move from one to the other of the positions. The transducer finds particular utility as an actuator mechanism for moving internal combustion engine valves.

Abstract: The apparatus for detecting and discriminating phase jumps in a periodic signal comprises, arranged in cascade between an input terminal (1) and an output terminal (2), a frequency converter (3) transforming the frequency spectrum of the input signal e(t) containing a line at the frequency f.sub.e in a continuous band spectrum whose frequency is centered around f.sub.e, an interrupter (4), a resonator (5) having a resonant frequency f.sub.0 near f.sub.e and a phasemeter (6) having detection and discrimination means. The ensemble of these elements (3-6) is controlled by a sequencer (7) which, at each period .alpha. such that .alpha.=t.sub.1 +t.sub.2, allows the phase detection and the discrimination of each phase jump of a predetermined value .DELTA..phi..sub.e which may be contained in the input signal at the frequency f.sub.e.

Abstract: An X-ray examination apparatus, for example, for dental use, comprises an extraoral radiation entrance screen which is displaceable in a plane which is transverse with respect to a normal thereto. Consequently, distortion-free imaging can be performed for the entire set of teeth and the adjoining regions of the jaws.

Abstract: Method of adjusting the interstation delay in an information transmission system comprising a large number of relay stations arranged in cascade and utilizing in one transmission direction the TDMA method, and a system to which such a delay adjusting method is applied.This method of adjusting the interstation delay in an information transmission system utilizing the TDMA principle can be advantageously used when the system comprises a large number of relay stations in a cascade arrangement. An adjusting range is imposed on the delay to be allocated to the transmission of data in order to avoid information jumps which may provoke overlapping on reception of these data. The adjustment of the delay is effected by starting with the relay station nearest to the central station, then the following relay station etc., and ending with the adjustment of the terminal station involved.

Abstract: An echo canceller designed to cancel an echo signal [g(t)] generated in a send path (7) by a signal [f(t)] applied to a receive path (1) contains a subtractor (9) whose positive terminal receives a signal derived from the echo signal and whose negative terminal receives the output signal from a transversal filter (10) provided with means (12) for adjusting the filter coefficients in such a way that the component due to the echo signal is cancelled at the output of the subtractor (9).This echo canceller comprises a delta encoder (14) for encoding at a sampling rate 1/T the signal f(t) entering the receive path (1) and for supplying at the input of the transversal filter (10) a delta-encoded signal (.DELTA.F.sub.n), a circuit (22) for forming at the sampling rate 1/T the difference signal (d.sub.

Abstract: Improvements in alternating current plasma display panels are disclosed including an imperforate intermediate structure in such a panel which provides both the function of a separator between the front and back plates (layers or structures) of the panel and the function of cross talk reducing barriers between cells of the panel. The structure includes spacing bosses which extend from the barrier structure and engage the front transparent dielectric plate, and sidewall portions intermediate adjacent pairs of spacing bosses which are separated somewhat from the front dielectric plate to provide a gas and ion passing gap between adjacent cells. In one preferred form, the sidewalls blend into a generally flat bottom wall within each cell. The sidewalls and bottom wall have a smooth or specular surface and may be coated with a reflective material to enhance cell brightness.

Abstract: Clock recovery arrangement suitable more specifically for an information transmission system using the TDMA principle in one transmission direction.A clock recovery arrangement (24, 13) employed in an information transmission system comprised of a central station (1) and remote stations (2, 3, 4, 5, . . . ). Each station has at least one transmitter circuit (11, 21, 23, 31, 41, 51) and one receiver circuit (12, 20, 22, 30, 40, 50). The information components are time-division muliplexed in the direction from the central station to the remote stations and are transmitted in accordance with the TDMA principle in the other direction. The clock signal H of the multiplex direction is used in the TDMA direction to set the frequency of a first phase-locked loop, while a second loop ensures a fast phase reset. This clock recovery arrangement constituted by this dual loop thus satisfies the requirements as regards precision and reduction of the residual jitter.

Abstract: The invention relates to a collimator for an X-ray mammography. A cone which is connected to the radiation source defines a radiation field which corresponds to the format of the image pickup. This radiation field is further restricted by a pivotable diaphragm plate arranged in the cone. The radiation field can be adapted to the anatomy of the object to be imaged by pivoting the diaphragm plate.