Abstract: A short-arc flashlamp of the type having an internally integral reflector including an anode and cathode member mounted to extend along a central axis of symmetry of the lamp and having distal ends spaced apart to define a short-arc gap. The lamp is driven by current pulses such that the average peak currents across the arc gap exceed about one hundred amperes in pulses ranging from about two to ten microseconds.

Abstract: A magnetic medium including a physical reference feature for conveying positional information to a magnetic read/write head. The reference feature is made by indelibly marking a pattern on a surface of the medium such as by inscribing the metal oxide coating on the medium surface or by chemical etching or photolithography of the surface. Magnetic data is written on the surface of the medium and when data written on the reference feature is read, a modulated read back signal is observed which indicates the position of the reference feature. The position of the reference feature is used to direct the read/write head to track zero or to some other position on the medium surface. By using a second magnetic read/write head to write data on a second surface of the medium in response to the modulated readback signal, an electronic reference track can be written on the second surface for providing positional information to the second magnetic read/write head.

Abstract: A bipolar transistor and two field-effect transistors are connected in a BiCMOS pull-down configuration to pull-down to a (first) predetermined potential level the potential developed on an output line when a high logic level potential is developed on an input line. To maximize switching speed and to minimize ground bounce (transients), the bipolar transistor is not permitted to go into saturation. A pair of transistors, connected in an inverter configuration, develop a signal which indicates when the bipolar transistor pulls-down the level of the potential on the output line below a (second) predetermined potential level.

Abstract: For use in calculating discrete, fast fourier transformations, an arithmetic logic unit includes a number of multiplexers and registers, which, in combination, form a configurable pipeline, register ("A"), that functions as a four-deep pipeline register, as two, two-deep, pipeline registers, or as four separate registers, to latch and "delay" the parameter represented by the state of signals externally developed on a "DA" bus; the combination of a funnel shifter, a merge logic unit and a multiplexer; a unit for "bit-reverse order" addressing; and a unit for "rounding off" certain results.

Abstract: A process for identifying disks and automatically configuring a disk drive system to any one of a variety of disk patterns as embedded in firmware in a controller of a disk drive system. The process distinguishes between embedded servo and nonembedded servo disks by searching for servo patterns on the disk. Distinction between high and low density type disks is made by reading the disks at different data rates. After the type of disk is determined, a controller is enabled to set the disk drive system in the proper mode for that type of disk. The process also enables the controller to find the disk format values on the disk, or provides the standard values for the particular type of disk if the information is not located on the disk.

Abstract: A method and apparatus for use in a computer image generator for providing translucency in the scene content of a video processed image as displayed on a cathode ray tube through subpixel processing. The method and apparatus considers the occulting problem of translucent surfaces in a typical computer image generated display. The apparatus and method thereof for processing a translucent object represented by a polygon surface utilizes creation of an array of flag bits per pixel representing a visible bed-of-nails of each polygon surface each of which has its own translucency factor. Each of the surface flag bit signals are processed to provide a logical union between the array of flag bits representing the translucent bed-of-nails of the visible portion of the surface and the array of flag bits stored in the bed-of-nails memory. The final resultant pixel display will be thus representative of the translucency intensities of the various surfaces processed.

Abstract: Four transistors, a pair of buffers, and an inverter are configured with the first transistor connected in a pull-up configuration, with the transistor drain connected to a first node and with the transistor gate connected to a second node. The second transistor is connected in a pull-down configuration, with the transistor gate connected to a (data) input line and with the transistor drain connected to the first node. The third transistor is also connected in the pull-up configuration, with the transistor gate connected to the first node and with the transistor drain connected to the second node. The fourth transistor is also connected in the pull-down configuration, with the transistor gate coupled by the inverter to the input line and with the transistor drain connected to the second node. The buffers are each connected between a respective one of the nodes and a respective one of two (data) output lines.

Abstract: A laminated case for a magnetic disk having a pair of outer laminae and a spacer lamina sandwiched therebetween. The spacer lamina adds rigidity to the laminated case and controls the height of a cavity in which the magnetic disk is located. A liner for wiping the disk is attached to each of the outer laminae. The liner has a free hanging section which provides the wiping action. The three laminae are ultrasonically welded together by a method which employs a fixture and an ultrasonic welding horn. The method permits the magnetic disk to be tested and discarded without sacrificing the laminated case.

Abstract: A process allows a disk drive system to optimize head position in order to minimize the effects of track variations due to disk misclamping and imperfections. The process utilizes a transducer head having a width less than a track width. The small size of the transducer head allows it to be positioned within a stationary band which remains within the boundaries of the track for the complete revolution of the disk. Once the head is positioned within this band for one track of the disk, this track can be used as a reference for positioning the head within the bands of the other tracks.

Abstract: A device and method are presented which allows the precise generation of signals within an integrated circuit that are calibrated to an external reference signal. The device consists of a ring oscillator which generates a calibration signal oscillating at a first frequency and a power source that supplies a compensated power signal to the ring oscillator. The first frequency is variable based on the voltage of the compensated power signal. A phase detector is used to detect the relative phase of the calibration signal and the external reference signal. The compensated power signal is also used for critical data paths within the integrated circuit where precise timing is required. In a tester, a plurality of signals may be extracted from the ring oscillator using a series of taps. These signals will oscillate at the same frequency as the calibration signal, but will be phase shifted. The signals may be combined with multiplexors to form a test signal which is applied to a device under test (DUT).

Abstract: An optical probe is sealingly mounted in an access port of a pressurized container. The probe comprises a glass rod of a predetermined thickness having a conical end tip. An optical transmitter and receiver is connected to the glass rod. The fiber optic transmitter and receiver sends visible red light down the glass rod. When the liquid level inside the container drops below the end tip of the glass rod, reflected light will be received from the glass rod and detected.

Abstract: An increasing temperature warning device for protecting an item from high temperature or fire damage comprising a thyristor connected in parallel with a reference voltage source. An audible or visual warning means is connected in series with the thyristor. When the temperature of the thyristor exceeds a specified temperature, the thyristor switches on and the warning means is activated. A series combination of a diode and a resistor can be connected in parallel with the gate of the thyristor to cause the reference voltage to be a function of the ambient temperature of the protected device. A diode connected in series with the thyristor allows the increasing temperature warning device to be powered by an alternating current source and a pair of thin wire fuses protect the warning device from excess current situations.

Abstract: Employed is a thermometer-code-to-one-of-n converter having a number of similar portions each of which includes gates each configured to detect a zero-zero-one pattern and to develop a one-of-n signal, gates each configured to detect a one-zero-zero pattern (an invalid pattern) and to develop an error signal, gates configured to combine the error signals, and gates configured to gate the error signals with the one-of-n pattern signals to block (inhibit) one-of-n signals.

Abstract: Local area networks are interconnected through bridging devices by a backbone network having a plurality of broadband channels. The bridges encapsulate local area network messages within backbone network messages which are addressed to specific bridges. The bridge then selects one of the appropriate broadband channels for transmission of the backbone network message over the backbone network.

Abstract: A reader section has an oscillator for providing a power signal to a reader antenna. The reader antenna is constructed of a ferromagentic rod having primary and secondary windings. The primary windings are concentrated near the end of the ferromagnetic rod. A transformer is connected to the oscillator and the reader antenna and separates the power signal from an identifier signal. An identifier section has an identifier antenna which is constructed of a ferromagnetic rod having wire windings. An identifier circuit is connected to the identifier antenna for receiving the power signal and for transmitting a unique identifier signal.

Abstract: To provide a means for the safe, premature, abortion of a write cycle without additional, read cycle, pipeline delays multiplexers and registers are included configured to store the address and data signals externally developed during a write cycle and to store in a RAM array the stored data at the stored address during the next write cycle. A comparator is included, configured to compare each stored address with each current address. Also included is a multiplexer configured to, during a read cycle, provide from the RAM array the currently addressed data when the current address is different than the stored address and to, during a read cycle, provide the register stored data when the current address matches the stored address.