Abstract: A method for testing the integrity at least two test objects, each object is made of a plastically deformable material, by a. contacting a moving means with the objects at a first point in time, the moving means at a first position and the objects at a first position, the moving means having a shaped portion; b. shifting at least a portion of the objects to a second position at a second time, subsequent to the first time, wherein at least a portion of the objects were displaced during the interval between the first time and the second time; c. evaluating the objects after the shifting in step b. 22.

Abstract: An adhesive for bonding a die of an integrated circuit chip comprises an aryl cyanate (ester) resin alone and/or a diepoxide resin admixed with a hydroxymethylated phenolic resin or hydroxymethylated poly(hydroxystyrene) which can further contain an electrically or thermally conductive filler.

Abstract: A method of performing electrochemistry processes on features and connectors of a substrate includes the application of a shorting layer across the connectors which are in electrical contact with the features, thereby shorting the features and creating an assemblage for which electricity is applied.

Abstract: This invention relates to a method of forming a bottomless liner structure. The method involves the steps of first obtaining a material having a via. Next, a first layer is deposited on the material, the first layer covering the sidewalls and bottom of the via. Finally, a second layer is sputter deposited on the first material, the material Rf biased during at least a portion of the time that the second layer is sputter deposited, such that the first layer deposited on the bottom of the via is substantially removed and substantially all of the first layer deposited on the sidewalls of the via is unaffected.

Abstract: A scan architecture for testing integrated circuit chips containing scannable memory devices, such as register arrays, is operable in a bypass mode during which only a small portion of the memory cells in each device or array is inserted in the scan path to substantially reduce scan path length, test time and test data volume during testing of other logic components in the circuit chip. Additional decoder logic is employed to select a small number of words in the device or array during the scan-bypass mode, and multiplexor circuitry removes the bypassed words from the scan path. By leaving the small number of the register array words in the scan path, observability of logic upstream of the array, and controllability of logic downstream of the array, is preserved during the bypass mode without the need for additional shift register latches and other external logic components.

Abstract: Methods and apparatuses to perform soldering while the chip is held by a head under melted solder condition are disclosed. Solder bumps 3 are formed on the chip 1, and they are opposite to terminals 11 on a mounting board 10. Furthermore, a heating block 21 is located at the back of the chip, and it raises the temperature of the solder bumps 3 on the chip 1 to a melting point by heating the chip back by conduction. Preferably, another heating block 22 is located at the back of the mounting board 10. Soldering is performed by bringing the solder bumps 3 into contact with the terminals 11 while the solder is melted.

Abstract: A solder ball structure having a first object and least one solder ball, each solder ball having an outer surface, top and a bottom and comprising a non-eutectic admixture of solder. The solder ball structure also having at least one BLM, each BLM having a top and a bottom and the top of each BLM in contact with the bottom of one of the at least one solder ball, each BLM containing a solder having a melting point sufficiently lower than the melting point of the corresponding solder ball such that each BLM can reflow without a significant portion of the corresponding solder ball reflowing, the bottom of each at least one BLM in electrical communication with the first object.

Abstract: A container for storing and transporting fragile objects, comprising a pair of side walls, a top wall, a bottom wall, and a back wall, forming a box with one open side; a plurality of spaced apart partitions between the side walls for separating the objects; and means to maintain the objects in an angled orientation during storage and transport so that the objects rest against the partitions and do not easily move.

Abstract: A chemical etchant for the removal of titanium-tungsten containing structures from the semiconductors and a method for removing the titanium-tungsten. The etchant comprising a solution of hydrogen peroxide, a salt of EDTA, and an acid, the acid capable of preventing the deposition of tin oxide. The method of removal comprises first obtaining a wafer containing titanium-tungsten. Second, immersing the wafer having titanium-tungsten thereon for a predetermined period of time in an etchant bath comprising a solution of hydrogen peroxide, a salt of EDTA and an acid, the acid capable of preventing the deposition of tin oxide. Third, removing the treated wafer and rinsing the treated wafer and lastly, drying the wafer.