Abstract: A method and apparatus for SSA dead code elimination includes examining a first instruction off a worklist, wherein the first instruction includes previous link and a write mask and the first instruction is an SSA instruction. The method and apparatus further includes examining at least one second instruction of the machine code, wherein the at least one second instructions are sources of the first instruction and the at least one second instructions are SSA instruction. In the method and apparatus, each of the at least one second instructions include a previous link and a write mask. The method and apparatus further includes determining if any components within a particular field of the at least one second instruction are live. If none of the components are live, the method and apparatus provides for deleting the second instruction from the machine code as it is determined that this instruction is extraneous, dead code.
Abstract: Switching and control circuitry for selectively combining a plurality of data signals to provide a composite signal, which corresponds to one or more of the plurality of data signals, and a trigger signal for controlling capturing of selected portions of the composite signal.
Type:
Grant
Filed:
June 6, 2006
Date of Patent:
July 28, 2009
Assignee:
LitePoint Corp.
Inventors:
Christian Olgaard, Dirk Johannes Marius Walvis
Abstract: A kit of parts includes a tubing component having at least two in-line sections with different external diameters and a set of connection devices. Each connection device is dimensioned such that it may be joined to the tubing component at a respective section.
Abstract: A method and apparatus for superword register value numbering includes hashing an operation code and the value numbers of a plurality of sources to generate a flint hash value. The method and apparatus further includes retrieving an operation value number from the first hash table based on the first hash value. The method and apparatus further includes generating a result value number based on a previous bit hash value and the operation value number. The result value number is a combination of the operation value numbers for each component having a live indicator (e.g., a false write mask value) and a previous value numbers for the components without the live indicator (e.g., a true write mask value). Thereupon, the method and apparatus includes searching a second hash table using the result value number. As such, the method and apparatus provides using two separate hash tables for value numbering with superword instructions.
Abstract: The present invention is a method of writing information to a synchronous memory device by examining a present word of N bits to be written, where each bit has a high or low value. The present word is compared to a previous word also having N bits to identify the number of bit transitions from a low value to a high value of vice versa. The present bit is inverted when the number of transitions is greater than N/2. To avoid the need for having an extra bit accompany data bytes to indicate the presence or absence of inversion, the present invention takes advantage of a data mask pin that is normally unused during writing operations to carry the inversion bit. Non-inverted data is written directly into the memory device while inverted data is first inverted again before writing to storage locations, so that true data is stored in the memory device.
Type:
Grant
Filed:
October 15, 2004
Date of Patent:
July 28, 2009
Assignee:
ATI Technologies, ULC
Inventors:
Joseph Macri, Olge Drapkin, Grigori Temkine, Osamu Nagashima
Abstract: It is the object of the present disclosure to provide an improved end mill that can be easily manufactured, reduces cutting forces on the driving tool, limits chatter at high rotation speeds, has better stability, produces smoother cutting surfaces, and has less natural resonating frequencies while in use to permit operation of the end mill over a wider range of operating conditions. The end mill is equipped with a series of sinusoidal cutting edges with a single long pitch arranged regularly or irregularly along the circumferential cutting surface. In another embodiment, the pitch, the cutting angle of the datum line of the sinusoidal cutting edges and the amplitude of the sinusoidal function can be varied.
Abstract: A method is disclosed for measuring one or more parameters of a signal generated by a signal generator. The method employs capturing and analyzing a train of data packets or other forms of signals from a single transmission to obtain measured values for the one or more parameters. The obtained measured values may be used in valuing a calibration of a signal generator or in verifying the already calibrated values of the signal generator. In accordance with a preferred embodiment, the train of data packets contains packets having different properties.
Abstract: A circuit and method for limiting a signal voltage in which the minimum and maximum levels of the output signal can be controlled by selectively applying different lower and higher reference voltages from which the minimum and maximum output signal levels are derived.
Abstract: A method and apparatus for configuring multiple displays associated with a computing system begins when display preferences regarding at least one of the multiple displays are received. The display preferences indicate desired selections of which images are to be displayed on which displays and may be based on user selections or application selections. Having received the display preferences, a coupling controller within a video graphics processing circuit determines whether the display preferences can be fulfilled in observance of configuration properties. The configuration properties include limitations of the displays (e.g., refresh rate, resolution) and the computing system (e.g., display controller capabilities) and/or rules of the computing system (e.g., at least one screen must be actively coupled at all times). If the display preferences can be fulfilled, the coupling controller causes display controllers to be operably coupled to displays.
Type:
Grant
Filed:
March 2, 1998
Date of Patent:
June 30, 2009
Assignee:
ATI Technologies ULC
Inventors:
Gordon Fraser Grigor, Vladimir F. Giemborek, John E. Haberfellner
Abstract: A tackle container with barriers extending across the bottom of the interior cavity holds fishing lures in a fixed position and allows easy retrieval of each lure. Each barrier in the container includes a curved wall that converges with the bottom of the container. The barrier thereby forms a nesting space between the backside of the curved wall and the bottom of the container. A fishing lure fits under a barrier with its hooks wedged into the nesting space to hold the lure in a desired position. The barriers may be removable inserts having rails that slide into slots along the sidewall of the container. The inserts may be positioned in a variety of configurations.
Abstract: A signal detector for detecting and indicating the duration of a signal pulse by comparing the relative polarities of two voltages generated during the two states of the pulsed signal.
Abstract: A device for draining off liquid droplets from a temperature sensor, said device comprising a fixture for mounting a temperature sensor, a ledge arranged relative to the edge portion of the temperature sensor mountable in said fixture such that any liquid droplets at the edge portion are drawn into the interspace between the ledge and the edge portion.
Abstract: Disclosed are methods and apparatus for accomplishing the fetching or sampling of channels of pixels or texels such as neighboring pixels or texels or non-neighboring pixels or texels in a simultaneous operation in order to achieve optimization of the performance of a texture pipeline. In particular, logic is disclosed including selector logic configured to retrieve data including a plurality of channels from each of a plurality of pixels or texels and operable to select one channel from the plurality of channels of the data from each of the pixels or texels. The logic also includes combination logic configured to combine two or more of the selected channels into a single vector, such as an RGBA vector representing the color.
Type:
Grant
Filed:
August 31, 2005
Date of Patent:
June 23, 2009
Assignee:
ATI Technologies, Inc.
Inventors:
Chris Brennan, John Isidoro, Anthony DeLaurier
Abstract: Apparatus and method for use in packet data communication from a single-input-multiple-output/multiple-input-single-output (SIMO/MISO) transceiver to a single-input-single-output (SISO) transceiver. Coordinate rotation digital computation (CORDIC) circuitry is used to scale outgoing data signals with transmit channel coefficients representing relative strengths of individual signals to be transmitted via multiple spatially diverse antenna elements.
Type:
Grant
Filed:
April 5, 2004
Date of Patent:
June 9, 2009
Assignee:
National Semiconductor Corporation
Inventors:
Haiyun Tang, Karim Nassiri-Toussi, Ahmad Bahai
Abstract: An electronic display includes a first display, a second display and an enclosure that is adapted to house the first display and the second display such that the back side of the first display faces the back side of the second display. The enclosure includes a first side wall, a second side wall, and a perimeter wall. At least one support circuit disposed between the back side of the first display and the back side of the second display is operatively coupled to each of the first display and the second display. The thickness of the enclosure is substantially defined by a thickness of the first side wall, the thickness of the first display, the thickness of the second display, the thickness of the support circuit, and a thickness of the second side wall when the first display, the second display, and the support circuit are housed in the enclosure.
Abstract: A sigma-delta difference-of-squares RMS-to-DC converter and method for performing such a conversion in which an analog feedback signal is combined with an analog input signal, following which the combined signals are multiplied to produce an analog product signal that includes at least one signal component corresponding to a difference between a square of the analog feedback signal and a square of the analog input signal. This analog product signal is filtered and digitized to produce a digital output signal to be available for use downstream in or with the host system, with such digital output signal also being converted to the analog feedback signal.
Type:
Grant
Filed:
March 14, 2008
Date of Patent:
June 9, 2009
Assignee:
National Semiconductor Corporation
Inventors:
Paulo Gustavo Raymundo Silva, Michael Hendrikus Laurentius Kouwenhoven