Patents Represented by Attorney Volentine Francos & Whitt, PLLC
  • Patent number: 7144815
    Abstract: A polishing slurry including an abrasive, deionized water, a pH controlling agent, and polyethylene imine, can control the removal rates of a silicon oxide layer and a silicon nitride layer which are simultaneously exposed during chemical mechanical polishing (CMP) of a conductive layer. A relative ratio of the removal rate of the silicon oxide layer to that of the silicon nitride layer can be controlled by controlling an amount of the choline derivative.
    Type: Grant
    Filed: January 15, 2004
    Date of Patent: December 5, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-dong Lee, Bo-un Yoon, Sang-rok Hah
  • Patent number: 7144601
    Abstract: The purging of photoresist from a supply device of semiconductor coating equipment is automatically executed in a controlled manner. The equipment employs a plurality of photoresist bottles for storing the same kind of photoresist. A plurality of supply pipes are respectively connected to the photoresist bottles, respectively. A valve system selectively opens and closes the supply pipes in response to control signals generated by a main controller. A dispense pump forces the photoresist in the open supply pipe through a nozzle. A purge start button issues a purge start command signal to the controller when the button is pressed. The controller then controls the valve system and the dispense pump so as to automatically purge the photoresist according to a sequence effected using a timer.
    Type: Grant
    Filed: April 12, 2005
    Date of Patent: December 5, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kwang-Ho Lee, Jung-Hong Kim, Jong-Hwa Lee
  • Patent number: 7142462
    Abstract: A receiving device which may include a plurality of pre-amplifiers and a plurality of samplers. Each of the plurality of samplers is connected to the output ports of a corresponding pre-amplifier. Each sampler samples data signals input thereto in response to a corresponding clock signal. The receiving device of a semiconductor memory unit may reduce input capacitance seen from the outside of chip and eliminate mutual interference of signals so as to prevent errors from being generated when data is extracted in the event of over sampling using pre-amplifiers. Furthermore, the receiving device can separately control the pre-amplifier for samplers that receive clock signals for data alignment and the pre-amplifier for samplers that accept clock signals for repeated data reception.
    Type: Grant
    Filed: August 17, 2004
    Date of Patent: November 28, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jin-hyun Kim
  • Patent number: 7141504
    Abstract: There is disclosed a method of treating a substrate material or a film present on the material surface comprising cyclically performing the following steps: (a) etching the material or film; (b) depositing or forming a passivation layer on the surfaces of an etched feature; and (c) selectively removing the passivation layer from the etched feature in order that the etching proceeds in a direction substantially perpendicular to the material or film surface. At least one of the steps (a) or (b) is performed in the absence of a plasma. Also disclosed is an apparatus for performing the method.
    Type: Grant
    Filed: July 23, 1999
    Date of Patent: November 28, 2006
    Assignee: Surface Technology Systems PLC
    Inventor: Jyoti Kiron Bhardwaj
  • Patent number: 7140384
    Abstract: A mass flow controller includes a base having a first passage, an inlet portion for introducing fluid into the first passage, an outlet portion for releasing the fluid from the first passage, and a second passage branched from a first upstream portion of the first passage and connected to a second downstream portion of the first passage A mass flow sensor is connected to the first passage between the inlet portion of the base and the first portion of the first passage; A first valve is disposed in-line with the first passage between the first and second portions. The first valve controls the mass flow of the fluid passing through the first passage;. A second valve is disposed in-line with the second passage to opens/close the second passage. A valve controller compares the mass flow measured by the mass flow sensor to a standard flow, and then positions the first valve such that the measured mass flow corresponds to the standard flow.
    Type: Grant
    Filed: June 18, 2004
    Date of Patent: November 28, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Ho Kang, Seog-Min Lee, Sung-Wook Jung, Yong-Suk Kim
  • Patent number: 7141512
    Abstract: A semiconductor device fabrication apparatus is cleaned after a conductive layer is formed on a metal oxide layer of a substrate. The substrate is disposed on a heater in a process chamber of the apparatus, and the conductive layer is formed by introducing source gases into the chamber. Then the substrate is transferred out of the process chamber. At least one by-product of a reaction between the source gases and the metal oxide layer adheres to a surface inside the chamber, such as to a region or regions of the heater. Once the semiconductor substrate has been transferred outside the process chamber of the semiconductor fabrication apparatus, the by-product(s) is/are removed by evaporation. The by-product(s) can be evaporated using gas, such as one of the source gases, so that the process chamber can remain closed.
    Type: Grant
    Filed: November 30, 2004
    Date of Patent: November 28, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: In-su Ha, Yoon-bon Koo, Hyun-seok Lim, Cheon-su Han, Seung-cheol Choi
  • Patent number: 7141913
    Abstract: An acoustic resonator of one inventive aspect includes a substrate, at least one generally crystalline primer layer provided on the substrate either directly or on top of one or more intermediate layers, a generally smooth and generally crystalline electrode layer provided on the primer layer, and a piezoelectric layer provided on the electrode layer. The primer layer, or at least one of the primer layers, has a crystallographic structure belonging to a first crystal system, and the electrode layer has a crystallographic structure belonging to a second crystal system which is different to the first system. The atomic spacing of the primer layer or at least one of said primer layers and that of the electrode matches to within about 15%.
    Type: Grant
    Filed: November 29, 2004
    Date of Patent: November 28, 2006
    Assignee: Trikon Technologies Limited
    Inventors: Christine Janet Shearer, Carl David Brancher, Rajkumar Jakkaraju
  • Patent number: 7138608
    Abstract: A sealed line structure equipped with a heater block for a process chamber for use in manufacturing a semiconductor device is provided. The structure includes a housing member, a movement prevention member is constructed of a lock nut, a clamp ring and an elastic unit, and a power line or a thermocouple line is sealed by the configuration of the housing member, the movement prevention member, a cover member, and a connector member.
    Type: Grant
    Filed: April 12, 2005
    Date of Patent: November 21, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Chun-Ho Cho
  • Patent number: 7137870
    Abstract: Embodiments of a wafer polishing and broken platen belt sensing apparatus are disclosed, wherein the apparatus comprises a polishing platen, a motor, a platen belt, a photo sensor, and an encoder connected to the motor and adapted to output a first signal in accordance with the rotational speed of the motor. In one embodiment, the apparatus comprises a photo sensor adapted to output a second signal in accordance with the rotational speed of the polishing platen and is adapted to generate an interlock signal when the motor and the polishing platen are not both rotating normally. In another embodiment, the apparatus comprises a photo sensor adapted to output the second signal in accordance with the rotational speed of the platen belt and is adapted to generate an interlock signal when the motor and the platen belt are not both rotating normally.
    Type: Grant
    Filed: March 24, 2006
    Date of Patent: November 21, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Mu-Yeoun Kim
  • Patent number: 7135412
    Abstract: In the control method in a management system of semiconductor manufacturing equipment to enhance a product yield through a control of etching process, information of a corresponding lot for the etching process is recognized. It is checked whether the information of corresponding lot is for an etching process after a predetermined RF time of etching apparatus. RF time of the etching apparatus is compared with the predetermined RF time, and it is decided whether the etching process of corresponding lot can be performed in the etching apparatus if the etching process for the corresponding lot should be performed after a lapse of the predetermined RF time.
    Type: Grant
    Filed: December 8, 2004
    Date of Patent: November 14, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Min-Jae Na
  • Patent number: 7132684
    Abstract: A test structure and method for testing a semiconductor device are provided. The test structure including a first test pattern having a plurality of electrically separated metal patterns, a plurality of metal vias formed in opposite end portions of the respective metal patterns, and a second test pattern connected to the first test pattern through the metal vias. By using this structure, the presence, nature, and size of a metal failure can be detected by analyzing a resistance arising from the application of a test voltage to the first test pattern.
    Type: Grant
    Filed: April 29, 2004
    Date of Patent: November 7, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jong-hyun Lee
  • Patent number: 7129579
    Abstract: A semiconductor apparatus includes a semiconductor integrated circuit including a conductive pattern; an insulating layer which is formed on the semiconductor integrated circuit to forms a plurality of base members having uneven heights; an opening which is formed through the insulating layer to expose a part of the conductive pattern; and a conductive layer which is formed on the insulating layer and the opening, the conductive layer is extending from the exposed portion of the conductive pattern to the top surface of the highest base member. An electrode is composed of the insulating layer, the opening and the conductive layer.
    Type: Grant
    Filed: March 17, 2003
    Date of Patent: October 31, 2006
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Takashi Ohsumi
  • Patent number: 7129024
    Abstract: An electron beam lithography method includes extending the widths of a plurality of stripes which divide a region where an electron beam exposure is to be performed, so that the boundaries of the stripes overlap adjacent stripes at each boundary, and sequentially exposing each of the stripes to an electron beam.
    Type: Grant
    Filed: July 22, 2003
    Date of Patent: October 31, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Won-Tai Ki
  • Patent number: 7129517
    Abstract: To reduce a current loss through a channel and improve electron mobility, a first semiconductor layer and a second semiconductor layer (sequentially formed on a semiconductor substrate) have different lattice properties. The first semiconductor layer and the second semiconductor layer may be etched to form a first semiconductor pattern. A third semiconductor layer having a lattice property substantially identical to that of the first semiconductor layer may be formed over the first semiconductor pattern. The third semiconductor layer may then be etched to form a second semiconductor pattern. A gate may be formed on the second semiconductor pattern. The contact surface between the second semiconductor pattern and the gate pattern may consequently increased to reduce a current loss. Further, the lattice properties may be changed to improve electron mobility of the semiconductor layers.
    Type: Grant
    Filed: March 17, 2004
    Date of Patent: October 31, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jeong-Hwan Yang
  • Patent number: 7128637
    Abstract: A system and method adapted to detect a malfunction related to a pad conditioner in a polishing apparatus are disclosed. The pad conditioner includes a conditioning pad seated on a conditioner head and a drive motor rotating the conditioner head. The system also comprises a current sensor connected to the drive motor, adapted to detect electrical current drawn by the drive motor, and provide a corresponding current value, a Personal Computer (PC) receiving the current value, adapted to compare the received current value to first and second reference values, and generate a drive indication signal in response to the comparison, and a main controller receiving the drive indication signal and adapted to generate an interlock signal halting operation of the polishing apparatus in response to the drive indication signal.
    Type: Grant
    Filed: August 22, 2005
    Date of Patent: October 31, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyeung-Yeul Kim, Sung-Hwan Kim
  • Patent number: 7129161
    Abstract: This invention relates to a method of depositing a tantalum film in which ?-Ta dominates and to methods of electroplating copper using such films. The films have a thickness of less than 300 nm and are formed by depositing a seed layer of an organic containing low dielectric constant insulating layer and sputtering tantalum onto the seed layer at a temperature below 250° C.
    Type: Grant
    Filed: July 15, 2002
    Date of Patent: October 31, 2006
    Assignee: Trikon Holdings Limited
    Inventor: Hilke Donohue
  • Patent number: 7126419
    Abstract: An analog circuit includes a pair of peak-hold circuits that generate peak signals indicating the peak values of a differential pair of input signals, a first differencing circuit such as a transconductance amplifier that takes the difference between the input signal values, a second differencing circuit such as a transconductance amplifier that takes the difference between the two peak signal values, and a combining circuit such as a resistor circuit that additively combines the outputs of the differencing circuits in such a way as to compensate for direct-current offset in the input signals. Advantages of this circuit structure include reduced power consumption and simplified implementation in an integrated circuit. Low pass filters, capacitor discharging circuits, and unbalanced circuit elements can be used to obtain further advantages.
    Type: Grant
    Filed: January 10, 2003
    Date of Patent: October 24, 2006
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Tokio Miyasita
  • Patent number: 7126222
    Abstract: A semiconductor device is made up of a first insulating layer having a through hole; a first interconnection which comprises a first conductive layer, a first barrier layer, and a first main interconnection, and a second interconnection connected to one of the first conductive layer and the first barrier layer. Accordingly, the semiconductor device can avoid a problem so that the Cu of the first main interconnection transfers from a portion connected to the second interconnection due to cause electromigration, the connected portion becomes a void, and the first interconnection is disconnected to the second interconnection.
    Type: Grant
    Filed: December 14, 2004
    Date of Patent: October 24, 2006
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Yusuke Harada
  • Patent number: 7125766
    Abstract: A method of forming a capacitor for a semiconductor device is disclosed. According to the method, a silicon germanium layer and an oxide layer are used as mold layers for forming a storage electrode. The oxide layer and the silicon germanium layer are anisotropically etched to form an opening and then the silicon germanium layer is further isotropically etched to form a recessed portion of the opening, such that the recessed portion of the opening formed in the silicon germanium layer is wider than at least some portion of the opening through the oxide layer. Thus, the mold layers are used to form a storage electrode having a lower portion which is wider than an upper portion thereof.
    Type: Grant
    Filed: February 23, 2005
    Date of Patent: October 24, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-Chan Kim, Chang-Jin Kang, Byeong-Yun Nam, Kyeong-Koo Chi
  • Patent number: 7122486
    Abstract: CVD is performed without damaging a micro-fabricated semiconductor element. An organic material gas containing amine is used as deposition material gas. The material gas is introduced into a vacuum chamber and ultraviolet light radiated from each of lamps is applied onto an object to be processed that is placed in the chamber, thereby causing chemical vapor deposition to be carried out, whereby a film is grown at a temperature such that no damage is given to a semiconductor element or the like of the object.
    Type: Grant
    Filed: May 13, 2004
    Date of Patent: October 17, 2006
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Kiyohiko Toshikawa, Junichi Miyano