Patents Represented by Attorney, Agent or Law Firm Wells, St. John, Roberts, Gregory & Matkin, P.S.
  • Patent number: 6323104
    Abstract: A method of forming an integrated circuitry trench isolation region includes etching a first portion of an isolation trench into a semiconductor substrate. The first portion has laterally opposing sidewalls and a trench base extending therebetween. A second portion of the isolation trench is etched into the semiconductor substrate through only a portion of the first portion trench base. After the second etching, insulative trench isolation material is deposited to be received within the first and second portions of the isolation trench. In one implementation, a method of forming integrated circuitry includes forming a trench isolation region and an adjacent shallow junction region in a semiconductor substrate. The trench isolation region includes a sidewall adjacent the shallow junction region, the trench isolation region comprising at least two insulative trench isolation materials.
    Type: Grant
    Filed: March 1, 2000
    Date of Patent: November 27, 2001
    Assignee: Micron Technology, Inc.
    Inventor: Jigish D. Trivedi
  • Patent number: 6323080
    Abstract: The invention encompasses DRAM constructions, capacitor constructions, conductive contacts, integrated circuitry, methods of forming DRAM constructions, and methods of forming capacitor constructions.
    Type: Grant
    Filed: September 13, 2000
    Date of Patent: November 27, 2001
    Assignee: Micron Technology, Inc.
    Inventor: Kunal R. Parekh
  • Patent number: 6318381
    Abstract: In one aspect, the invention encompasses a method of utilizing a vaporization surface as an electrode to form a plasma within a vapor forming device. In another aspect, the invention encompasses a method of chemical vapor deposition. A vaporization surface is provided and heated. At least one material is flowed past the heated surface to vaporize the material. A deposit forms on the vaporization surface during the vaporization. The vaporization surface is then utilized as an electrode to form a plasma, and at least a portion of the deposit is removed with the plasma.
    Type: Grant
    Filed: July 13, 1999
    Date of Patent: November 20, 2001
    Assignee: Micron Technology, Inc.
    Inventor: Eugene P. Marsh
  • Patent number: 6320246
    Abstract: The invention includes a semiconductor wafer assembly, comprising: a) a semiconductor wafer substrate; and b) alternating first and second layers over the semiconductor wafer substrate, the alternating layers comprising at least one first layer and at least one second layer, the first layer comprising a first material and the second layer comprising a second material, the second material comprising atoms selected from the group consisting of yttrium, lanthanides, actinides, calcium, magnesium and mixtures thereof.
    Type: Grant
    Filed: April 24, 2000
    Date of Patent: November 20, 2001
    Assignee: Micron Technology, Inc.
    Inventor: Terry Gilton
  • Patent number: 6319644
    Abstract: Methods of reducing proximity effects in lithographic processes wherein an integrated circuitry pattern is transferred from a mask onto a semiconductor substrate are described. In one embodiment, a desired spacing is defined between a main feature which is to reside on a mask and which is to be transferred onto the substrate, and an adjacent proximity effects-correcting feature. After the spacing definition, the dimensions of the main feature are adjusted relative to the proximity effects-correcting feature to achieve a desired transferred main feature dimension. In another embodiment, a desired spacing is defined between a main feature having an edge and an adjacent sub-resolution feature. The edge of the main feature is moved relative to the sub-resolution feature to achieve a desired transferred main feature dimension.
    Type: Grant
    Filed: February 12, 2001
    Date of Patent: November 20, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Christophe Pierrat, James E. Burdorf, William Baggenstoss, William Stanton
  • Patent number: 6319832
    Abstract: In one aspect, the invention encompasses a semiconductor processing method of forming a metal-comprising layer over a substrate. A substrate is provided within a reaction chamber, and a source of a metal-comprising precursor is provided external to the reaction chamber. The metal-comprising precursor comprises a metal coordinated with at least one Lewis base to form a complex having a stoichiometric ratio of the at least one Lewis base to the metal. An amount of the at least one Lewis base is distributed within the source to an amount that is in excess of the stoichiometric ratio. At least some of the metal-comprising precursor is transported from the source to the reaction chamber. A metal is deposited from the metal-comprising precursor and onto the substrate within the reaction chamber. In another aspect, the invention encompasses a method of storing a metal-comprising material. A metal-comprising material is dispersed within a solution.
    Type: Grant
    Filed: February 19, 1999
    Date of Patent: November 20, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Stefan Uhlenbrock, Brian A. Vaartstra
  • Patent number: 6319381
    Abstract: Methods of forming face plate assemblies are described. In one implementation, a substrate is patterned with photoresist and a first phosphor-comprising material is formed over first surface areas of the substrate. The photoresist is stripped leaving some of the first phosphor-comprising material over substrate areas other than the first areas. Photoresist is again formed over the substrate and processed to expose second substrate areas which are different from the first substrate areas. In a preferred aspect, processing the photoresist comprises using a heated aqueous developing solution comprising an acid, e.g. lactic acid, effective to dislodge and remove first phosphor-comprising material from beneath the developed photoresist. A second phosphor-comprising material is formed over the substrate and the exposed second areas, with trace deposits being left over other substrate areas.
    Type: Grant
    Filed: June 11, 1998
    Date of Patent: November 20, 2001
    Assignee: Micron Technology, Inc.
    Inventor: Jefferson O. Nemelka
  • Patent number: 6316353
    Abstract: A method of forming a conductive connection between a first region and a second region includes forming a first titanium comprising layer over and in electrical connection with the first region. The first layer is exposed to a nitrogen containing plasma effective to transform at least an outer portion thereof into a second layer comprising titanium nitride. An elemental titanium comprising third layer is formed over the second layer. The third layer is exposed to a nitrogen containing plasma effective to transform at least an outer portion thereof into a layer comprising titanium nitride. The second region is formed over and in electrical connection with the transformed third layer. A method of forming a conductive line includes a conductively doped silicon comprising semiconductive material being formed. Titanium is deposited over the semiconductive material to form a first layer in electrical connection with the semiconductive material.
    Type: Grant
    Filed: February 18, 1999
    Date of Patent: November 13, 2001
    Assignee: Micron Technology, Inc.
    Inventor: Adam D. Selsley
  • Patent number: 6316372
    Abstract: In one aspect, the invention includes a semiconductor fabrication process, comprising: a) providing a substrate; b) forming a layer of silicon nitride over the substrate, the layer having a thickness; and c) enriching a portion of the thickness of the silicon nitride layer with silicon, the portion comprising less than or equal to about 95% of the thickness of the layer of silicon nitride. In another aspect, the invention includes a semiconductor fabrication process, comprising: a) providing a substrate; b) forming a layer of silicon nitride over the substrate, the layer having a thickness; and c) increasing a refractive index of a first portion of the thickness of the silicon nitride layer relative to a refractive index of a second portion of the silicon nitride layer, the first portion comprising less than or equal to about 95% of the thickness of the silicon nitride layer.
    Type: Grant
    Filed: April 7, 1998
    Date of Patent: November 13, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Scott Jeffrey DeBoer, John T. Moore, Randhir P. S. Thakur, Mark Fischer
  • Patent number: 6316975
    Abstract: A radio frequency identification device comprises an integrated circuit including a receiver, a transmitter, and a microprocessor. The receiver and transmitter together define an active transponder. The integrated circuit is preferably a monolithic single die integrated circuit including the receiver, the transmitter, and the microprocessor. Because the device includes an active transponder, instead of a transponder which relies on magnetic coupling for power, the device has a much greater range.
    Type: Grant
    Filed: September 28, 1998
    Date of Patent: November 13, 2001
    Assignee: Micron Technology, Inc.
    Inventors: James E. O'Toole, John R. Tuttle, Mark E. Tuttle, Tyler Lowery, Kevin M. Devereaux, George E. Pax, Brian P. Higgins, David K. Ovard, Robert R. Rotzoll, Shu-Sun Yu
  • Patent number: 6315344
    Abstract: A grapple positioning device is described for attachment to a grapple and boom, wherein the grapple is pivotably mounted to an end of the boom. The device includes an extensible ram mountable to the boom and extending to a pusher plate. A follower is mountable to the grapple, and the ram is operable to extend and move the pusher plate against the follower and thereby pivot the grapple away from the boom. The ram is also operable to retract to move the pusher plate in a direction toward the boom and away from the follower.
    Type: Grant
    Filed: June 19, 2000
    Date of Patent: November 13, 2001
    Inventors: Randall D. Mattson, Todd R. Brusell
  • Patent number: 6314860
    Abstract: A ram cylinder piston stroke stop is disclosed, including a pair of opposed piston shaft gripping members each formed in an extruded shape along an axis with an integral extruded axially open spring end receiving socket. A spring includes opposed ends that are engaged within the spring end receiving sockets.
    Type: Grant
    Filed: June 7, 2000
    Date of Patent: November 13, 2001
    Inventor: Gregory Stanley Paulus
  • Patent number: 6316518
    Abstract: The invention includes a method of increasing polymerization within a condensation polymer. A substantially dry condensation polymer material is provided. The material is exposed to radiation having a frequency less than microwave frequency for a time of at least about 0.5 hour to increase an amount of polymerization within the material. The invention also includes a method of treating a polyamide material. A polymeric polyamide material is provided and exposed to first radiation having a first power intensity. The material is then exposed to second radiation having a second power intensity. The first power intensity is higher than the second power intensity. Additionally, the invention includes an apparatus. The apparatus includes an inlet port through which a feed material enters the apparatus, and an outlet port through which the feed material passes out of the apparatus.
    Type: Grant
    Filed: February 3, 2000
    Date of Patent: November 13, 2001
    Assignee: Advanced Polymer Technology, Inc.
    Inventors: L. Myles Phipps, Eric J. Swenson
  • Patent number: 6313496
    Abstract: The invention comprises capacitors and methods of forming capacitors. In one implementation, a method of forming a capacitor includes forming a first capacitor electrode. An Si3N4 comprising capacitor dielectric layer is formed over the first capacitor electrode. The Si3N4 comprising layer is oxidized in the presence of a chlorine containing atmosphere under conditions which form a silicon oxynitride layer comprising chlorine atop the Si3N4 layer. In one aspect, the oxidizing sequentially comprises a dry oxidation in the presence of an oxygen containing gas in the substantial absence of chlorine, a dry oxidation in the presence of a gas comprising oxygen and chlorine, and a wet oxidation comprising chlorine. A second capacitor electrode is formed over the chlorine containing silicon oxynitride layer. In one implementation, a method of forming a capacitor comprises forming a first capacitor electrode.
    Type: Grant
    Filed: August 31, 2000
    Date of Patent: November 6, 2001
    Assignee: Micron Technology, Inc.
    Inventor: Todd E. Smith
  • Patent number: 6312988
    Abstract: Methods of forming capacitors, methods of forming capacitor-over-bit line memory circuitry, and related integrated circuitry constructions are described. In one embodiment, a capacitor storage node is formed having an uppermost surface and an overlying insulative material over the uppermost surface. Subsequently, a capacitor dielectric functioning region is formed discrete from the overlying insulative material operably proximate at least a portion of the capacitor storage node. A cell electrode layer is formed over the capacitor dielectric functioning region and the overlying insulative material. In another embodiment, a capacitor storage node is formed having an uppermost surface and a side surface joined therewith. A protective cap is formed over the uppe-most surface and a capacitor dielectric layer is formed over the side surface and protective cap. A cell electrode layer is formed over the side surface of the capacitor storage node.
    Type: Grant
    Filed: September 2, 1999
    Date of Patent: November 6, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Tyler A. Lowrey, Luan C. Tran, Alan R. Reinberg, D. Mark Durcan
  • Patent number: 6313748
    Abstract: The invention encompasses an electrical apparatus. Such apparatus comprises a first substrate having first circuitry supported thereby. The first circuitry defines at least a portion of a radio frequency identification device. At least one first electrical node is supported by the substrate and in electrical connection with the first circuitry. The apparatus further comprises an input device comprising a second substrate and second circuitry on the second substrate. The second circuitry is in electrical communication with at least one second electrical node. Neither of the first nor second electrical nodes is a lead, and the second electrical node is adhered to the first electrical node to electrically connect the input device with the radio frequency identification device. The invention also encompasses a termite-sensing apparatus. Additionally, the invention encompasses methods of forming electrical apparatuses, and methods for sensing termites.
    Type: Grant
    Filed: August 27, 1999
    Date of Patent: November 6, 2001
    Assignee: Micron Technology, Inc.
    Inventor: Rickie C. Lake
  • Patent number: D450508
    Type: Grant
    Filed: January 31, 2001
    Date of Patent: November 20, 2001
    Inventor: Joseph Simonsen
  • Patent number: D450714
    Type: Grant
    Filed: November 9, 2000
    Date of Patent: November 20, 2001
    Assignee: Kim Hotstart Mfg. Co.
    Inventor: Joe W. Gaylord
  • Patent number: D450985
    Type: Grant
    Filed: October 8, 1999
    Date of Patent: November 27, 2001
    Inventor: Gary Lynn Kiehl
  • Patent number: D451055
    Type: Grant
    Filed: March 22, 2001
    Date of Patent: November 27, 2001
    Inventor: Ernest John Wilmot