Patents Represented by Attorney William W. Holloway, Jr.

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  • Control unit for a microprogrammed computer with overlapping of the executive and interpretative phase of two subsequent microinstructions
    Patent number: 3956738
    Abstract: An apparatus is disclosed for calling a microinstruction stored in main memory while another microinstruction from main memory is executing, thus permitting an overlap of the executing phase with the call phase of an instruction. A hardware sequencer examines predetermined characteristics of an executing microinstruction and takes appropriate action in response to such examination.
    Type: Grant
    Filed: September 24, 1974
    Date of Patent: May 11, 1976
    Assignee: Honeywell Information Systems, Inc.
    Inventor: Giancarlo Tessera
  • System for extending the interior decor of a microprogrammed computer
    Patent number: 3949372
    Abstract: The system discriminates between "allowed" and "forbidden" machine instructions by interpreting coded digital words found in an auxiliary memory. "Allowed" instructions found in the microprogramming memory are directly executed. "Forbidden" instructions lead to the execution of exception routines, which determine if the instruction is an "additional" instruction which has a microprogram for its execution in working memory. If so, working memory is accessed and the machine instruction is executed.
    Type: Grant
    Filed: October 2, 1974
    Date of Patent: April 6, 1976
    Assignee: Honeywell Information Systems, Inc.
    Inventor: Antonio Brioschi
  • Input-output system having cyclical scanning of interrupt requests
    Patent number: 3949371
    Abstract: A system is disclosed for controlling access to a central information processor by a plurality of peripheral devices. The system determines access on the basis of a (1) predetermined hierarchical priority order and (2) a cyclical scanning process. To achieve this, a system of hierarchically organized priority levels is combined with a system of cyclical scanning in a manner such that no single device may monopolize the central processor.
    Type: Grant
    Filed: August 7, 1974
    Date of Patent: April 6, 1976
    Assignee: Honeywell Information Systems, Inc.
    Inventor: Renzo Pederzini