Abstract: A soft cache system compares tag bits of a virtual address with tag fields of a plurality of soft cache register entries, each entry associated with an index to a corresponding cache line in virtual memory. A cache line size for the cache line is programmable. When the tag bits of the virtual address match the tag field of one of the soft cache entries, the index from that entry is selected for generating a physical address. The physical address is generated using the selected index as an offset to a corresponding soft cache space in memory.

Abstract: A method and system for qualifying an oxide-nitride-oxide (QNO) layer including a first oxide layer, a nitride layer and a control oxide layer in a semiconductor device is disclosed. The method and system including determining a first plurality of dielectric breakdown voltages and a first plurality of lifetimes and determining a second plurality of dielectric voltages and a second plurality of lifetimes. The first plurality of dielectric breakdown voltages and lifetimes being determined utilizing a plurality of ramp rates for a first plurality of ONO layers having a particular nitride layer thickness and a plurality of control oxide layer thicknesses. The second plurality of dielectric breakdown voltages and lifetimes layer being determined utilizing the plurality of ramp rates for each of a second plurality of ONO layers having a particular control oxide layer thickness and a plurality of nitride layer thicknesses.

Abstract: A switched capacitor circuit 300, including a sampling capacitor 303, switches 301, 304 for charging the sampling capacitor 303 during a charging phase, and switches 302, 305 for transferring charge from the sampling capacitor 303 to a load 313 in the feedback loop of an operational amplifier 312 during a dump phase. Circuitry 701 controls the discharge of sampling capacitor 303 during the dump phase to minimize transients at the input of the operational amplifier 312 and thereby minimize input threshold voltage variation.

Abstract: A method and system for projecting an image. An image projection system may include a sensor configured to detect the presence of an observer within a proximity of a medium, e.g., screen, window. In response to the sensor detecting the presence of an observer within a proximity of the medium, one or more portions of the medium may be switched from a transparent state to a substantially translucent state. At a substantially concurrent time as switching the one or more portions of the medium to a substantially translucent state, an image may be projected onto such portion(s). Hence, an image may be displayed in response to detecting an observer within the proximity of the medium.

Abstract: In pause time based flow control systems having station-level granularity, a station or switch may detect congestion or incipient congestion and send a flow control frame to an upstream station, commanding that upstream station to temporarily stop (pause) sending data for a period of time specified in the flow control frame. The traffic pause gives the downstream station time to empty its buffers of at least some of the excess traffic it has been receiving. Since each downstream station operates independently in generating flow control frames, it is possible for the same upstream station to receive multiple, overlapping pause commands. If an upstream station which is already paused receives subsequent flow control frames from the same downstream station that triggered the pause, the upstream station's pause timer is rewritten using the pause times in the successive flow control frames.

Abstract: Before submitting a sample, including a first material layered upon a substrate, to an ion milling process, whereby a second material is sputtered onto the surface of the first material and the sample is then submitted to an etching process, an irregularity is formed on the surface of the first material. The overall process results in the formation of cones, or micro-tip structures, which may then be layered with a layer of low work function material, such as amorphous diamond. The irregularity in the surface of the first material may be formed by polishing, sandblasting, photolithography, or mechanical means such as scratching.

Abstract: The present invention provides a method and system for polishing a wafer surface. The method and system comprises determining whether a thickness of the wafer surface is uniform while the wafer surface is being polished, and adjusting the polishing process while the wafer surface is being polished based on the determination of whether the thickness of the wafer surface is uniform. Through the use of the method and system in accordance with the present invention, in-situ adjustments can be made to the CMP polishing process while the wafer is actually being polished. This results in a substantial improvement in polishing uniformity.

Abstract: When a riser card is connected to a computer system motherboard, a storage device on the riser card will contain configuration data permitting the computer system to configure any peripheral device on the riser card. The configuration data will be treated by the BIOS in the computer system as a virtual add-on ROM thereby allowing it to execute and initialize any and all PCI configuration spaces associated with the riser card peripheral devices.

Abstract: A method for removing polysilicon from isolation regions on a substrate during semiconductor fabrication is disclosed. The method includes depositing a layer of polysilicon over the substrate, and depositing at least one dielectric layer over the polysilicon. The method further includes polishing the polysilicon from the isolation regions, wherein the dielectric layers act as a polishing stop, resulting in regions of polysilicon that are self-aligned to the trench isolation regions.

Abstract: A system normally converts a parallel data word to a single serial data stream to use a high speed serial link. The parallel data word is partitioned into N sub-sets or nibbles and each nibble is then serialized and transmitted over N serial links using high speed differential drivers. Each of the N serialized nibbles are received in a differential receiver. The serialized nibbles are then coverted back into N parallel nibbles and the N parallel nibbles are then assembled back to the original parallel data word. To increase reliability, the received data is coupled to a tapped delay element having M stages of delay. A training sequence and algorithm are used to determine which of the taps of the delay element are a desired delay distance away from data transitions. These taps are then used to sample the incoming signals to reconstruct the parallel data word.

Abstract: An integrated analog to digital and sample rate converter 206 includes sampling circuitry 207 for receiving an analog signal and generating a single or multibit stream of digital signals at a first rate. A leaky integrator filter 208 removes quantization noise from the stream of samples such that resampling can be carried out. Circuitry 209/210 resamples the filtered stream of samples output from leaky integrator filter 208 to generate an output stream of samples at a second rate.

Abstract: A Schematic database defining a Schematic is checked and saved. Multiple programs affected by the Logic of the VLSI Schematic are launched along with a Checking program that extracts data related to the Logic of the VLSI Schematic design and other data that may be necessary but is not related to the Logic of the VLSI Schematic design. The Schematic design programs operate as executable program states with each program state having program data inputs and outputs and program logic inputs and outputs. Once the method is started, a designer simply corrects errors that occur and then restarts the Schematic design process. If changes in the Schematic database do not affect the Logic then Logic related programs states are stopped and programs for correcting non Logic related changes are run. Program output data may be conditional with errors or unconditional without errors depending on operational modes.

Abstract: A method for repairing an isolation dielectric damaged during a semiconductor fabrication process is disclosed in which a hard mask material is used to pattern a first material, the first material having openings therein exposing isolation regions comprising a first isolation dielectric layer. The method includes etching the hard mask material from the first material, wherein the etch creates gouges in the first isolation dielectric layer, and depositing a second layer of isolation dielectric over the first material, wherein the second isolation dielectric layer fills the gouges in the first isolation dielectric layer. The method further includes polishing on the second layer of isolation dielectric to remove the second layer of isolation dielectric from the first material.

Abstract: Via holes are formed in an electrically conductive power plane. Photo-imageable dielectric (PID) material is applied to one side of the power plane filling the via holes. The power plane side with no PID material is exposed to light energy to cure the PID material in the via holes. A developer is used to remove any uncured PID material. Signal plane assemblies comprising a conductive signal plane and a dielectric layer are laminated onto the filled power plane forming a two signal and one power plane (2S1P) structure. In another embodiment, the power plane has PID material applied from both sides. A photo-mask is applied to the power plane and the PID material in the via holes is cured with light energy. A developer is used to remove uncured PID material. Signal plane assemblies, as described above, are laminated onto the filled power plane forming a 2S1P structure.

Abstract: A flow control process for a switching system having at least one switch core connected through serial communication links to remote and distributed Protocol Adapters or Protocol Engines through Switch Core Access Layer (SCAL) elements. For each input port i, the SCAL element contains a receive Protocol Interface corresponding to the adapter assigned to the input port i and a first serializer for providing attachment to the switch core by means of a first serial communication link. When the cells are received in the switch core, they are deserialized by means of a first deserializer. At each output port, the cells are serialized again by means of a second serializer and then transmitted via a second serial communication link, to the appropriate SCAL. The SCAL contains a second deserializer and a transmit Protocol Interface circuit for permitting attachment of the Protocol Adapter.

Abstract: A method for reducing nitride residue from a silicon wafer during semiconductor fabrication. The wafer includes a nitride mask defining active regions and isolation regions wherein the isolation regions are formed by trenches. The method includes providing an optimized oxide deposition process in which a temperature gradient of a CVD chamber is improved by performing the following steps. First, at least one silicon wafer is placed into the chamber on a quartz boat having an increased slot size, preferably at least 6 mm. Second, the quartz boat is centered in approximately a center of the chamber so that the wafer is located in a center section of the chamber to avoid the temperature gradient at the ends of the chamber, such that when oxide gas is injected onto the wafer, an oxide layer having a substantially uniform thickness is formed on the wafer.

Abstract: A method and apparatus for automatically generating a log, or journal, during the deployment of software packages to client systems on a network are implemented. The logs may be used to verify the deployment and facilitate selectively deployment of components not successfully deployed. The mechanism rests on an object-oriented architecture that provides a multiplicity of actions that effects software management operations on the target system. The actions are implemented as methods within the object oriented architecture. In this way, each software element, for example, registry entries, files, directories, etc., which may be implicated in a software deployment are treated on an equal footing. The mechanism automatically generates a log file based on the actions contained within the particular deployment package.

Abstract: A server-side mechanism together with an optional client-side decompression process enhance server content delivery. The server-side mechanism preferably comprises a pair of processes: a daemon process and a servlet process. The daemon process recursively compresses directories of content (HTML, graphics files, and the like) while instances of the servlet process, in parallel, serve content. When a target directory is completely compressed, the files which previously existed in an uncompressed state are either archived or deleted. The servlet process interprets the compressed objects, resolving the connection between the client and server, and serves out the requested content. If the request originates from a client that is not enabled to decompress files, the servlet decompresses the requested files on-the-fly. When supported on a given client machine, the client process decompresses the streaming content for use on the client system.

Abstract: A system and method detecting the presence of polysilicon stringers on a memory array using a polysilicon stringer monitor. The polysilicon stringer monitor includes a continuous type-2 layer of polysilicon forming a first row and a second row across the active region and covering the active region in-between the first and second rows. The polysilicon stringer monitor further includes a continuous type-1 layer of polysilicon extending under the first row, wherein the type-1 layer also covers the active area in-between the first and second rows as well as covers the active area under the second row.

Abstract: A field emission cathode device consisting of an electrically conducting material and with a narrow, rod-shaped geometry or a knife edge, to achieve a high amplification of the electric field strength is characterized in that the electron-emitting part of the field emission cathode at least partly has preferred cylindrical host molecules and/or compounds with host compounds and/or cylindrical atomic networks, possibly with end caps with diameters measuring in the nanometer range.