Abstract: In a semiconductor device (4), a semiconductor chip (10) is mounted on a die pad (6) which has a die pad overhang portion (6a) and leads (9) are arranged around and apart from the die pad (6). The leads (9) and the semiconductor chip (10) are electrically connected and are covered with a sealing resin (8). A concave portion (7e) is formed on the outer side of each lead (9), i.e., the far side from the die pad. A lead concave surface (7d) facing the concave portion (7e) includes a forward-tapered lead slope surface (7h). Side surface of the sealing resin (8) has a step of a staircase shape formed from the first and the second resin side surfaces (8a and 8b). A tip of the lead (9) protrudes past the first resin side surface (8a).

Abstract: A charge-discharge control circuit includes a positive power-supply terminal; a negative power-supply terminal; a charge-discharge discrimination circuit which discriminates a discharging state in which a discharging current flows and a charging state in which a charging current flows based on a voltage at a charge-discharge path and a preset charge-discharge discrimination voltage; and a control circuit which turns on a discharge control FET and a charge control FET in a charge-inhibition state and the discharging state or turns off the charge control FET in the charge-inhibition state and the charging state.

Abstract: Provided is a magnetic sensor circuit and includes: a magnetic sensor outputting a first sensor signal based on a magnetic flux density in a first direction; a magnetic sensor outputting a second sensor signal based on a magnetic flux density in a second direction orthogonal to the first direction; a signal processing circuit respectively obtaining a first detection signal and a second detection signal which transition between low and high levels based on the first magnetic sensor signal and the second magnetic sensor signal; a driver outputting a first output voltage based on the first detection signal; a driver outputting a second output voltage based on the second detection signal; and a voltage monitoring circuit generating mode signals whose signal levels transition based on transitions of voltage levels of the first output voltage and the second output voltage input thereto.

Abstract: A second source portion having an impurity concentration lower than that of a first source portion, both forming a source region, includes a first sub-portion having a depth from a bottom surface of the first source portion down to a second height higher than a first height, and a second sub-portion having an upper surface in contact with a part of a bottom surface of the first sub-portion, one side surface in a second direction perpendicular to a first direction in contact with an outer side surface of the trench, another side surface in the second direction, both side surfaces in the first direction, and a bottom surface in contact with the base layer, and having a depth from a bottom surface of the first sub-portion up to at least the first height.

Abstract: A semiconductor device includes a semiconductor substrate, a trench provided in the semiconductor substrate, a trench gate formed in the trench, a vertical transistor having the trench gate, an active region having the vertical transistor, a field region surrounding the active region and having a protection diode, and a field insulating film formed on a surface of the semiconductor substrate, the protection diode being formed on the field insulating film. The trench gate includes a first polysilicon layer and has an embedded part embedded in the trench and an extension part connected to the embedded part and extending onto the surface of the semiconductor substrate, the protection diode includes a second polysilicon layer thicker than the first polysilicon layer, and an overlapping part having the second polysilicon layer is formed on the extension part.

Abstract: Provided is a semiconductor light detection device having a relatively high detection sensitivity to a light component of a specific wavelength. The semiconductor light detection device includes: a semiconductor light receiving element, in which a first conductive layer is formed on a surface of a semiconductor substrate, a second conductive layer is formed below the first conductive layer, a third conductive layer is formed below the second conductive layer, and a photocurrent based on the intensity of incident light is output from the third conductive layer while an input voltage is applied to the first conductive layer; and a semiconductor detection circuit configured to output an output voltage based on a current difference between a first photocurrent and a second photocurrent being output in response to the application of the first input voltage and the second input voltage, respectively.

Abstract: A switching regulator has an error amplifier supplying an error current, a phase compensation portion generating an error voltage, a clamper clamping the error voltage, a PFM detector supplying a comparison result signal of a first level or a comparison result signal of a second level based on the error current, an oscillator supplying a clock signal in response to the comparison result signal at the second level and fixing the clock signal in response to the comparison result signal at the first level, and a PWM converter turning on/off a switching element with a desired pulse width based on the error voltage and the output from the oscillator.

Abstract: A semiconductor device includes a semiconductor substrate; a vertical Hall element including a magnetosensitive portion, and formed in the semiconductor substrate; and an excitation wiring provided above a surface of the semiconductor substrate and apart from the magnetosensitive portion. The excitation wiring is formed of a single wiring with a plurality of turns. The excitation wiring includes a plurality of main wiring portions arranged side by side, and apart from one another in an overlapping region that overlaps the magnetosensitive portion as viewed in plan view from a direction orthogonal to the surface of the semiconductor substrate; and auxiliary wiring portions connecting each of the plurality of main wiring portions to one another in series.

Abstract: A stress compensation control circuit of the present invention is provided which is capable of using a compensation error similar to that at room temperature even at a high temperature and reducing the area of a chip for a semiconductor sensor as compared with the related art. The stress compensation control circuit compensates for a change in detection sensitivity due to a stress to be applied to the semiconductor sensor. The stress compensation control circuit includes a stress compensation voltage generating circuit generating a stress compensation voltage corresponding to the applied stress in accordance with a difference between changes in transconductance due to stresses in a first depletion transistor and a first enhancement transistor, and performs compensation for the detection sensitivity in correspondence to the stress applied to the semiconductor sensor.

Abstract: A thin film resistor includes a high-resistance region and low-resistance regions which are formed at both ends of the high-resistance region. The high-resistance region includes first high-resistance regions and a second high-resistance region, and the first high-resistance regions are arranged at both side surfaces in a first direction in the second high-resistance region. The second high-resistance region has a higher sheet resistance than that of the first high-resistance regions.

Abstract: In the semiconductor device, a high-concentration diffusion layer and a low-concentration diffusion layer are disposed around a drain diffusion layer of an ESD protection element. The high-concentration diffusion layer is separated from a gate electrode, and a medium concentration LDD diffusion layer is disposed in a separation gap. Variations in characteristics are suppressed by reducing thermal treatment on the high-concentration diffusion layer and a medium concentration diffusion layer.

Abstract: The semiconductor device includes a Hall element, a first differential pair, a second differential pair, an output amplifier circuit, and a voltage divider circuit. The Hall element outputs a signal that is dependent on stress to be applied to a semiconductor substrate to the first differential pair. The voltage divider circuit divides a voltage into a divided voltage having a voltage dividing ratio that is dependent on the stress. The first differential pair outputs a first current based on the signal. The second differential pair outputs a second current based on the divided voltage and a reference voltage. The output amplifier circuit outputs a voltage based on the first and second currents. A gain of the output amplifier circuit is approximated by a sum of a difference between stress dependence coefficients of transconductances of the first and second differential pairs and a stress dependence coefficient of the voltage dividing ratio.

Abstract: A magnetic sensor has a Hall IC that has a Hall element formed on a surface of the Hall IC, and a lead frame that supports the Hall IC. The lead frame includes a first region that is disposed in the vicinity of the Hall element and generates a first magnetic field due to a first eddy current generated when a measurement target magnetic field is applied, and second regions that are disposed away from the first region and generate a second magnetic field having an intensity that cancels the first magnetic field by means of second eddy currents generated when the measurement target magnetic field is applied.

Abstract: A voltage detector includes a first voltage detection circuit, a second voltage detection circuit, and a voltage divider circuit having a first node for providing a first divided voltage, and a second node for providing a second divided voltage. The second voltage detection circuit has a comparator circuit including a first input end connected to the first node and a second input end connected to a reference voltage. The first voltage detection circuit has a first NMOS transistor including a gate to which the second divided voltage is applied, and a constant current source with one end connected to the first NMOS transistor. The first NMOS transistor is configured to turn on in response to the second divided voltage being higher than a second threshold voltage and turn off in response to the second divided voltage being lower than the second threshold voltage.

Abstract: A semiconductor device includes a semiconductor substrate 10 of a first conductivity type, a vertical Hall element 100 provided on the semiconductor substrate 10, and an excitation conductor 200 provided directly above the vertical Hall element 100 with an intermediation of an insulating film 30. The vertical Hall element 100 includes a semiconductor layer 101 of a second conductivity type provided on the semiconductor substrate 10, and a plurality of electrodes 111 through 115 each constituted from a high-concentration second conductivity type impurity region and provided on the surface of the semiconductor layer 101 along a straight line. A ratio WC/WH between a width WC of the excitation conductor 200 and a width WH of each of the plurality of electrodes 111 through 115 satisfies 0.3?WC/WH?1.0.

Abstract: A plant cultivation system includes: a first sensor configured to output a sensor signal corresponding to an amount of water in a plant; a second sensor configured to output a sensor signal corresponding to a measurement value of an environment condition; and a controller, wherein the controller is configured to, by using a sensor signal from the first sensor obtained by the first sensor measuring a plant to be cultivated and a sensor signal from the second sensor obtained by the second sensor measuring an environment for cultivating the plant to be cultivated, control a specific environment parameter corresponding to the environment condition and measured by the second sensor, in a cultivation environment for the plant to be cultivated.

Abstract: An input circuit includes a first input transistor and a second input transistor connected to an input terminal; a current source which makes a current flow in the second input transistor through a current mirror; a switch provided between the current mirror and the current source, and having a switch control terminal connected to the drain of the first input transistor; and a transistor connected to the first input transistor, on/off of the transistor being controlled by an output signal, wherein a current drivability of the second input transistor is switched by an output signal, and a threshold voltage to the input signal is determined based on the current drivability of the second input transistor and the current source.

Abstract: To reduce effects of noise and improve detection accuracy, a sensor device includes: a detection electrode opposing an external electrode to which a predetermined voltage is applied, and configured to generate a voltage corresponding to a change in electrostatic capacitance; and a capacitive amplifier circuit having a first capacitor and a second capacitor connected in series to each other, and configured to detect the voltage generated in the detection electrode, and output a detection signal obtained by amplifying the voltage generated in the detection electrode based on a capacitance ratio between the first capacitor and the second capacitor.

Abstract: A semiconductor devices has a vertical Hall element formed on a semiconductor substrate, the vertical Hall element including a semiconductor layer of a second conductivity type formed above the semiconductor substrate; an impurity diffusion layer of the second conductivity type formed in an upper portion of the semiconductor layer and having a concentration higher than that of the semiconductor layer; a plurality of electrodes formed on a surface of the impurity diffusion layer, arrayed in a straight line, and each formed from an impurity region of the second conductivity type; a plurality of electrode isolation diffusion layers of the first conductivity type each formed between two adjacent electrodes; and a buried layer formed between the semiconductor substrate and the semiconductor layer, and having a concentration higher than that of the semiconductor layer and lower than that of the impurity diffusion layer.

Abstract: An optical sensor device has an optical semiconductor element fixed into a recessed portion of a base portion, and a pad portion of the optical semiconductor element is electrically connected to a lead portion of the base portion. On an upper surface of a protruding portion provided in an outer region of the base portion, a metallization layer having notch portions, a metal bonding layer, a metallization layer having notch portions, and a lid portion are provided. Through use of the metallization layers and the metal bonding layer, the lid portion can be hermetically bonded to the base portion.