Patents Assigned to Adtran
  • Patent number: 6466582
    Abstract: An arbitration mechanism is distributed among channel units of a statistically multiplexed frame relay switching system serving a plurality of access lines, the cumulative bandwidth of which exceeds that of an aggregate data link over which data is to be transported. For each access line, an arbitration code is generated. This code includes a transmit request or start bit, a calculated multibit arbitration value based upon a combination of parameters, including queuing delay and the configuration and traffic rate of the line, and an address code that identifies the physical location of the respective channel unit. All arbitration codes are readable by each frame relay channel unit via a wire-ORed bus. A channel unit participating in an arbitration cycle compares the value of its arbitration code with those of the other participants.
    Type: Grant
    Filed: December 17, 2001
    Date of Patent: October 15, 2002
    Assignee: Adtran, Inc.
    Inventors: W. Stuart Venters, Wade S. Schofield, Philip David Williams
  • Publication number: 20020146004
    Abstract: A packet flow control mechanism for a frame engine of a packet switch has a reduced complexity set of ‘nominal’ data flow path-based virtual functions, that process a packet based upon the state of the individual port. Code for the virtual function set can be installed in the instruction cache, by taking advantage of the fact that, once it has reached its steady state operation, the switch's frame engine can be expected to route packets over the nominal data flow path, with no conditional branching or function replacement. The actual function to which a respective virtual function points are dependent upon the signaling state and the level of congestion. For conditional branches, the frame engine may reference auxiliary memory, which stores a conditional state-based processing routine for handling exceptions to the nominal case.
    Type: Application
    Filed: April 4, 2001
    Publication date: October 10, 2002
    Applicant: ADTRAN, INC.
    Inventors: David Perkinson, Gaylon Buckelew, Michael J. Norton
  • Patent number: 6445719
    Abstract: A method, system and apparatus for decreasing the time frame synchronization and resynchronization in a data communication uses an long frame sync word formed by combining a frame sync word with stuff bits, wherein the stuff bits are necessary for timing adjustments.
    Type: Grant
    Filed: August 27, 1999
    Date of Patent: September 3, 2002
    Assignee: Adtran Inc.
    Inventors: Kevin W. Schneider, Jamie Kelly, Dennis B. McMahan, Marc Kimpe
  • Publication number: 20020118702
    Abstract: The range of digital data communication services, such as a basic rate 2B1Q ISDN channel, to customer premises located beyond the industry standard achievable range of a two-wire loop can be extended by increasing the capacity of the ISDN line code from two information bits per symbol to three information bits per symbol, so as to reduce the effective symbol rate, which is error correction encoded to an effective 4B1H line code for defining a sixteen level PAM signal waveform, and employing enhanced low signal-to-noise ratio signal processing techniques in both the transmitter and receiver to accommodate the increased insertion loss of the two-wire line resulting from its extended length. Such enhanced low signal-to-noise ratio signal processing techniques include a Tomlinson precoder in the transmitter, and an adaptive linear equalizer and a module unit in the receiver.
    Type: Application
    Filed: April 24, 2002
    Publication date: August 29, 2002
    Applicant: Adtran, Inc.
    Inventors: Michael D. Turner, Kevin W. Schneider, Richard A. Burch, Richard L. Goodson
  • Publication number: 20020114349
    Abstract: The inability of an ISDN equipment user to properly configure ISDN terminal equipment, even when provided with correctly assigned switch protocol, SPID and LDN parameters by a telephone service provider, is successfully remedied by a SPID/switch protocol detector. Upon being invoked by the user, the routine proceeds to conduct an iterative search of stored SPID formats associated with different central office switch protocols. SPIDs are assembled in accordance with the iteratively accessed SPID formats and directory number information that has been entered by the user. If an attempt to register a SPID is successful, the routine places a test call. If the test call is successful, the SPID and its associated switch protocol will have been identified, and the terminal equipment may place a call.
    Type: Application
    Filed: April 24, 2002
    Publication date: August 22, 2002
    Applicant: Adtran, Inc.
    Inventors: James M. Glass, Paul G. McElroy, Michael R. Lattanzi, Charles R. Rehage
  • Patent number: 6437574
    Abstract: An automated battery test system determines the performance capability of an auxiliary battery used as a back-up power source for an electrically powered system in the event of a deficiency in a primary power source. The test system periodically isolates the auxiliary battery from the primary power source and tests at least one electrical characteristic of the auxiliary battery, without preventing the auxiliary battery from being immediately reconnected with the primary power source in the event of a need for a back-up. A multiple alarm arrangement generates audible and visual alarms in response to a detected failure of the auxiliary battery.
    Type: Grant
    Filed: October 25, 2000
    Date of Patent: August 20, 2002
    Assignee: Adtran, Inc.
    Inventors: Steven M. Robinson, Ralph R. Boudreaux, Jr., Daniel M. Joffe, John S. McGary, James M. Glass
  • Patent number: 6438156
    Abstract: A distortion compensation filtering mechanism for a direct spread-spectrum radio receiver comprises an iteratively adaptive FIR filter installed in the received signal processing path of the radio just upstream of the despreading function. The filter may be implemented as a relatively small numbered tap filter, having its precursor tap fixed at a maximum value. The remaining filter tap values are individually adaptively adjusted by the radio's control processor, which executes a tap adjustment routine to iteratively increment or decrement each variable tap value of the FIR filter to an ‘optimized’ value, that effectively minimizes the total (I and Q) power in the error in the data decisions performed by data signal analyzer.
    Type: Grant
    Filed: February 11, 1999
    Date of Patent: August 20, 2002
    Assignee: Adtran, Inc.
    Inventors: Ayman K. Ghobrial, Steven R. Blackwell
  • Publication number: 20020103011
    Abstract: A loop-powered T1 digital radio is coupled to a powered T1 wireline. The radio not only interfaces digital T1 communication signals with the line, but is configured to extract and convert electrical power from the line to voltages necessary for operating the radio. The loop-powered T1 radio transmits and receives RF energy containing the T1 digital communication signals with respect to a remote digital radio, such as a ‘blue tooth’ type radio.
    Type: Application
    Filed: January 26, 2001
    Publication date: August 1, 2002
    Applicant: Adtran, Inc
    Inventors: Eric Malcolm Rives, David Hoy Nabors
  • Publication number: 20020093984
    Abstract: An arbitration mechanism is distributed among channel units of a statistically multiplexed frame relay switching system serving a plurality of access lines, the cumulative bandwidth of which exceeds that of an aggregate data link over which data is to be transported. For each access line, an arbitration code is generated. This code includes a transmit request or start bit, a calculated multibit arbitration value based upon a combination of parameters, including queuing delay and the configuration and traffic rate of the line, and an address code that identifies the physical location of the respective channel unit. All arbitration codes are readable by each frame relay channel unit via a wire-ORed bus. A channel unit participating in an arbitration cycle compares the value of its arbitration code with those of the other participants.
    Type: Application
    Filed: December 17, 2001
    Publication date: July 18, 2002
    Applicant: ADTRAN INC.
    Inventors: W. Stuart Venters, Wade S. Schofield, Philip David Williams
  • Patent number: 6404174
    Abstract: A programming circuit is coupled to an input/output pin of a device and is operative to generate a selected one of a plurality of electrical stimuli, such as a programming voltage, high and low logic levels, and a high impedance output, to the device in selected electrical state, without affecting normal device operation. The programming circuit includes a switchmode power converter, a linear regulator, and a control circuit. The programming voltage is generated by the switchmode power converter only when required for programming the device. The linear regulator includes a transistor having its collector-emitter path coupled in circuit with the switchmode converter and an output node, as well as to a voltage divider network. The voltage divider network is coupled to the control input of a precision shunt regulator device, which supplies a base reference for the transistor to establish the value of a voltage to be applied provided from the output node to the device.
    Type: Grant
    Filed: October 27, 2000
    Date of Patent: June 11, 2002
    Assignee: Adtran, Inc.
    Inventors: Ralph R. Boudreaux, Jr., Steven M. Robinson, John S. McGary
  • Publication number: 20020064171
    Abstract: A buffer delay control mechanism controls the operation of a packet buffer of a digitized packet-based transmission network. The packet buffer receives packets from the network and controllably reads out packets for application to a digitized packet signal processor. A nominal buffer delay is maintained in the absence of an increase in delay in receipt of packets from the network. In response to an increase in network delay, the buffer delay is increased, and thereafter maintained at the increased value in the absence of a further increase in delay in receipt of packets from the network. For any further increase in throughput delay, the buffer delay is again updated, so as to maintain the value of buffer delay at a value associated with maximum encountered transport delay through the network.
    Type: Application
    Filed: December 21, 2001
    Publication date: May 30, 2002
    Applicant: ADTRAN, INC.
    Inventor: R. Randall Belk
  • Patent number: 6396812
    Abstract: An auto-SPID detection routine is operative to conduct an iterative search of stored SPID formats associated with different central office switch protocols, based upon directory information including an area code supplied by a user. If an attempt to register a SPID is successful, the routine places a test call. If the test call is successful, the SPID and its associated switch protocol will have been identified, and the terminal equipment may place a call. If an attempt to register a SPID is unsuccessful, a determination is made as to whether the area code is a subdivided or split area code. If so, the routine is reexecuted using another area code derived from a split area code table.
    Type: Grant
    Filed: January 26, 2000
    Date of Patent: May 28, 2002
    Assignee: Adtran, Inc.
    Inventor: James M. Glass, III
  • Patent number: 6396846
    Abstract: To obviate the need to install a null card in a non-ISDN configured channel bank, an ISDN channel unit is modified to include an interface circuit that uses NMQ signals clocked by the bank controller on a shared NMQ lead to artificially generate a ‘pseudo NMP’ signal. This pseudo NMP signal and the NMQ signals enable the ISDN channel unit to conduct serial message exchanges with the bank controller during polling of an adjacent empty backplane card slot. The bank controller unit is thereby effectively ‘spoofed’ into thinking that a channel unit is installed in the empty backplane slot. It releases a pair of time slots associated with the adjacent empty card slot, so that the spoofing ISDN channel unit can use the usurped time slots for 2B+D ISDN communications.
    Type: Grant
    Filed: August 7, 1998
    Date of Patent: May 28, 2002
    Assignee: Adtran, Inc.
    Inventor: John P. Price
  • Patent number: 6396844
    Abstract: To provide either or both multiplexed and non-multiplexed (loop repeater) mode communications in the same equipment shelf between a network and plural subscriber circuits, a multi-mode backplane architecture includes a network interface multiplexer that provides time division multiplexed signal connectivity and point-to-point multiplexed signal connectivity between the network and line circuit access modules, to which the subscriber circuits are selectively ported. Each of a plurality of non-multiplexed interface connectors is configured for external connection to non-multiplexed communication links of the network and non-multiplexed communication links of the subscriber circuits. A plurality of access module card slots receive line circuit access modules that are individually programmable to provide a selected one of a plurality of diverse modes of telecommunication connectivity between the network and a subscriber circuit.
    Type: Grant
    Filed: October 9, 1998
    Date of Patent: May 28, 2002
    Assignee: Adtran, Inc.
    Inventors: David L. Mack, David R. Krueger, John B. Bartell
  • Patent number: 6396813
    Abstract: The inability of an ISDN equipment user to properly configure ISDN terminal equipment, even when provided with correctly assigned switch protocol, SPID and LDN parameters by a telephone service provider, is successfully remedied by a SPID/switch protocol detector. Upon being invoked by the user, the routine proceeds to conduct an iterative search of stored SPID formats associated with different central office switch protocols. SPIDs are assembled in accordance with the iteratively accessed SPID formats and directory number information that has been entered by the user. If an attempt to register a SPID is successful, the routine places a test call. If the test call is successful, the SPID and its associated switch protocol will have been identified, and the terminal equipment may place a call.
    Type: Grant
    Filed: January 26, 2000
    Date of Patent: May 28, 2002
    Assignee: Adtran, Inc.
    Inventors: James M. Glass, III, Paul G. MC Elroy, Michael T. Lattanzi, Charles R. Rehage
  • Patent number: 6393029
    Abstract: The range of digital data communication services, such as a basic rate 2B1Q ISDN channel, to customer premises located beyond the industry standard achievable range of a two-wire loop can be extended by increasing the capacity of the ISDN line code from two information bits per symbol to three information bits per symbol, so as to reduce the effective symbol rate, which is error correction encoded to an effective 4B1H line code for defining a sixteen level PAM signal waveform, and employing enhanced low signal-to-noise ratio signal processing techniques in both the transmitter and receiver to accommodate the increased insertion loss of the two-wire line resulting from its extended length. Such enhanced low signal-to-noise ratio signal processing techniques include a Tomlinson precoder in the transmitter, and an adaptive linear equalizer and a module unit in the receiver.
    Type: Grant
    Filed: November 10, 1999
    Date of Patent: May 21, 2002
    Assignee: Adtran, Inc.
    Inventors: Michael D. Turner, Kevin W. Schneider, Richard A. Burch, Richard L. Goodson
  • Patent number: 6377554
    Abstract: In a data communication system having a two or more channels of varying bandwidth and cost it is desirable to select a channel that meets data transfer needs and minimizes cost. In basic rate ISDN a D channel is typically used to provide low bandwidth service. When a user needs more bandwidth, the user switches to a B channel or two B channels. The automatic channel selection method and apparatus described provides a user with adjustable parameters to customize performance of a ISDN service unit. An anti-thrashing algorithm is provided to minimize frequent call setups and disconnects.
    Type: Grant
    Filed: July 24, 1998
    Date of Patent: April 23, 2002
    Assignee: Adtran, Inc.
    Inventors: Kyle A. Farnsworth, C. Brian Goodwin
  • Patent number: 6370125
    Abstract: A buffer delay control mechanism controls the operation of a packet buffer of a digitized packet-based transmission network. The packet buffer receives packets from the network and controllably reads out packets for application to a digitized packet signal processor. A nominal buffer delay is maintained in the absence of an increase in delay in receipt of packets from the network. In response to an increase in network delay, the buffer delay is increased, and thereafter maintained at the increased value in the absence of a further increase in delay in receipt of packets from the network. For any further increase in throughput delay, the buffer delay is again updated, so as to maintain the value of buffer delay at a value associated with maximum encountered transport delay through the network.
    Type: Grant
    Filed: October 8, 1998
    Date of Patent: April 9, 2002
    Assignee: Adtran, Inc.
    Inventor: R. Randall Belk
  • Patent number: 6370152
    Abstract: A simple network management protocol (SNMP) agent is distributed among individual channel units of frame relay switching system, rather than in a proxy device. The SNMP agent is implemented by encoding the identity of an individual channel device for whom a data packet is intended in the community data string portion of an SNMP packet. For a read request, the address of a channel unit is encoded as an augmented community string, such as “public.#”. For a write request, the address is encoded as an augmented community string, such as “private.#”.
    Type: Grant
    Filed: June 1, 1998
    Date of Patent: April 9, 2002
    Assignee: Adtran, Inc.
    Inventors: Wade S. Schofield, W. Stuart Venters, Philip David Williams
  • Publication number: 20020039404
    Abstract: A loop loss measurement and reporting mechanism for a digital data services unit obviates interaction with a test unit at a far end of the loop, by relying upon a priori knowledge of the signal power and spectral content of a data port at the far end of the loop to conduct threshold detection and power level measurements. A received signal is amplified by amplifier circuitry, the gain of which is controllably adjusted by the microcontroller based upon the outputs of threshold detectors and power level measurement circuitry that monitor the amplified received signal. A front panel display is controlled by the microcontroller to display loop loss parameter information. To measure and report loop loss, the digital data services unit turns off its transmitter for a prescribed period of time and monitors an in-band signal of known power and spectral content sourced from the far end of the loop.
    Type: Application
    Filed: June 26, 2001
    Publication date: April 4, 2002
    Applicant: Adtran, Inc.
    Inventors: Stacy Murphree, Jason N. Morgan