Abstract: An RF cable-less interconnect arrangement couples a diplexer to a radio transceiver by providing each of the transceiver and the diplexer by means of respective pairs of RF transmission and receiver channel connectors. The two sets of connectors are supported at a prescribed spatial separation for blind-mating RF connectivity for either of two orientations and translation (insertion) of the diplexer into the radio. Eliminating lossy and relatively fragile RF cable, that would otherwise occupy space within the radio's housing, and require installation by a skilled technician during assembly of the radio, allows the customer to easily change the radio's frequency plan by simply removing, rotating and reinserting the diplexer.
Abstract: An integrated access device is automatically configured to conduct packetized voice and data communications between a customer's voice/data equipment and a digital communications switch. For this purpose, the IAD's communication control processor is programmed to perform an automated analysis of the digital communications link and thereby identify communication interface circuits such as DSLAM and voice gateway units, that have been installed by the service provider. It then automatically configures the communication parameters of the IAD for communication compatibility with the communication interface circuits.
Type:
Application
Filed:
August 22, 2001
Publication date:
February 27, 2003
Applicant:
Adtran, Inc.
Inventors:
Paul Graves Mcelroy, Joseph Russell Mcfarland, Jonathan Aaron Wright
Abstract: Hardware and resource usage penalties associated with the conventional remote device management approach of occupying a robbed DS0 channel for only one management session at a time are obviated by programming a multi-digital circuit servicing host site-resident integrated access device to provide for effective simultaneous management of multiple remote digital communication devices by one or more workstations. Although only a single robbed in-band (T1) channel per remote site is used, it is unnecessary to terminate each high speed digital (T1) link with an associated T1 Service Unit and ISDN Service Unit pair at the central office site.
Abstract: A (DS3) network interface unit (NIU) by-pass architecture places the NIU on its own circuit card and exclusive of by-pass switching (and relay) components, which are installed in the equipment shelf, proper, so that physical removal of the NIU card will leave the by-pass circuitry intact. The by-pass circuit responds to an abnormality of the NIU card, such as malfunction or physical removal of the NIU from its card slot, and also to a power supply failure. It also contains an indicator to draw attention to a failed NIU, increasing the likelihood that someone will notice a damaged card.
Type:
Application
Filed:
October 5, 2001
Publication date:
February 20, 2003
Applicant:
Adtran, Inc.
Inventors:
David Eric Jones, Jason N. Morgan, Stacy Morris Murphree, Jason Ted Brock
Abstract: A channel interface architecture for a time division multiplexed (TDM) data communication system has a plurality of TDM communication ports coupled to serial TDM communication channels. The channel interface architecture interfaces data from any channel of any TDM communication port with any TDM communication channel of any other TDM communication port, on a per time slot/channel basis. The architecture includes a parallel data bus portion, an address bus portion, and a control portion. Each of a plurality of TDM communication channel interface units, associated with the ports, includes a multipage memory that stores data received from an associated serial communication link. The memory also selectively stores data that has been asserted onto the data bus portion of the bus architecture from another interface unit.
Type:
Grant
Filed:
January 26, 2000
Date of Patent:
February 18, 2003
Assignee:
Adtran Inc.
Inventors:
Kevin Paul Heering, Robert David Deaton, John Robert Coffman, III, Michael Francis Lamy
Abstract: A electrical power control mechanism ensures start-up of all telecommunication devices (repeaters and a remote terminal) along a span-powered wireline. Input voltage start-up thresholds of power control circuits at the devices are higher than the steady-state voltage across the repeater closest to the span supply, when the span voltage is at a minimum DC wireline voltage that sustains operation of all devices. The maximum input voltage start-up threshold of a device is less than the maximum voltage that could be applied during start-up, and the remote terminal has an input voltage start-up threshold value higher than that of any repeater. The maximum standby current of each device is specified, and input power is limited to its steady state maximum during start-up.
Type:
Application
Filed:
August 6, 2002
Publication date:
February 13, 2003
Applicant:
ADTRAN, INC.
Inventors:
Steven M. Robinson, Ralph R. Boudreaux, John S. McGary
Abstract: The currently defined industry standard framing structure for 2B1Q ISDN signaling, at 160 kilobaud, provides 128 kbps for a customer (B1, B2) data channel, and 16 kbps for a data (D) channel. Of the remaining 16 kbps non payload bandwidth, 4 kbps are used for overhead maintenance data. Eight kbps of the remaining 12 kbps of non payload bandwidth, that customarily transport a repeated framing pattern, are usurped for the transport of an auxiliary compressed (from 64 KHz to 8 KHz) digitized voice POTS channel, that is sufficient to transport toll quality voice. The remaining framing pattern bandwidth is adequate prevent an unacceptable reduction in bit error rate.
Type:
Grant
Filed:
July 9, 1999
Date of Patent:
February 11, 2003
Assignee:
Adtran, Inc.
Inventors:
Michael Scott Sansom, Timothy D. Rochell
Abstract: A search path recovery mechanism for a sequential decoder employs a prescribed self-concatenated “Loeliger” convolutional code, that is either decodable by the sequential decoder for data recovery, or is decodable (although sub-optimally) by a Viterbi decoder as an adjunct to the sequential decoder to improve statistics during path recovery. The Viterbi decoder is incorporated in an alternate decoder which includes metric calculators, that compute branch metrics, that are alternately coupled to the Viterbi decoder, operating at twice the symbol rate. Using estimate bits from the Viterbi decoder, a syndrome former estimates the recovered state and generates an estimate of the validity of the recovered state. Their validity is verified by a path recovery detector, which operates as a zero error detection filter by summing a prescribed number of previous syndrome former outputs.
Type:
Application
Filed:
April 30, 2002
Publication date:
February 6, 2003
Applicant:
Adtran, Inc.
Inventors:
Hans-Andrea Loeliger, Felix Tarkoy, Richard Goodson
Abstract: User participation in configuring parameters of a piece of frame relay communication equipment is eliminated by an automatic signaling role and protocol identification and configuration routine that is executed by the communication control processor of the frame relay communication equipment. The routine includes a precursor time out that effectively eliminates the undesirable likelihood of two or more devices reaching the same configuration. Once configured either as a switch or a user FRAD, the device is prevented from conducting any further polling or responding to polls by another device, so that the configuration cannot be altered, and the device is assured of complying with established telecommunications industry standards, such as Sprint frame relay certification.
Type:
Application
Filed:
July 24, 2001
Publication date:
January 30, 2003
Applicant:
Adtran, Inc.
Inventors:
David Perkinson, Gary Culp, W. Stuart Venters
Abstract: An upstream transceiver, coupled to an upstream end of a long haul, single digital subscriber loop of an extended range asymmetrical digital subscriber line communication system, ‘spoofs’ a (co-located) digital subscriber line access multiplexer to reduce its downstream data rate over a short haul loop to the upstream transceiver. The reduced downstream data rate is compatible with the data rate that can be supported by the long haul loop and also accommodates an auxiliary (64K) POTS channel thereover. The reduced data rate may be derived by preliminary signal quality measurements upon the long communication loop conducted between the upstream transceiver and a downstream transceiver coupled to a remote end of the long haul loop.
Type:
Application
Filed:
July 20, 2001
Publication date:
January 23, 2003
Applicant:
ADTRAN, INC
Inventors:
Thomas L. Ballard, John B. Wilkes, Kevin W. Schneider
Abstract: An autobaud mechanism is executed by transceivers coupled to opposite ends of a communication loop, such as an extended range SDSL loop, to resolve the maximum data rate that can be supported by the loop, using signal power and quality measurements to first estimate the length of the SDSL loop and thereafter iteratively adjust baud rate and/or number of bits/per baud, as necessary, to realize an SDSL baud rate that will ensure error-free transmission over the loop.
Type:
Application
Filed:
July 20, 2001
Publication date:
January 23, 2003
Applicant:
Adtran, Inc.
Inventors:
Jon Thomas Zakrzewski, Robert Allen Barrett, Thomas L. Ballard, John B. Wilkes
Abstract: Relatively low cost asymmetric digital subscriber line (ADSL) service and auxiliary POTS service are delivered over extended distances (e.g., at least 20-25 kft), by a hybrid ADSL-SDSL architecture insertable between central office and remote sites of an ADSL system. Central office and remote site transceivers employ trellis coded pulse amplitude modulation and a data rate that conforms with the signal transport capability of an extended distance symmetric DSL (SDSL) loop, while providing a 64K POTS channel. The central office and remote site transceivers controllably insert idle asynchronous transfer mode (ATM) cells in upstream and downstream ADSL channels to compensate for timing differences with ADSL equipment.
Type:
Application
Filed:
July 20, 2001
Publication date:
January 23, 2003
Applicant:
ADTRAN, INC.
Inventors:
Kevin W. Schneider, Thomas L. Ballard, John B. Wilkes, Philip David Williams, Gary M. Willoughby, Mark Jeffries Ogden, Michael Scott Sansom, W. Stuart Venters
Abstract: An analog input to an interpolation scheme for a digital signal processing receiver is digitized by an oversampling sigma-delta modulator running at a clock frequency that is a multiple of the nominal baud rate. The digitized signal sample stream and a delayed version thereof are shifted through finite impulse response (FIR) filters. The outputs of the FIR filters are coupled to a linear interpolator at a time determined by a carry-out of a divide-by-M counter, so as to decimate the digitized inputs to the FIR filters by the ratio of the oversampling clock to the baud clock. The control path to the interpolator includes a digital phase locked loop containing a linear canceler, to which data from an echo canceler and data decisions from an equalizer are supplied, and from which a timing error input is supplied to a loop filter.
Abstract: A dual mode phone line connectivity mechanism allows POTS access and digital transport access to coexist over the same local loop serving a customer site, while providing a net DS0 data rate for customer data communications (e.g., either 56 kbps or 64 kbps). When the customer's analog device is on-hook, the connectivity mechanism is configured to provide a digital path for the local loop, so that a digital link, exclusive of voice-processing, is established between a terminal adapter (or super-modem) and the service provider's line interface card, which replaces the voice path with a digital transceiver for the duration of the call. Local loop-associated and network-associated switches selectively provide one of two alternative signalling paths—a voice signalling path containing a codec for POTS signalling, and a data signalling path. A loop current detector monitors the local loop, while a network monitor circuit monitors the network for a ring command signal.
Type:
Application
Filed:
August 9, 2002
Publication date:
December 26, 2002
Applicant:
ADTRAN, INC.
Inventors:
Kevin W. Schneider, W. Stuart Venters, Michael Scott Sansom
Abstract: An active tracking filter reduces low frequency noise (such as a 20 Hz ringing signal) riding on a DC voltage (e.g., on the order of (−40 VDC) applied to a load such as a subscriber line interface circuit (SLIC). A controllable impedance device, such as a FET operating in its linear range, is coupled in circuit between a source of the DC voltage and the load. A low frequency voltage average detector circuit senses the average low frequency variation of the DC voltage. An output voltage sensor senses a DC output voltage at the output of the controllable impedance. A differential error amplifier circuit has a first input coupled to the low frequency voltage average detector circuit, a second input coupled to the output voltage sensor, and an output coupled to a control terminal of the controlled impedance device.
Type:
Grant
Filed:
September 18, 2000
Date of Patent:
December 3, 2002
Assignee:
Adtran, Inc.
Inventors:
Ralph R. Boudreaux, Jr., Steven M. Robinson, John S. McGary
Abstract: The transmission distance for DDS subscriber lines over a repeaterless four-wire link is extended to customer premises beyond the standard four-wire loop range of approximately 18 kft (56 kbps, 56 kbps with secondary channel capability, and 64 kbps) by employing commercially available ISDN transceiver chip hardware to multiplex a DDS data channel into quarter-rate (2B1Q) ISDN channels. At least one of a signalling channel and an out-of-band maintenance channel is used to convey differential delay compensation information, without modifying the framing structure of the transported channels, or requiring additional bandwidth for a separate framing channel.
Abstract: A digital communication link establishment control mechanism, termed ‘dial on off-hook’ (DOO) call routing, is incorporated into call routing control software employed by the microcontroller of an integrated access device (IAD). The DOO routine automatically routes an outgoing call to a user pre-specified destination number of a called circuit, in response to detecting an off-hook signaling state of the calling circuit. No user dialing is required.
Abstract: A binary decision tree-based arbitration scheme executable by a control processor of a time division multiplex (TDM)-based communication system is operative to select the next packet to be transmitted from a plurality of virtual circuits, any number of which may have one or more packets awaiting transmission over a serialized digital communication link. The transmission priority scheme contains N+1 sets of nodes containing 2N+1−1 nodes. A respective ith set of nodes comprises 2i−1 nodes, wherein i is greater than or equal to 1, and less than or equal to N+1. The nodes of a given set are connected to those of an adjacent set by binary-split branches. For each of the 2N leaf nodes of the decision tree, information is stored representative of the transmission priority of a packet awaiting transmission from its associated communication port.
Abstract: A packet analyzer for controlling a packet switch is segmented into a sequentially scanned array of packet analyzers, each of which is associated with a respectively different configuration function. When a packet is presented to the switch, a prescribed portion of the packet is sequentially coupled to the analyzers. As each analyzer examines the packet, it returns an indicator (e.g., ‘1’ or ‘0’) in accordance with whether the packet is associated with the configuration function of that analyzer. Once an analyzer indicates that it will accept the packet, the packet is forwarded to a stack associated with one or more virtual circuit ports embraced by that analyzer's configuration function, so that the packet may be forwarded to the appropriate virtual circuit output port, for transport over the network to a destination address.