Patents Assigned to Advanced Semiconductor Engineering, Inc.
  • Patent number: 11682684
    Abstract: An optical package structure and a method for manufacturing an optical package structure are provided. The optical package structure includes a sensor, an optical component and a fixing element. The optical component directly contacts the sensor. An interfacial area is defined by a contacting region of the optical component and the sensor. The fixing element is disposed outside of the interfacial area for bonding the optical component and the sensor.
    Type: Grant
    Filed: October 8, 2020
    Date of Patent: June 20, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Cheng-Ling Huang, Lu-Ming Lai, Ying-Chung Chen
  • Patent number: 11682660
    Abstract: The present disclosure provides a semiconductor structure including a first substrate having a first surface, a first semiconductor device package disposed on the first surface of the first substrate, and a second semiconductor device package disposed on the first surface of the first substrate. The first semiconductor device package and the second semiconductor device package have a first signal transmission path through the first substrate and a second signal transmission path insulated from the first substrate. The present disclosure also provides an electronic device.
    Type: Grant
    Filed: October 21, 2020
    Date of Patent: June 20, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Yuanhao Yu, Chun Chen Chen, Shang Chien Chen
  • Publication number: 20230187367
    Abstract: An electronic package structure includes a lower circuit pattern structure, an upper circuit pattern structure, a reflowable material and at least one core element. The upper circuit pattern structure is disposed above the lower circuit pattern structure. The reflowable material is disposed between the upper circuit pattern structure and the lower circuit pattern structure. The core element attaches to the reflowable material and is configured to inhibit displacement of the at least one core element during a reflow process.
    Type: Application
    Filed: December 10, 2021
    Publication date: June 15, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wei-Jen WANG, Po-Jen CHENG, Fu-Yuan CHEN, Kao Hsin CHEN
  • Publication number: 20230187374
    Abstract: An electronic device is disclosed. The electronic device includes a carrier having a first surface and a first lateral surface, an antenna adjacent to the first surface of the carrier, and a shielding layer covering a portion of the first lateral surface of the carrier. The shielding layer is configured to allow a gain of the antenna to be greater than 20 dB.
    Type: Application
    Filed: December 10, 2021
    Publication date: June 15, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hui-Ping JIAN, Ming-Hung CHEN, Jia-Feng HO
  • Publication number: 20230187387
    Abstract: A semiconductor device package includes a substrate and a shielding layer. The substrate has a first surface, a second surface opposite to the first surface and a first lateral surface extending between the first surface and the second surface. The substrate has an antenna pattern disposed closer to the second surface than the first surface. The shielding layer extends from the first surface toward the second surface of the substrate. The shielding layer covers a first portion of the first lateral surface adjacent to the first surface of the substrate. The shielding layer exposes a second portion of the first lateral surface adjacent to the second surface of the substrate.
    Type: Application
    Filed: February 14, 2023
    Publication date: June 15, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Jenchun CHEN, An-Ping CHIEN
  • Patent number: 11676912
    Abstract: A semiconductor device package and a method for manufacturing a semiconductor device package are provided. The semiconductor device package includes a substrate, a clip, and a support structure. The clip is disposed on the substrate. The clip includes a first portion and a second portion separated from each other by a slit. The support structure is above the substrate and supports the clip. The support structure has a first surface and a second surface facing the first surface, and the first surface and the second surface define a gap.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: June 13, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chia Hsiu Huang, Chun Chen Chen, Wei Chih Cho, Shao-Lun Yang
  • Patent number: 11675136
    Abstract: An optoelectronic structure includes a substrate, an electronic die and a photonic die. The electronic die is disposed on the substrate and includes a first surface, wherein the first surface is configured to support an optical component. The photonic die is disposed on the first surface of the electronic die and has an active surface toward the first surface of the electronic die and a side surface facing the optical component.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: June 13, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Jr-Wei Lin, Mei-Ju Lu
  • Publication number: 20230178444
    Abstract: A semiconductor package structure includes a circuit pattern structure, an encapsulant and an anchoring structure. The encapsulant is disposed on the circuit pattern structure. The anchoring structure is disposed adjacent to an interface between the encapsulant and the circuit pattern structure, and is configured to reduce a difference between a variation of expansion of the encapsulant and a variation of expansion of the circuit pattern structure in an environment of temperature variation.
    Type: Application
    Filed: December 3, 2021
    Publication date: June 8, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yung-Shun CHANG, Teck-Chong LEE
  • Patent number: 11670836
    Abstract: A semiconductor device package includes a substrate, an air cavity, a radiator, and a director. The substrate has a top surface. The air cavity is disposed within the substrate. The air cavity has a first sidewall and a second sidewall opposite to the first sidewall. The radiator is disposed adjacent to the first sidewall of the air cavity. The director is disposed adjacent to the second sidewall of the air cavity.
    Type: Grant
    Filed: October 29, 2020
    Date of Patent: June 6, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Ting Ruei Chen, Hung-Hsiang Cheng, Guo-Cheng Liao, Yun-Hsiang Tien
  • Patent number: 11670846
    Abstract: A semiconductor device package includes a substrate, a first antenna pattern and a second antenna pattern. The substrate has a first surface and a second surface opposite to the first surface. The first antenna pattern is disposed over the first surface of the substrate. The first antenna pattern has a first bandwidth. The second antenna pattern is disposed over the first antenna pattern. The second antenna pattern has a second bandwidth different from the first bandwidth. The first antenna pattern and the second antenna pattern are at least partially overlapping in a direction perpendicular to the first surface of the substrate.
    Type: Grant
    Filed: May 21, 2021
    Date of Patent: June 6, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Shao-En Hsu, Huei-Shyong Cho, Shih-Wen Lu
  • Patent number: 11664339
    Abstract: A package structure and a manufacturing method are provided. The package structure includes a first circuit layer, a first dielectric layer, an electrical device and a first conductive structure. The first circuit layer includes a first alignment portion. The first dielectric layer covers the first circuit layer. The electrical device is disposed on the first dielectric layer, and includes an electrical contact aligning with the first alignment portion. The first conductive structure extends through the first alignment portion, and electrically connects the electrical contact and the first alignment portion.
    Type: Grant
    Filed: April 21, 2020
    Date of Patent: May 30, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: You-Lung Yen, Bernd Karl Appelt
  • Patent number: 11664301
    Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes a substrate having a first surface and a second surface opposite to the first surface of the substrate. The substrate has a through opening extending between the first surface of the substrate and the second surface of the substrate. The semiconductor device package also includes a conductive pad in the through opening and approximal to the second surface of the substrate. The conductive pad has a first surface and a second surface opposite to the first surface of the conductive pad. The semiconductor device package also includes a conductive pillar in contact with the first surface of the conductive pad. The second surface of the conductive pad protrudes from the second surface of the substrate. A method of manufacturing a semiconductor device package is also disclosed.
    Type: Grant
    Filed: March 18, 2021
    Date of Patent: May 30, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: You-Lung Yen, Bernd Karl Appelt
  • Patent number: 11664580
    Abstract: A semiconductor package includes: (1) a package substrate including an upper surface; (2) a semiconductor device disposed adjacent to the upper surface of the package substrate, the semiconductor device including an inactive surface; and (3) an antenna substrate disposed on the inactive surface of the semiconductor device.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: May 30, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Han-Chee Yen
  • Patent number: 11655992
    Abstract: A measuring system includes a temperature-variable container, an optical device and an air conditioner. The temperature-variable container includes a transparent plate. The optical device includes a first optical sensor unit and a second optical sensor unit. The air conditioner is disposed between the transparent plate and the optical device.
    Type: Grant
    Filed: February 13, 2018
    Date of Patent: May 23, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chun Hung Tsai, Hsuan Yu Chen
  • Patent number: 11658170
    Abstract: The present disclosure provides a semiconductor package structure and a method of manufacturing the same. The semiconductor package structure includes a substrate, a first electronic component, an interlayer, a third electronic component and an encapsulant. The first electronic component is disposed on the substrate. The first electronic component has an upper surface and a lateral surface and a first edge between the upper surface and the lateral surface. The interlayer is on the upper surface of the first electronic component. The third electronic component is attached to the upper surface of the first electronic component via the interlayer. The encapsulant encapsulates the first electronic component and the interlayer. The interlayer does not contact the lateral surface of the first electronic component.
    Type: Grant
    Filed: March 26, 2021
    Date of Patent: May 23, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Wei Tsung Chen, Li-Hua Tai, Paofa Wang
  • Patent number: 11658102
    Abstract: A semiconductor device package includes a carrier, an electronic component and a connector. The electronic component is disposed on the carrier. The connector is disposed on the carrier and electrically connected to the electronic component. A S11 parameter of the connector is less than ?20 dB.
    Type: Grant
    Filed: January 22, 2020
    Date of Patent: May 23, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Yuanhao Yu, Cheng Yuan Chen, Chun Chen Chen, Jiming Li, Chien-Wen Tu
  • Publication number: 20230154905
    Abstract: A semiconductor device package and a method for manufacturing the semiconductor device package are provided. The semiconductor device package includes a first substrate, a second substrate disposed over the first substrate and having a first surface facing away from the first substrate and a second surface facing the first substrate, a first component disposed on the first surface of the second substrate, a second component disposed on the second surface of the second substrate; and a support member covering the first component.
    Type: Application
    Filed: November 12, 2021
    Publication date: May 18, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Wei-Hao CHANG
  • Patent number: 11652081
    Abstract: A method for manufacturing a semiconductor package structure is provided. The method includes: (a) providing a semiconductor structure including a first device and a second device; (b) irradiating the first device by a first energy-beam with a first irradiation area; and (c) irradiating the first device and the second device by a second energy-beam with a second irradiation area greater than the first irradiation area of the first energy-beam.
    Type: Grant
    Filed: April 16, 2021
    Date of Patent: May 16, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Yi Dao Wang, Tung Yao Lin, Rong He Guo
  • Patent number: 11652014
    Abstract: An electronic package and method for manufacturing the same are provided. The electronic package includes a first conductive structure, a second conductive structure, an electronic component, an underfill and a dam structure. The second conductive structure is disposed on the first conductive structure, wherein the second conductive structure defines a cavity over the first conductive structure. The electronic component is disposed on the first conductive structure and at least partially disposed in the cavity. The underfill is disposed between the first conductive structure and the electronic component. The dam structure is disposed on the first conductive structure and configured to confine the underfill.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: May 16, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Chung-Yuan Tsai
  • Publication number: 20230144000
    Abstract: An electronic package is provided. The electronic package includes a carrier, a first electronic component, a bonding element, and a barrier. The carrier has a conductive layer. The first electronic component is disposed adjacent to the carrier and has a first terminal and a second terminal. The bonding element is configured to electrically connect the conductive layer to the first terminal. The barrier is configured to avoid electrically bypassing an electrical path in the first electronic component and between the first terminal and the second terminal.
    Type: Application
    Filed: November 9, 2021
    Publication date: May 11, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Jun-Wei CHEN, Yu-Yuan YEH, Hsu-Nan FANG