Patents Assigned to Advanced Semiconductor Engineering
  • Patent number: 12267961
    Abstract: A manufacturing method of an embedded component package structure includes the following steps: providing a carrier and forming a semi-cured first dielectric layer on the carrier, the semi-cured first dielectric layer having a first surface; providing a component on the semi-cured first dielectric layer, and respectively providing heat energies from a top and a bottom of the component to cure the semi-cured first dielectric layer; forming a second dielectric layer on the first dielectric layer to cover the component; and forming a patterned circuit layer on the second dielectric layer, the patterned circuit layer being electrically connected to the component.
    Type: Grant
    Filed: January 23, 2024
    Date of Patent: April 1, 2025
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chien-Fan Chen, Chien-Hao Wang
  • Publication number: 20250105161
    Abstract: A semiconductor device package includes a number of interposers mounted to the carrier, wherein the number of interposers may be arranged in an irregular pattern.
    Type: Application
    Filed: December 10, 2024
    Publication date: March 27, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hao-Chih HSIEH, Tun-Ching PI, Sung-Hung CHIANG, Yu-Chang CHEN
  • Publication number: 20250105122
    Abstract: A substrate includes a first dielectric layer having a first surface and a second dielectric layer having a first surface disposed adjacent to the first surface of the first dielectric layer. The substrate further includes a first conductive via disposed in the first dielectric layer and having a first end adjacent to the first surface of the first dielectric layer and a second end opposite the first end. The substrate further includes a second conductive via disposed in the second dielectric layer and having a first end adjacent to the first surface of the second dielectric layer. A width of the first end of the first conductive via is smaller than a width of the second end of the first conductive via, and a width of the first end of the second conductive via is smaller than the width of the first end of the first conductive via.
    Type: Application
    Filed: December 10, 2024
    Publication date: March 27, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Lin HO, Chih-Cheng LEE
  • Publication number: 20250105188
    Abstract: A package structure is provided. The package structure includes a substrate, a sensing device, a light transmissive member, and a bonding structure. The sensing device is over the substrate, and the light transmissive member is over the sensing device. The bonding structure has an upper surface connected to the light transmissive member and a lower surface connected to the sensing device. A width of the upper surface is less than a width of the lower surface of the bonding structure.
    Type: Application
    Filed: September 21, 2023
    Publication date: March 27, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Paofa WANG, Huang Ming CHANG, Yung-Hsing CHANG, Yung-Chi CHEN, Hsiu-Hung SU
  • Publication number: 20250107298
    Abstract: A package structure is provided. The package structure includes a substrate, a first electronic component, an interposer, a conductive wire, and a conductive adhesive. The first electronic component and the interposer are disposed over the substrate. The conductive wire connects the first electronic component to the interposer. The conductive adhesive (connects the interposer to the substrate.
    Type: Application
    Filed: September 27, 2023
    Publication date: March 27, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Hsin-Ying HO
  • Patent number: 12261350
    Abstract: A semiconductor device package is provided that includes a substrate, a first support structure disposed on the substrate and a first antenna. The first support structure includes a first surface spaced apart from the substrate by a first distance. The first antenna is disposed above the first surface of the first support structure. The first antenna has a first surface, a second surface opposite the first surface and a third surface extending from the first surface to the second surface, wherein the first surface and the second surface of the first antenna are exposed.
    Type: Grant
    Filed: August 8, 2023
    Date of Patent: March 25, 2025
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Guo-Cheng Liao, Yi Chuan Ding
  • Patent number: 12261089
    Abstract: A semiconductor device package includes a supporting element, a transparent plate disposed on the supporting element, a semiconductor device disposed under the transparent plate, and a lid surrounding the transparent plate. The supporting element and the transparent plate define a channel.
    Type: Grant
    Filed: January 2, 2024
    Date of Patent: March 25, 2025
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Tsung-Yu Lin, Pei-Yu Wang, Chung-Wei Hsu
  • Publication number: 20250098378
    Abstract: A method for manufacturing an optoelectronic structure and a package structure are provided. The method includes providing a substrate and a light source module and a photonic component over the substrate; and adjusting a lens structure to a unit specific position related to the substrate to couple an optical signal from the light source module to the photonic component.
    Type: Application
    Filed: September 15, 2023
    Publication date: March 20, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Pei-Jung YANG, Jr-Wei LIN, Mei-Ju LU, Chi-Han CHEN
  • Publication number: 20250096774
    Abstract: The present disclosure provides a semiconductor package structure. The semiconductor package structure includes a substrate, a first electronic component and a support component. The first electronic component is disposed on the substrate. The first electronic component has a backside surface facing a first surface of the substrate. The support component is disposed between the backside surface of the first electronic component and the first surface of the substrate. The backside surface of the first electronic component has a first portion connected to the support component and a second portion exposed from the support component.
    Type: Application
    Filed: December 3, 2024
    Publication date: March 20, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chi Sheng TSENG, Lu-Ming LAI, Ching-Han HUANG, Kuo-Hua LAI, Hui-Chung LIU
  • Publication number: 20250096213
    Abstract: An optical package structure is provided. The optical package structure includes a carrier, an optical emitter, an optical receiver, an optical barrier, and an insulating structure. The optical emitter and the optical receiver are over the carrier. The optical barrier is over the carrier and between the optical emitter and the optical receiver, wherein the optical barrier defines a cavity. The insulating structure is filled in the cavity, wherein an elevation of a top surface of the insulating structure is lower than an elevation of a top surface of the optical barrier with respect to a surface of the carrier.
    Type: Application
    Filed: September 15, 2023
    Publication date: March 20, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Jenchun CHEN, Pai-Sheng SHIH, Kuan-Fu CHEN, Cheng Kai CHANG
  • Publication number: 20250096073
    Abstract: An electronic device is disclosed. The electronic component has a front side and a backside opposite to the front side. The front side is configured to receive a first power. The backside is configured to receive a second power greater than the first power.
    Type: Application
    Filed: September 15, 2023
    Publication date: March 20, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chiung-Ying KUO, Jung Jui KANG, Hung-Chun KUO, Chun-Yen TING
  • Publication number: 20250087621
    Abstract: An interposer structure and a package structure are provided. The interposer structure includes a conductive portion, a dielectric layer, a plurality of first wires, and a plurality of second wires. The conductive portion has a first surface and a second surface opposite to the first surface. The dielectric layer encapsulates the conductive portion and exposes the first surface and the second surface. The first wires are formed on the first surface. The second wires are disposed over the second surface.
    Type: Application
    Filed: September 8, 2023
    Publication date: March 13, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chih-Jing HSU, Hsu-Nan FANG
  • Publication number: 20250087618
    Abstract: A package structure includes a substrate, an electronic device, an underfill, and an underfill guide structure. The electronic device is disposed over the substrate. The underfill is outflanked by the substrate and the electronic device. The underfill guide structure is disposed outside of a vertical projection of the circuit structure and horizontally overlaps a gap between the substrate and the electronic device, and configured to reduce an extension of a portion of the underfill outside of the vertical projection along a lateral surface of the electronic device.
    Type: Application
    Filed: September 8, 2023
    Publication date: March 13, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Shih-Chieh TANG
  • Publication number: 20250087606
    Abstract: A semiconductor device package includes a first circuit layer, a first emitting device and a second emitting device. The first circuit layer has a first surface and a second surface opposite to the first surface. The first emitting device is disposed on the second surface of the first circuit layer. The first emitting device has a first surface facing the first circuit layer and a second surface opposite to the first surface. The first emitting device has a first conductive pattern disposed on the first surface of the first emitting device. The second emitting device is disposed on the second surface of the first emitting device. The second emitting device has a first surface facing the second surface of the first emitting device and a second surface opposite to the first surface. The second emitting device has a second conductive pattern disposed on the second surface of the emitting device.
    Type: Application
    Filed: November 25, 2024
    Publication date: March 13, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Meng-Wei HSIEH, Kuo-Chang KANG
  • Publication number: 20250087887
    Abstract: An antenna module is provided. The antenna module includes a conductive structure, a first dielectric layer, and a second dielectric layer. The conductive structure defines a first space and a second space over the first space. The first dielectric layer is at least partially within the first space and has a first dielectric constant. The second dielectric layer is at least partially within the second space and has a second dielectric constant different from the first dielectric constant.
    Type: Application
    Filed: September 8, 2023
    Publication date: March 13, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Shao-En HSU, Huei-Shyong CHO, Shih-Wen LU
  • Patent number: 12245872
    Abstract: The present disclosure provides an electronic device. The electronic device includes a flexible element, and a sensing element adjacent to the flexible element and configured to detect a biosignal. The electronic device also includes an active component in the flexible element and electrically connected with the sensing element. A method of manufacturing an electronic device is also disclosed.
    Type: Grant
    Filed: April 29, 2021
    Date of Patent: March 11, 2025
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chih Lung Lin, Kuei-Hao Tseng, Te Kao Tsui, Kai Hung Wang, Hung-I Lin
  • Patent number: 12249578
    Abstract: A semiconductor package structure and a method of manufacturing the same are provided. The semiconductor package structure includes an electronic component having a first surface, a second surface opposite to the first surface and a circuit structure closer to the first surface than to the second surface. The semiconductor package structure also includes a passive component connected to the second surface of the electronic component. The semiconductor package structure further includes a conductive element extending into the electronic component and configured to electrically connect the circuit structure with the passive component.
    Type: Grant
    Filed: June 23, 2021
    Date of Patent: March 11, 2025
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Hsu-Nan Fang
  • Patent number: 12249585
    Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes an antenna layer, a first circuit layer and a second circuit layer. The antenna layer has a first coefficient of thermal expansion (CTE). The first circuit layer is disposed over the antenna layer. The first circuit layer has a second CTE. The second circuit layer is disposed over the antenna layer. The second circuit layer has a third CTE. A difference between the first CTE and the second CTE is less than a difference between the first CTE and the third CTE.
    Type: Grant
    Filed: February 20, 2024
    Date of Patent: March 11, 2025
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Wen Hung Huang
  • Patent number: 12249583
    Abstract: A package structure includes a wiring structure, a first electronic device, a second electronic device and a reinforcement structure. The wiring structure includes at least one dielectric layer, and at least one circuit layer in contact with the dielectric layer. The at least one circuit layer includes at least one interconnection portion. The first electronic device and the second electronic device are electrically connected to the wiring structure. The second electronic device is electrically connected to the first electronic device through the at least one interconnection portion of the at least one circuit layer. The reinforcement structure is disposed above the at least one interconnection portion of the at least one circuit layer.
    Type: Grant
    Filed: August 15, 2023
    Date of Patent: March 11, 2025
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Syu-Tang Liu, Min Lung Huang, Huang-Hsien Chang, Tsung-Tang Tsai, Ching-Ju Chen
  • Publication number: 20250079308
    Abstract: An electronic device is disclosed. The electronic device includes a first electronic component and a first interposer. The first electronic component is disposed under the interposer and includes a logic circuit and a power delivery circuit disposed between the interposer and the logic circuit. The interposer and the power delivery circuit are collectively configured to function as a power delivery structure which is electrically connected to the logic circuit.
    Type: Application
    Filed: August 29, 2023
    Publication date: March 6, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hao-Chih HSIEH, Chun-Kai CHANG, Chao Wei LIU