Patents Assigned to Advanced Semiconductor Engineering
  • Package structure and testing method
    Patent number: 12216157
    Abstract: A package structure and a testing method are provided. The package structure includes a wiring structure, a first electronic device and a second electronic device. The wiring structure includes at least one dielectric layer, at least one conductive circuit layer in contact with the dielectric layer, and at least one test circuit structure in contact with the dielectric layer. The test circuit structure is disposed adjacent to the interconnection portion of the conductive circuit layer. The first electronic device is electrically connected to the wiring structure. The second electronic device is electrically connected to the wiring structure. The second electronic device is electrically connected to the first electronic device through the interconnection portion of the conductive circuit layer.
    Type: Grant
    Filed: August 22, 2023
    Date of Patent: February 4, 2025
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chen-Chao Wang, Tsung-Tang Tsai, Chih-Yi Huang
  • Semiconductor device package
    Patent number: 12218077
    Abstract: A semiconductor device package is disclosed. The semiconductor device package includes a carrier, a first electronic component disposed on the carrier and a support component disposed on the carrier. The semiconductor device package also includes a second electronic component disposed on the first electronic component and supported by the support component.
    Type: Grant
    Filed: March 25, 2022
    Date of Patent: February 4, 2025
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Cheng-Nan Lin, Ming-Chiang Lee, Yung-I Yeh
  • BOND STRUCTURE
    Publication number: 20250038106
    Abstract: A bond structure is provided. The bond structure includes a seed layer and a conductive structure. The conductive structure includes a via portion over the seed layer and a plurality of wires protruding from the via portion.
    Type: Application
    Filed: July 28, 2023
    Publication date: January 30, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chun-Wei CHIANG, Yung-Sheng LIN, I-Ting LIN, Ping-Hung HSIEH, Chih-Yuan HSU
  • BONDING STRUCTURE AND PACKAGE STRUCTURE
    Publication number: 20250038078
    Abstract: A bonding structure and a package structure are provided. The bonding structure includes a first pad and a plurality of first wires. The first pad has a top surface including a first region and a second region, wherein the second region is closer to an edge of the top surface of the first pad than the first region is. The first wires are on the top surface of the first pad, wherein a number of the first wires on the first region is greater than a number of the first wires on the second region.
    Type: Application
    Filed: July 28, 2023
    Publication date: January 30, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: An-Hsuan HSU, Chin-Li KAO
  • ELECTRONIC DEVICE
    Publication number: 20250038084
    Abstract: An electronic device is disclosed. The electronic device includes an electronic component, an input/output (I/O) signal delivery circuit, and a power delivery circuit. The electronic component has a first surface and a second surface opposite to the first surface. The I/O signal delivery circuit is disposed under the first surface of the electronic component. The power delivery circuit is disposed over the second surface of the electronic component and configured to balance a warpage of the electronic device.
    Type: Application
    Filed: July 28, 2023
    Publication date: January 30, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chiung-Ying KUO, Chun-Yen TING, Hung-Chun KUO, Jung Jui KANG, Chang Chi LEE
  • DEVICE PACKAGE
    Publication number: 20250038136
    Abstract: An electronic device package includes a first substrate, a second substrate and a conductive layer. The first substrate includes a first bonding pad, and a cavity exposing the first bonding pad. The second substrate is laminated on the first substrate. The second substrate includes a second bonding pad at least partially inserting into the cavity of the first substrate. The conductive layer is disposed in the cavity and at least between the first bonding pad and the second bonding pad to connect the first bonding pad and the second bonding pad.
    Type: Application
    Filed: October 15, 2024
    Publication date: January 30, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Nan LIN, Wei-Tung CHANG, Jen-Chieh KAO, Huei-Shyong CHO
  • Electronic device
    Patent number: 12213247
    Abstract: An electronic device is disclosed. The electronic device includes a carrier, a computing element disposed over the carrier, and a first data storage element disposed over the carrier and electrically connected with the computing element through the carrier. The computing element is configured to receive a first power provided from the first data storage element.
    Type: Grant
    Filed: July 14, 2022
    Date of Patent: January 28, 2025
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Jung Jui Kang, Chang Chi Lee
  • Electronic package structure
    Patent number: 12211780
    Abstract: An electronic package structure is provided. The electronic package structure includes a first carrier, a first electronic component, a first optical channel, and a second electronic component. The first electronic component is disposed on or within the first carrier. The first optical channel is disposed within the first carrier. The first optical channel is configured to provide optical communication between the first electronic component and the second electronic component. The first carrier is configured to electrically connect the first electronic component.
    Type: Grant
    Filed: January 5, 2022
    Date of Patent: January 28, 2025
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chiung-Ying Kuo, Hung-Chun Kuo
  • Semiconductor device package
    Patent number: 12211765
    Abstract: The present disclosure provides a semiconductor device package including a first device, a second device, and a spacer. The first device includes a substrate having a first dielectric constant. The second device includes a dielectric element, an antenna, and a reinforcing element. The dielectric element has a second dielectric constant less than the first dielectric constant. The antenna is at least partially within the dielectric element. The reinforcing element is disposed on the dielectric element, and the reinforcing element has a third dielectric constant greater than the first dielectric constant. The spacer is disposed between the first device and the second device and configured to define a distance between the first device and the second device.
    Type: Grant
    Filed: June 20, 2023
    Date of Patent: January 28, 2025
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Wei-Tung Chang
  • ELECTRONIC DEVICE
    Publication number: 20250029951
    Abstract: An electronic device is provided. The electronic device includes a first electronic component, a plurality of second electronic components, and a plurality of conductive elements. The plurality of second electronic components are disposed under the first electronic component. The plurality of conductive elements electrically connect the first electronic component to the plurality of second electronic components. The plurality of conductive elements are free from vertically overlapping the plurality of second electronic components.
    Type: Application
    Filed: July 18, 2023
    Publication date: January 23, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Kay Stefan ESSIG, You-Lung YEN, Bernd Karl APPELT
  • ELECTRONIC DEVICE AND CHIPLET MODULE
    Publication number: 20250029970
    Abstract: The present disclosure provides an electronic device, which includes a circuit structure, a processing component, a first storage unit, and a second storage unit. The processing component is disposed over the circuit structure. The first storage unit is supported by the circuit structure, and electrically connected to the processing component. The second storage unit is disposed under the circuit structure and electrically connected to the processing component via the circuit structure.
    Type: Application
    Filed: July 18, 2023
    Publication date: January 23, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Jung Jui KANG, Chang Chi LEE, Hung-Chun KUO, Chun-Yen TING
  • SEMICONDUCTOR DEVICE PACKAGE AND THE METHOD OF MANUFACTURING THE SAME
    Publication number: 20250029940
    Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes a dielectric layer. The semiconductor device package further includes an antenna structure disposed in the dielectric layer. The semiconductor device package further includes a semiconductor device disposed on the dielectric layer. The semiconductor device package further includes an encapsulant covering the semiconductor device. The semiconductor device package further includes a conductive pillar having a first portion and a second portion. The first portion surrounded by the encapsulant and the second portion embedded in the dielectric layer.
    Type: Application
    Filed: October 1, 2024
    Publication date: January 23, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Ya Fang CHAN, Yuan-Feng CHIANG, Po-Wei LU
  • Semiconductor device package and method of manufacturing the same
    Patent number: 12206165
    Abstract: A semiconductor device package includes a substrate, a first antenna pattern and a second antenna pattern. The substrate has a first surface and a second surface opposite to the first surface. The first antenna pattern is disposed over the first surface of the substrate. The first antenna pattern has a first bandwidth. The second antenna pattern is disposed over the first antenna pattern. The second antenna pattern has a second bandwidth different from the first bandwidth. The first antenna pattern and the second antenna pattern are at least partially overlapping in a direction perpendicular to the first surface of the substrate.
    Type: Grant
    Filed: June 6, 2023
    Date of Patent: January 21, 2025
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Shao-En Hsu, Huei-Shyong Cho, Shih-Wen Lu
  • Antenna device
    Patent number: 12206185
    Abstract: The present disclosure provides an antenna device. The antenna device includes a dielectric element including a first region and a second region, a first antenna disposed on the first region, and a second antenna disposed on the second region. The first antenna and the second antenna are configured to operate in different frequencies. The first antenna and the second antenna are misaligned in directions perpendicular and parallel to a surface of the dielectric element on which the first antenna or the second antenna is disposed.
    Type: Grant
    Filed: October 15, 2021
    Date of Patent: January 21, 2025
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Mark Gerber
  • Semiconductor device package and method of manufacturing the same
    Patent number: 12205829
    Abstract: A semiconductor device package includes a substrate and a monolithic encapsulant. The substrate has a first surface, a second surface opposite to the first surface and a plurality of lateral surfaces extending between the first surface and the second surface. The substrate defines a first opening and a second opening that extend between the first surface and the second surface and respectively expose the plurality of lateral surfaces. The monolithic encapsulant includes a first portion disposed on the first surface of the substrate, a second portion disposed on the second surface of the substrate and a third portion disposed within the first opening and the second opening.
    Type: Grant
    Filed: February 1, 2021
    Date of Patent: January 21, 2025
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Chanyuan Liu
  • SEMICONDUCTOR PACKAGE INCLUDING PROCESSING ELEMENT AND I/O ELEMENT
    Publication number: 20250022848
    Abstract: A semiconductor package and a method for manufacturing a semiconductor package are provided. The semiconductor package includes a first processing element, a first I/O element, a second processing element, and a second I/O element. The first processing element is on a substrate. The first I/O element is on the substrate and electrically connected to the first processing element. The second processing element is on the substrate. The second I/O element is on the substrate and electrically connected to the second processing element. The first I/O element is electrically connected to and physically separated from the second I/O element.
    Type: Application
    Filed: October 1, 2024
    Publication date: January 16, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chang Chi LEE, Jung Jui KANG, Chiu-Wen LEE, Li Chieh CHEN
  • Electronic package including a protection layer
    Patent number: 12198999
    Abstract: An electronic package includes a carrier, a protection layer and an electronic component. The carrier includes a dielectric layer and a pad in contact with the dielectric layer. The protection layer at least partially covers the pad. The electronic component is located over the protection layer and electrically connected to the pad. At least one portion of the protection layer under the electronic component is substantially conformal with a profile of the pad or with a profile of the dielectric layer.
    Type: Grant
    Filed: September 16, 2021
    Date of Patent: January 14, 2025
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: You-Lung Yen, Bernd Karl Appelt
  • SEMICONDUCTOR PACKAGE STRUCTURE
    Publication number: 20250015069
    Abstract: A semiconductor package structure and a method of manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a first electronic device and a second electronic device. The first electronic device has an active surface and a lateral surface angled with the active surface, and the lateral surface includes a first portion and a second portion that is non-coplanar with the first portion. The second electronic device is disposed on the active surface of the first electronic device.
    Type: Application
    Filed: September 24, 2024
    Publication date: January 9, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chang-Yu LIN, Cheng-Hsuan WU
  • Wearable device
    Patent number: 12186094
    Abstract: A wearable device is provided. The wearable device includes an electronic component and an encapsulant. The encapsulant includes a low-penetrability region encapsulating the electronic component and a high-penetrability region physically separated from the electronic component.
    Type: Grant
    Filed: August 6, 2021
    Date of Patent: January 7, 2025
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Chang-Lin Yeh
  • Electronic device and method of manufacturing the same
    Patent number: 12185475
    Abstract: The present disclosure provides an electronic device and method of manufacturing the same. The electronic device includes a first region, a second region, an electronic component, and a first sensing element. The second region is adjacent to the first region. The first region has a first pliability. The second region has a second pliability. The second pliability is greater than the first pliability. The electronic component is disposed at the first region. The first sensing element is disposed at the second region and electrically connected to the electronic component.
    Type: Grant
    Filed: April 23, 2021
    Date of Patent: December 31, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Tun-Ching Pi, Ming-Hung Chen