Patents Assigned to Advanced Semiconductor Engineering
  • Publication number: 20250080894
    Abstract: The present disclosure provides an electronic device. The electronic device includes a flexible element having a channel, a first cover at least covering the channel, and a transducing element connected with the flexible element. The transducing element is configured to convert energy from one form to another to deform and affect the flexible element to adjust a dimension of the first cover.
    Type: Application
    Filed: August 30, 2023
    Publication date: March 6, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Kuei-Hao TSENG, Kai Hung WANG, Chih Lung LIN
  • Publication number: 20250079689
    Abstract: The present disclosure provides a semiconductor device package including a substrate, a waveguide component, and an antenna pattern. The substrate includes a feeding element. The waveguide component is disposed over the substrate. The antenna pattern is disposed over the substrate. The waveguide component is substantially aligned with the feeding element and the antenna pattern.
    Type: Application
    Filed: November 19, 2024
    Publication date: March 6, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Christophe ZINCK
  • Publication number: 20250070075
    Abstract: A package structure includes a wiring structure, a first electronic device and a reinforcement structure. The first electronic device is disposed over the top surface of the wiring structure, and has a bottom surface facing the top surface of the wiring structure. The first electronic device includes a plurality of first wires. The reinforcement structure is disposed over the top surface of the wiring structure, and includes a plurality of second wires directly contacting the plurality of first wires to reduce a variation of an elevation of the bottom surface of the first electronic device with respect to the top surface of the wiring structure.
    Type: Application
    Filed: August 24, 2023
    Publication date: February 27, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chi-Yang CHIANG, Man-Wen TSENG, Chien-Ching CHEN
  • Publication number: 20250069916
    Abstract: A method and equipment for manufacturing a package structure are disclosed. The equipment includes a first space, a de-bonding apparatus, a second space and a fluid supply device. The de-bonding apparatus is disposed in the first space, and configured to perform a de-bonding process. The second space is disposed around the first space. The fluid supply device is configured to make a first humidity of an atmosphere in the first space greater than a second humidity of an atmosphere in the second space.
    Type: Application
    Filed: August 23, 2023
    Publication date: February 27, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hsing Kuo TIEN, Chih-Cheng LEE
  • Publication number: 20250069901
    Abstract: A method for manufacturing a package structure is provided. The method includes providing a package structure including a first region and a second region different from the first region, wherein the package structure comprises a package substrate having an active surface and a backside surface; and irradiating the package structure by a first light beam along a first direction from the active surface toward the backside surface, wherein the first light beam only irradiates the first region without irradiating the second region.
    Type: Application
    Filed: August 25, 2023
    Publication date: February 27, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Tung Yao LIN, Yi Dao WANG
  • Publication number: 20250070058
    Abstract: A semiconductor device package includes an electronic component and a substrate. The electronic component has a first surface and a second surface. The substrate is connected to the first surface of the electronic component through an adhesive layer. The substrate includes a first antenna disposed over the second surface of the electronic components through the adhesive layer.
    Type: Application
    Filed: November 11, 2024
    Publication date: February 27, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Wen-Long LU
  • Publication number: 20250062174
    Abstract: A package structure and a method for manufacturing the same are provided. The package structure includes an electronic device, a heat spreader, an intermediate layer and an encapsulant. The electronic device includes a plurality of electrical contacts. The intermediate layer is interposed between the electronic device and the heat spreader. The intermediate layer includes a sintered material. The encapsulant encapsulates the electronic device. A surface of the encapsulant is substantially coplanar with a plurality of surfaces of the electrical contacts.
    Type: Application
    Filed: November 5, 2024
    Publication date: February 20, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Hsu-Nan FANG
  • Publication number: 20250054877
    Abstract: A semiconductor package structure is provided. The semiconductor package structure includes an electronic component, and an inductance component. The protection layer encapsulates the electronic component and has a top surface and a bottom surface. The top surface and the bottom surface collectively define a space to accommodate the electronic component. The inductance component outflanks the space from the top surface and the bottom surface of the protection layer.
    Type: Application
    Filed: October 29, 2024
    Publication date: February 13, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Pao-Nan LEE, Chen-Chao WANG, Chang Chi LEE
  • Publication number: 20250054829
    Abstract: An electronic device is disclosed. The electronic device includes an active component, a power regulating component disposed on the active component, and a patterned conductive element disposed between the active component and the power regulating component. The patterned conductive element is configured to provide one or more heat dissipation paths for the active component and to provide a power path between the active component and the power regulating component.
    Type: Application
    Filed: October 28, 2024
    Publication date: February 13, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Po-Chih PAN, Hung-Chun KUO
  • Publication number: 20250046981
    Abstract: The present disclosure provides an electronic device. The electronic device includes a circuit structure, an interconnection structure disposed over the circuit structure, and an antenna element disposed over the interconnection structure. The antenna element defines a first recess having a sidewall, and the sidewall of the first recess of the antenna element is configured to feed a signal to the antenna element and is electrically connected to the interconnection structure.
    Type: Application
    Filed: July 31, 2023
    Publication date: February 6, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yuanhao YU, Weifan WU, Yong-Chang SYU
  • Publication number: 20250048541
    Abstract: An electronic device is provided. The electronic device includes a carrier, a first electronic component, a second electronic component, and an encapsulant. The first electronic component is disposed at a first side of the carrier. The second electronic component is disposed at a second side of the carrier opposite to the first side. The encapsulant encapsulates the first electronic component and has an uneven thickness. The encapsulant is configured to reduce a warpage of the carrier.
    Type: Application
    Filed: October 22, 2024
    Publication date: February 6, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wei-Jhen CIOU, Jenchun CHEN, Chang-Fu LU, Pai-Sheng SHIH
  • Publication number: 20250048760
    Abstract: An electronic device includes an encapsulant, an optical emitter, and an optical sensor. The optical sensor is encapsulated by the encapsulant. The optical emitter is supported by the encapsulant.
    Type: Application
    Filed: August 4, 2023
    Publication date: February 6, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hsin-Ying HO, Lu-Ming LAI, Shih-Chieh TANG
  • Publication number: 20250038136
    Abstract: An electronic device package includes a first substrate, a second substrate and a conductive layer. The first substrate includes a first bonding pad, and a cavity exposing the first bonding pad. The second substrate is laminated on the first substrate. The second substrate includes a second bonding pad at least partially inserting into the cavity of the first substrate. The conductive layer is disposed in the cavity and at least between the first bonding pad and the second bonding pad to connect the first bonding pad and the second bonding pad.
    Type: Application
    Filed: October 15, 2024
    Publication date: January 30, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Nan LIN, Wei-Tung CHANG, Jen-Chieh KAO, Huei-Shyong CHO
  • Publication number: 20250038084
    Abstract: An electronic device is disclosed. The electronic device includes an electronic component, an input/output (I/O) signal delivery circuit, and a power delivery circuit. The electronic component has a first surface and a second surface opposite to the first surface. The I/O signal delivery circuit is disposed under the first surface of the electronic component. The power delivery circuit is disposed over the second surface of the electronic component and configured to balance a warpage of the electronic device.
    Type: Application
    Filed: July 28, 2023
    Publication date: January 30, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chiung-Ying KUO, Chun-Yen TING, Hung-Chun KUO, Jung Jui KANG, Chang Chi LEE
  • Publication number: 20250038106
    Abstract: A bond structure is provided. The bond structure includes a seed layer and a conductive structure. The conductive structure includes a via portion over the seed layer and a plurality of wires protruding from the via portion.
    Type: Application
    Filed: July 28, 2023
    Publication date: January 30, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chun-Wei CHIANG, Yung-Sheng LIN, I-Ting LIN, Ping-Hung HSIEH, Chih-Yuan HSU
  • Publication number: 20250038078
    Abstract: A bonding structure and a package structure are provided. The bonding structure includes a first pad and a plurality of first wires. The first pad has a top surface including a first region and a second region, wherein the second region is closer to an edge of the top surface of the first pad than the first region is. The first wires are on the top surface of the first pad, wherein a number of the first wires on the first region is greater than a number of the first wires on the second region.
    Type: Application
    Filed: July 28, 2023
    Publication date: January 30, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: An-Hsuan HSU, Chin-Li KAO
  • Publication number: 20250029970
    Abstract: The present disclosure provides an electronic device, which includes a circuit structure, a processing component, a first storage unit, and a second storage unit. The processing component is disposed over the circuit structure. The first storage unit is supported by the circuit structure, and electrically connected to the processing component. The second storage unit is disposed under the circuit structure and electrically connected to the processing component via the circuit structure.
    Type: Application
    Filed: July 18, 2023
    Publication date: January 23, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Jung Jui KANG, Chang Chi LEE, Hung-Chun KUO, Chun-Yen TING
  • Publication number: 20250029951
    Abstract: An electronic device is provided. The electronic device includes a first electronic component, a plurality of second electronic components, and a plurality of conductive elements. The plurality of second electronic components are disposed under the first electronic component. The plurality of conductive elements electrically connect the first electronic component to the plurality of second electronic components. The plurality of conductive elements are free from vertically overlapping the plurality of second electronic components.
    Type: Application
    Filed: July 18, 2023
    Publication date: January 23, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Kay Stefan ESSIG, You-Lung YEN, Bernd Karl APPELT
  • Publication number: 20250029940
    Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes a dielectric layer. The semiconductor device package further includes an antenna structure disposed in the dielectric layer. The semiconductor device package further includes a semiconductor device disposed on the dielectric layer. The semiconductor device package further includes an encapsulant covering the semiconductor device. The semiconductor device package further includes a conductive pillar having a first portion and a second portion. The first portion surrounded by the encapsulant and the second portion embedded in the dielectric layer.
    Type: Application
    Filed: October 1, 2024
    Publication date: January 23, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Ya Fang CHAN, Yuan-Feng CHIANG, Po-Wei LU
  • Publication number: 20250022848
    Abstract: A semiconductor package and a method for manufacturing a semiconductor package are provided. The semiconductor package includes a first processing element, a first I/O element, a second processing element, and a second I/O element. The first processing element is on a substrate. The first I/O element is on the substrate and electrically connected to the first processing element. The second processing element is on the substrate. The second I/O element is on the substrate and electrically connected to the second processing element. The first I/O element is electrically connected to and physically separated from the second I/O element.
    Type: Application
    Filed: October 1, 2024
    Publication date: January 16, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chang Chi LEE, Jung Jui KANG, Chiu-Wen LEE, Li Chieh CHEN