Patents Assigned to ADVANCED
  • Patent number: 9982859
    Abstract: An LED light source includes a connecting body and a mounting base. The mounting base includes a mounting platform having a top surface, and an LED unit connected to the top surface, the top surface having good heat-dissipating properties. The LED unit includes LEDs, an LED driving device, and a circuit board. The circuit board includes a first portion for mounting the driving device and a second portion for mounting the LEDs. The first portion is connected to the top surface. The second portion is bent away from the first portion; the LEDs being mounted to outer surface of the integral second portion.
    Type: Grant
    Filed: December 27, 2016
    Date of Patent: May 29, 2018
    Assignee: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC
    Inventors: Shiue-Lung Chen, Shr-Min Lin, Yu-Wei Tsai, Chung-Min Chang
  • Patent number: 9984993
    Abstract: A method of manufacturing a bonding structure includes (a) providing a substrate, wherein the substrate includes a top surface and at least one bonding pad disposed adjacent to the top surface of the substrate, at least one bonding pad having a sloped surface with a first slope; (b) providing a semiconductor element, wherein the semiconductor element includes at least one pillar, and at least one pillar has a sidewall with a second slope, wherein the absolute value of the first slope is smaller than the absolute value of the second slope; and (c) bonding at least one pillar to a portion of the sloped surface of corresponding ones of the at least one bonding pad.
    Type: Grant
    Filed: October 14, 2016
    Date of Patent: May 29, 2018
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Min-Fong Shu, Yi-Hsiu Tseng, Kuan-Neng Chen, Shu-Chiao Kuo
  • Patent number: 9983655
    Abstract: A method and apparatus for performing inter-lane power management includes de-energizing one or more execution lanes upon a determination that the one or more execution lanes are to be predicated. Energy from the predicated execution lanes is redistributed to one or more active execution lanes.
    Type: Grant
    Filed: December 9, 2015
    Date of Patent: May 29, 2018
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Mitesh R. Meswani, David A. Roberts, Dmitri Yudanov, Arkaprava Basu, Sergey Blagodurov
  • Patent number: 9983351
    Abstract: In various embodiments, an illumination structure includes a discrete light source disposed proximate a bottom surface of a waveguide and below a depression in a top surface thereof. A top mirror may be disposed above the discrete light source to convert modes of light emitted from the discrete light source into trapped modes, thereby increasing the coupling efficiency of the illumination structure.
    Type: Grant
    Filed: September 21, 2017
    Date of Patent: May 29, 2018
    Assignee: OREE ADVANCED ILLUMINATION SOLUTIONS LTD.
    Inventors: Yosi Shani, Tania Kosburd, Dafna Bortman Arbiv
  • Patent number: 9984956
    Abstract: Provided are a through electrode including an organic side-wall insulating film, capable of eliminating a barrier layer and achieving satisfactory mechanical reliability and electrical reliability and a manufacturing method thereof, and a semiconductor device and a manufacturing method thereof. According to one aspect of the present invention, a through electrode disposed in a semiconductor substrate is provided, including: a copper layer in the semiconductor substrate; and a side-wall insulating film that is disposed between the copper layer and the semiconductor substrate so as to be in contact with the copper layer and the semiconductor substrate, the side-wall insulating film being represented by the following chemical formula (1).
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: May 29, 2018
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventors: Masahiro Aoyagi, Tung Thanh Bui, Naoya Watanabe, Fumiki Kato, Katsuya Kikuchi
  • Patent number: 9984985
    Abstract: The present disclosure provides for a semiconductor package device. The semiconductor package device includes a substrate, a first antenna, an electronic component, a package body and a second antenna. The substrate includes a first surface, a second surface opposite to the first surface and a first lateral surface extending between the first surface and the second surface. The first antenna is disposed on the first surface of the substrate. The electronic component is disposed on the second surface of the substrate. The package body is disposed on the second surface of the substrate and encapsulates the electronic component. The package body has a first lateral surface substantially coplanar with the first lateral surface of the substrate. The second antenna is disposed on the first lateral surface of the substrate and on the first lateral surface of the package body.
    Type: Grant
    Filed: January 13, 2017
    Date of Patent: May 29, 2018
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chung-Hsin Chiang, Kuang-Ting Chi
  • Patent number: 9982480
    Abstract: A collapsible wall including a support frame and a first series of panels configured to suspend from the support frame with at least one pair of adjacent panels pivotally connected to each other. A second series of panels are configured to suspend from the support frame opposite the first series of panels and include at least one pair of adjacent panels pivotally connected to each other. A bottom sill opposite the support frame is pivotally connected to a bottom portion of the first series of panels and to a bottom portion of the second series of panels. A motor assembly is mounted on the support frame and configured to raise or lower at least one lifting element to raise or lower the bottom sill to collapse or extend the panels in the first and second series of panels.
    Type: Grant
    Filed: January 16, 2015
    Date of Patent: May 29, 2018
    Assignee: Advanced Equipment Corporation
    Inventor: Frank V. Manning
  • Patent number: 9984898
    Abstract: A substrate includes a dielectric layer having a first surface and a second surface opposite to the first surface, a first circuit layer and at least one second conductive element. The first circuit layer is disposed adjacent to the first surface of the dielectric layer, and includes at least one trace and at least one first conductive element connected to the trace. The first conductive element does not extend through the dielectric layer. The second conductive element extends through the dielectric layer. An area of an upper surface of the second conductive element is substantially equal to an area of an upper surface of the first conductive element.
    Type: Grant
    Filed: June 22, 2017
    Date of Patent: May 29, 2018
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Li Chuan Tsai, Chih-Cheng Lee, Cheng-Lin Ho
  • Patent number: 9984986
    Abstract: A semiconductor device includes a substrate, a patterned conductive layer on the substrate, a passivation layer on the substrate and surrounding the patterned conductive layer, a first under bump metallurgy (UBM) and a second UBM on the passivation layer and electrically connected to the patterned conductive layer, and an isolation structure on the passivation layer and between the first UBM and the second UBM.
    Type: Grant
    Filed: February 14, 2017
    Date of Patent: May 29, 2018
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Wen Hung Huang
  • Patent number: 9980484
    Abstract: A self-regenerating chitosan based filter medium for disinfecting and purifying organic pollutants and other pollutants in a gas or liquid is disclosed herein. Porosity and surface charge of said filter medium is manipulative/tunable by varying one or more of the following parameter(s): concentration of chitosan, crosslinking density, amount of copolymers and additives, freezing temperature, freezing profile, and/or types of crosslinker used. The present filter medium is capable of self-regenerating under exposure to ultra-violet light for sufficient time and removing over 90% of the pollutants from each influent flowing through the filter medium.
    Type: Grant
    Filed: September 30, 2014
    Date of Patent: May 29, 2018
    Assignee: Nano and Advanced Materials Institute Limited
    Inventors: Jifan Li, Yee Man Ho, Ka Chun Lee, Wai Yan Chan, Mui Chan, Kai Ming Yeung
  • Patent number: 9982425
    Abstract: This disclosure relates generally to stormwater management and, more particularly, to a stormwater chamber with a continuous curvature. The stormwater chamber may comprise a chamber body with a chamber wall, an apex, a base, and a first and second opening. The chamber wall may include a continuous curvature from the apex of the chamber body to the first and second openings and a continuous curvature from the apex of the chamber body to the base.
    Type: Grant
    Filed: October 12, 2016
    Date of Patent: May 29, 2018
    Assignee: Advanced Drainage Sysems, Inc.
    Inventors: Ronald R. Vitarelli, Michael Kuehn, John Kurdziel, David Mailhot
  • Publication number: 20180143781
    Abstract: A processing apparatus is provided that includes a plurality of memory regions each corresponding to a memory address and configured to store data associated with the corresponding memory address. The processing apparatus also includes an accelerated processing device in communication with the memory regions and configured to determine a request to allocate an initial memory buffer comprising a number of contiguous memory regions, create a new memory buffer comprising one or more additional memory regions adjacent to the contiguous memory regions of the initial memory buffer, assign one or more values to the one or more additional memory regions and detect a change to the one or more values at the one or more additional memory regions.
    Type: Application
    Filed: November 23, 2016
    Publication date: May 24, 2018
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Joseph L. Greathouse, Christopher D. Erb, Michael G. Collins
  • Publication number: 20180145037
    Abstract: A semiconductor package structure and a fabrication method thereof are provided. The fabrication method comprises: providing a substrate strip, the substrate strip comprising a plurality of substrate units which comprise a substrate unit; disposing a plurality of chips on the plurality of substrate units; disposing a packaging encapsulant on the substrate strip to encapsulate the chips; forming a warp-resistant layer on a top surface of the packaging encapsulant; and dividing the substrate strip to separate the plurality of substrate units to further fabricate a plurality of semiconductor package structures which comprise a semiconductor package structure comprising the substrate unit, wherein the warp-resistant layer is formed of a selected material with a selected thickness to make a variation of warpage of the semiconductor package structure at a temperature between 25° C. and 260° C. to be smaller than 560 ?m.
    Type: Application
    Filed: January 17, 2018
    Publication date: May 24, 2018
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Tien-Szu CHEN, Sheng-Ming WANG, Kuang-Hsiung CHEN, Yu-Ying LEE
  • Publication number: 20180145484
    Abstract: A laser system including a seed laser and an optical amplification subsystem, receiving an output of the seed laser and providing an amplified laser output, the optical amplification subsystem including a first plurality of amplifier assemblies, each of the first plurality of amplifier assemblies including a second plurality of optical amplifiers, and phase control circuitry including phase modulating functionality associated with each of the first plurality of amplifier assemblies.
    Type: Application
    Filed: January 2, 2018
    Publication date: May 24, 2018
    Applicant: CIVAN ADVANCED TECHNOLOGIES LTD.
    Inventor: Eyal SHEKEL
  • Publication number: 20180144536
    Abstract: Techniques for removing duplicate indices from an index stream are disclosed. The techniques involve dividing the indices into chunks. For any particular chunk, the techniques involve examining each index in the chunk to determine whether a “match” exists for that index within a reuse depth sliding window. The reuse depth sliding window includes a fixed number of indices immediately prior to the index being examined for a match. If a match exists, then the index is marked as non-unique and is assigned a position value equal to the position value of the matching index. If a match does not exist, then the index is marked as unique and assigned the next available position value for the chunk. After assigning position values to indices in a chunk, the indices in the chunk are transmitted to a vertex shader stage for processing in the order indicated by the position values.
    Type: Application
    Filed: November 23, 2016
    Publication date: May 24, 2018
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Saad Arrabi, Mangesh P. Nijasure, Todd Martin
  • Publication number: 20180140383
    Abstract: Embodiments of the present disclosure are directed to devices and methods for stimulating cell proliferation. In one implementation, a method for increasing cell proliferation is provided. The method includes providing a vibrational dental device configured to vibrate at a frequency higher than about 60 Hz. The method also includes mechanically stimulating, using the vibrational dental device, cells for a treatment period of less than about 10 to 20 minutes daily. The method may further include generating a peak acceleration magnitude in the horizontal direction substantially greater than that in the vertical direction. The number of the cells at the end of the period of time is increased. The cells may include at least one of human osteoblasts and fibroblasts.
    Type: Application
    Filed: January 19, 2018
    Publication date: May 24, 2018
    Applicant: Advanced Orthodontics and Education Association, LLC
    Inventors: Richard Johnson, Bryce A. Way
  • Publication number: 20180145728
    Abstract: A composite cable (4) houses a plurality of leaky coaxial cables having mutually different radiation characteristics. The leaky coaxial cable (2a, 2b) includes therein an inner conductor and an outer conductor, and has a plurality of leakage slots. The plurality of leakage slots have different slot periods relative to the axial direction or arranged in different slot patterns. The digital wireless communication device feeds a high-frequency signal from an end of the composite cable (4) and performs MIMO (multiple-input multiple-output) communication.
    Type: Application
    Filed: September 3, 2015
    Publication date: May 24, 2018
    Applicants: ADVANCED TELECOMMUNICATIONS RESEARCH INSTITUTE INTERNATIONAL, FUJIKURA LTD.
    Inventors: Satoshi TSUKAMOTO, Takahiro MAEDA, Yafei HOU, Masayuki ARIYOSHI, Kiyoshi KOBAYASHI, Fumio SUZUKI, Atsuhiko NIWA
  • Publication number: 20180144874
    Abstract: A tantalum powder having a value of hydrogen (H) content (ppm) of the tantalum powder divided by Brunauer-Emmett-Teller (BET) surface area (m2/g) of the tantalum powder (H/BET) is greater than 100 is provided. The tantalum powder can be used as an anode of a capacitor, such as a solid electrolytic capacitor, to obtain a capacitor having large capacitance and low current leakage. Methods of producing the tantalum powder, anode, and capacitors including the tantalum powder, also are provided.
    Type: Application
    Filed: October 21, 2016
    Publication date: May 24, 2018
    Applicant: Global Advanced Metals, USA, Inc.
    Inventors: Nick Yin, Ashish Rai, Craig Sungail, Kazunari Yanagiya, Shuhei Yoshikawa
  • Publication number: 20180143588
    Abstract: A hologram generating apparatus is provided. The apparatus includes a hologram signal generating unit configured to, based on light projected on at least some points corresponding to an object, generate a hologram signal corresponding to the at least some points on at least one two-dimensional plane, a processor configured to calculate a sparsity corresponding to the two-dimensional plane based on the hologram signal, and to calculate a fringe pattern based on at least some of the hologram signal, and a pattern writing unit configured to record the fringe pattern on a computer-generated holography (CGH) plane, wherein the processor is further configured to repeatedly calculate a fringe pattern until a number of dominant signals of the calculated fringe pattern coincides with a predetermined threshold value determined based on the sparsity.
    Type: Application
    Filed: June 21, 2017
    Publication date: May 24, 2018
    Applicants: SAMSUNG ELECTRONICS CO., LTD., KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Jin-sung LEE, YongMan RO, Hak Gu KIM, Jong-sul MIN
  • Publication number: 20180142592
    Abstract: Aspects of the subject disclosure may include, for example, an emission control system that includes an emission control device having a plurality of passages to facilitate emission control of an exhaust gas from a vehicle engine. A controller generates a control signal to initiate induction heating of the emission control device. An electromagnetic field generator responds to the control signal by generating a power signal applied to a coil to cause the induction heating of the emission control device, wherein a frequency of the power signal is adjusted to control a power transferred to the coil.
    Type: Application
    Filed: November 21, 2017
    Publication date: May 24, 2018
    Applicant: Advanced Technology Emission Solutions Inc.
    Inventors: Robin Crawford, John Douglas